2 * linux/arch/sparc64/kernel/setup.c
4 * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 #include <linux/errno.h>
9 #include <linux/sched.h>
10 #include <linux/kernel.h>
12 #include <linux/stddef.h>
13 #include <linux/unistd.h>
14 #include <linux/ptrace.h>
16 #include <linux/user.h>
17 #include <linux/screen_info.h>
18 #include <linux/delay.h>
20 #include <linux/seq_file.h>
21 #include <linux/syscalls.h>
22 #include <linux/kdev_t.h>
23 #include <linux/major.h>
24 #include <linux/string.h>
25 #include <linux/init.h>
26 #include <linux/inet.h>
27 #include <linux/console.h>
28 #include <linux/root_dev.h>
29 #include <linux/interrupt.h>
30 #include <linux/cpu.h>
31 #include <linux/initrd.h>
32 #include <linux/module.h>
34 #include <asm/system.h>
36 #include <asm/processor.h>
37 #include <asm/oplib.h>
39 #include <asm/pgtable.h>
40 #include <asm/idprom.h>
42 #include <asm/starfire.h>
43 #include <asm/mmu_context.h>
44 #include <asm/timer.h>
45 #include <asm/sections.h>
46 #include <asm/setup.h>
48 #include <asm/ns87303.h>
49 #include <asm/btext.h>
51 #include <asm/mdesc.h>
54 #include <net/ipconfig.h>
60 /* Used to synchronize accesses to NatSemi SUPER I/O chip configure
61 * operations in asm/ns87303.h
63 DEFINE_SPINLOCK(ns87303_lock);
64 EXPORT_SYMBOL(ns87303_lock);
66 struct screen_info screen_info = {
67 0, 0, /* orig-x, orig-y */
69 0, /* orig-video-page */
70 0, /* orig-video-mode */
71 128, /* orig-video-cols */
72 0, 0, 0, /* unused, ega_bx, unused */
73 54, /* orig-video-lines */
74 0, /* orig-video-isVGA */
75 16 /* orig-video-points */
79 prom_console_write(struct console *con, const char *s, unsigned n)
84 /* Exported for mm/init.c:paging_init. */
85 unsigned long cmdline_memory_size = 0;
87 static struct console prom_early_console = {
89 .write = prom_console_write,
90 .flags = CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME,
95 * Process kernel command line switches that are specific to the
96 * SPARC or that require special low-level processing.
98 static void __init process_switch(char c)
105 prom_printf("boot_flags_init: Halt!\n");
109 /* Just ignore, this behavior is now the default. */
112 /* Force UltraSPARC-III P-Cache on. */
113 if (tlb_type != cheetah) {
114 printk("BOOT: Ignoring P-Cache force option.\n");
117 cheetah_pcache_forced_on = 1;
118 add_taint(TAINT_MACHINE_CHECK);
119 cheetah_enable_pcache();
123 printk("Unknown boot switch (-%c)\n", c);
128 static void __init boot_flags_init(char *commands)
131 /* Move to the start of the next "argument". */
132 while (*commands && *commands == ' ')
135 /* Process any command switches, otherwise skip it. */
136 if (*commands == '\0')
138 if (*commands == '-') {
140 while (*commands && *commands != ' ')
141 process_switch(*commands++);
144 if (!strncmp(commands, "mem=", 4)) {
146 * "mem=XXX[kKmM]" overrides the PROM-reported
149 cmdline_memory_size = simple_strtoul(commands + 4,
151 if (*commands == 'K' || *commands == 'k') {
152 cmdline_memory_size <<= 10;
154 } else if (*commands=='M' || *commands=='m') {
155 cmdline_memory_size <<= 20;
159 while (*commands && *commands != ' ')
164 extern unsigned short root_flags;
165 extern unsigned short root_dev;
166 extern unsigned short ram_flags;
167 #define RAMDISK_IMAGE_START_MASK 0x07FF
168 #define RAMDISK_PROMPT_FLAG 0x8000
169 #define RAMDISK_LOAD_FLAG 0x4000
171 extern int root_mountflags;
173 char reboot_command[COMMAND_LINE_SIZE];
175 static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 };
177 void __init per_cpu_patch(void)
179 struct cpuid_patch_entry *p;
183 if (tlb_type == spitfire && !this_is_starfire)
187 if (tlb_type != hypervisor) {
188 __asm__ ("rdpr %%ver, %0" : "=r" (ver));
189 is_jbus = ((ver >> 32UL) == __JALAPENO_ID ||
190 (ver >> 32UL) == __SERRANO_ID);
194 while (p < &__cpuid_patch_end) {
195 unsigned long addr = p->addr;
200 insns = &p->starfire[0];
205 insns = &p->cheetah_jbus[0];
207 insns = &p->cheetah_safari[0];
210 insns = &p->sun4v[0];
213 prom_printf("Unknown cpu type, halting.\n");
217 *(unsigned int *) (addr + 0) = insns[0];
219 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
221 *(unsigned int *) (addr + 4) = insns[1];
223 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
225 *(unsigned int *) (addr + 8) = insns[2];
227 __asm__ __volatile__("flush %0" : : "r" (addr + 8));
229 *(unsigned int *) (addr + 12) = insns[3];
231 __asm__ __volatile__("flush %0" : : "r" (addr + 12));
237 void __init sun4v_patch(void)
239 extern void sun4v_hvapi_init(void);
240 struct sun4v_1insn_patch_entry *p1;
241 struct sun4v_2insn_patch_entry *p2;
243 if (tlb_type != hypervisor)
246 p1 = &__sun4v_1insn_patch;
247 while (p1 < &__sun4v_1insn_patch_end) {
248 unsigned long addr = p1->addr;
250 *(unsigned int *) (addr + 0) = p1->insn;
252 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
257 p2 = &__sun4v_2insn_patch;
258 while (p2 < &__sun4v_2insn_patch_end) {
259 unsigned long addr = p2->addr;
261 *(unsigned int *) (addr + 0) = p2->insns[0];
263 __asm__ __volatile__("flush %0" : : "r" (addr + 0));
265 *(unsigned int *) (addr + 4) = p2->insns[1];
267 __asm__ __volatile__("flush %0" : : "r" (addr + 4));
275 static void __init popc_patch(void)
277 struct popc_3insn_patch_entry *p3;
278 struct popc_6insn_patch_entry *p6;
280 p3 = &__popc_3insn_patch;
281 while (p3 < &__popc_3insn_patch_end) {
282 unsigned long i, addr = p3->addr;
284 for (i = 0; i < 3; i++) {
285 *(unsigned int *) (addr + (i * 4)) = p3->insns[i];
287 __asm__ __volatile__("flush %0"
288 : : "r" (addr + (i * 4)));
294 p6 = &__popc_6insn_patch;
295 while (p6 < &__popc_6insn_patch_end) {
296 unsigned long i, addr = p6->addr;
298 for (i = 0; i < 6; i++) {
299 *(unsigned int *) (addr + (i * 4)) = p6->insns[i];
301 __asm__ __volatile__("flush %0"
302 : : "r" (addr + (i * 4)));
310 void __init boot_cpu_id_too_large(int cpu)
312 prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n",
318 /* On Ultra, we support all of the v8 capabilities. */
319 unsigned long sparc64_elf_hwcap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
320 HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV |
322 EXPORT_SYMBOL(sparc64_elf_hwcap);
324 static const char *hwcaps[] = {
325 "flush", "stbar", "swap", "muldiv", "v9",
326 "ultra3", "blkinit", "n2",
328 /* These strings are as they appear in the machine description
329 * 'hwcap-list' property for cpu nodes.
331 "mul32", "div32", "fsmuld", "v8plus", "popc", "vis", "vis2",
332 "ASIBlkInit", "fmaf", "vis3", "hpc", "random", "trans", "fjfmau",
336 void cpucap_info(struct seq_file *m)
338 unsigned long caps = sparc64_elf_hwcap;
341 seq_puts(m, "cpucaps\t\t: ");
342 for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
343 unsigned long bit = 1UL << i;
345 seq_printf(m, "%s%s",
346 printed ? "," : "", hwcaps[i]);
353 static void __init report_hwcaps(unsigned long caps)
357 printk(KERN_INFO "CPU CAPS: [");
358 for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
359 unsigned long bit = 1UL << i;
361 printk(KERN_CONT "%s%s",
362 printed ? "," : "", hwcaps[i]);
363 if (++printed == 8) {
364 printk(KERN_CONT "]\n");
365 printk(KERN_INFO "CPU CAPS: [");
370 printk(KERN_CONT "]\n");
373 static unsigned long __init mdesc_cpu_hwcap_list(void)
375 struct mdesc_handle *hp;
376 unsigned long caps = 0;
385 pn = mdesc_node_by_name(hp, MDESC_NODE_NULL, "cpu");
386 if (pn == MDESC_NODE_NULL)
389 prop = mdesc_get_property(hp, pn, "hwcap-list", &len);
396 for (i = 0; i < ARRAY_SIZE(hwcaps); i++) {
397 unsigned long bit = 1UL << i;
399 if (!strcmp(prop, hwcaps[i])) {
405 plen = strlen(prop) + 1;
415 /* This yields a mask that user programs can use to figure out what
416 * instruction set this cpu supports.
418 static void __init init_sparc64_elf_hwcap(void)
420 unsigned long cap = sparc64_elf_hwcap;
421 unsigned long mdesc_caps;
423 if (tlb_type == cheetah || tlb_type == cheetah_plus)
424 cap |= HWCAP_SPARC_ULTRA3;
425 else if (tlb_type == hypervisor) {
426 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
427 sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
428 sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
429 cap |= HWCAP_SPARC_BLKINIT;
430 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
431 sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
432 cap |= HWCAP_SPARC_N2;
435 cap |= (AV_SPARC_MUL32 | AV_SPARC_DIV32 | AV_SPARC_V8PLUS);
437 mdesc_caps = mdesc_cpu_hwcap_list();
439 if (tlb_type == spitfire)
441 if (tlb_type == cheetah || tlb_type == cheetah_plus)
442 cap |= AV_SPARC_VIS | AV_SPARC_VIS2;
443 if (tlb_type == cheetah_plus) {
444 unsigned long impl, ver;
446 __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
447 impl = ((ver >> 32) & 0xffff);
448 if (impl == PANTHER_IMPL)
449 cap |= AV_SPARC_POPC;
451 if (tlb_type == hypervisor) {
452 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1)
453 cap |= AV_SPARC_ASI_BLK_INIT;
454 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
455 sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
456 cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
457 AV_SPARC_ASI_BLK_INIT |
459 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
460 cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
464 sparc64_elf_hwcap = cap | mdesc_caps;
466 report_hwcaps(sparc64_elf_hwcap);
468 if (sparc64_elf_hwcap & AV_SPARC_POPC)
472 void __init setup_arch(char **cmdline_p)
474 /* Initialize PROM console and command line. */
475 *cmdline_p = prom_getbootargs();
476 strcpy(boot_command_line, *cmdline_p);
479 boot_flags_init(*cmdline_p);
480 #ifdef CONFIG_EARLYFB
481 if (btext_find_display())
483 register_console(&prom_early_console);
485 if (tlb_type == hypervisor)
486 printk("ARCH: SUN4V\n");
488 printk("ARCH: SUN4U\n");
490 #ifdef CONFIG_DUMMY_CONSOLE
491 conswitchp = &dummy_con;
497 root_mountflags &= ~MS_RDONLY;
498 ROOT_DEV = old_decode_dev(root_dev);
499 #ifdef CONFIG_BLK_DEV_RAM
500 rd_image_start = ram_flags & RAMDISK_IMAGE_START_MASK;
501 rd_prompt = ((ram_flags & RAMDISK_PROMPT_FLAG) != 0);
502 rd_doload = ((ram_flags & RAMDISK_LOAD_FLAG) != 0);
505 task_thread_info(&init_task)->kregs = &fake_swapper_regs;
508 if (!ic_set_manually) {
509 phandle chosen = prom_finddevice("/chosen");
512 cl = prom_getintdefault (chosen, "client-ip", 0);
513 sv = prom_getintdefault (chosen, "server-ip", 0);
514 gw = prom_getintdefault (chosen, "gateway-ip", 0);
520 #if defined(CONFIG_IP_PNP_BOOTP) || defined(CONFIG_IP_PNP_RARP)
521 ic_proto_enabled = 0;
527 /* Get boot processor trap_block[] setup. */
528 init_cur_cpu_trap(current_thread_info());
531 init_sparc64_elf_hwcap();
534 extern int stop_a_enabled;
536 void sun_do_break(void)
542 flush_user_windows();
546 EXPORT_SYMBOL(sun_do_break);
548 int stop_a_enabled = 1;
549 EXPORT_SYMBOL(stop_a_enabled);