1 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
10 #include <linux/linkage.h>
11 #include <linux/errno.h>
16 #include <asm/contregs.h>
17 #include <asm/ptrace.h>
18 #include <asm/asm-offsets.h>
20 #include <asm/vaddrs.h>
22 #include <asm/pgtable.h>
23 #include <asm/winmacro.h>
24 #include <asm/signal.h>
27 #include <asm/thread_info.h>
28 #include <asm/param.h>
29 #include <asm/unistd.h>
31 #include <asm/asmmacro.h>
35 /* These are just handy. */
36 #define _SV save %sp, -STACKFRAME_SZ, %sp
39 #define FLUSH_ALL_KERNEL_WINDOWS \
40 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
41 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
47 .globl arch_kgdb_breakpoint
48 .type arch_kgdb_breakpoint,#function
53 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
56 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
61 * This code cannot touch registers %l0 %l1 and %l2
62 * because SAVE_ALL depends on their values. It depends
63 * on %l3 also, but we regenerate it before a call.
64 * Other registers are:
65 * %l3 -- base address of fdc registers
67 * %l5 -- scratch for ld/st address
69 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
72 /* Do we have work to do? */
73 sethi %hi(doing_pdma), %l7
74 ld [%l7 + %lo(doing_pdma)], %l7
79 /* Load fdc register base */
80 sethi %hi(fdc_status), %l3
81 ld [%l3 + %lo(fdc_status)], %l3
83 /* Setup register addresses */
84 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
85 ld [%l5 + %lo(pdma_vaddr)], %l4
86 sethi %hi(pdma_size), %l5 ! bytes to go
87 ld [%l5 + %lo(pdma_size)], %l6
91 andcc %l7, 0x80, %g0 ! Does fifo still have data
92 bz floppy_fifo_emptied ! fifo has been emptied...
93 andcc %l7, 0x20, %g0 ! in non-dma mode still?
94 bz floppy_overrun ! nope, overrun
95 andcc %l7, 0x40, %g0 ! 0=write 1=read
99 /* Ok, actually read this byte */
110 /* Ok, actually write this byte */
117 /* fall through... */
119 sethi %hi(pdma_vaddr), %l5
120 st %l4, [%l5 + %lo(pdma_vaddr)]
121 sethi %hi(pdma_size), %l5
122 st %l6, [%l5 + %lo(pdma_size)]
123 /* Flip terminal count pin */
124 set auxio_register, %l7
134 /* Kill some time so the bits set */
140 /* Prevent recursion */
141 sethi %hi(doing_pdma), %l7
143 st %g0, [%l7 + %lo(doing_pdma)]
145 /* We emptied the FIFO, but we haven't read everything
146 * as of yet. Store the current transfer address and
147 * bytes left to read so we can continue when the next
151 sethi %hi(pdma_vaddr), %l5
152 st %l4, [%l5 + %lo(pdma_vaddr)]
153 sethi %hi(pdma_size), %l7
154 st %l6, [%l7 + %lo(pdma_size)]
156 /* Restore condition codes */
164 sethi %hi(pdma_vaddr), %l5
165 st %l4, [%l5 + %lo(pdma_vaddr)]
166 sethi %hi(pdma_size), %l5
167 st %l6, [%l5 + %lo(pdma_size)]
168 /* Prevent recursion */
169 sethi %hi(doing_pdma), %l7
170 st %g0, [%l7 + %lo(doing_pdma)]
172 /* fall through... */
177 /* Set all IRQs off. */
184 mov 11, %o0 ! floppy irq level (unused anyway)
185 mov %g0, %o1 ! devid is not used in fast interrupts
186 call sparc_floppy_irq
187 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
191 #endif /* (CONFIG_BLK_DEV_FD) */
193 /* Bad trap handler */
194 .globl bad_trap_handler
201 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
203 mov %l7, %o1 ! trap number
207 /* For now all IRQ's not registered get sent here. handler_irq() will
208 * see if a routine is registered to handle this interrupt and if not
209 * it will say so on the console.
213 .globl real_irq_entry, patch_handler_irq
218 .globl patchme_maybe_smp_msg
221 patchme_maybe_smp_msg:
232 mov %l7, %o0 ! irq level
235 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
236 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
237 wr %g2, PSR_ET, %psr ! keep ET up
243 /* SMP per-cpu ticker interrupts are handled specially. */
245 bne real_irq_continue+4
251 call smp4m_percpu_timer_interrupt
252 add %sp, STACKFRAME_SZ, %o0
257 /* Here is where we check for possible SMP IPI passed to us
258 * on some level other than 15 which is the NMI and only used
259 * for cross calls. That has a separate entry point below.
261 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
264 GET_PROCESSOR4M_ID(o3)
265 sethi %hi(sun4m_irq_percpu), %l5
267 or %l5, %lo(sun4m_irq_percpu), %o5
268 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
270 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
275 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
277 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
284 srl %o3, 28, %o2 ! shift for simpler checks below
285 maybe_smp4m_msg_check_single:
287 beq,a maybe_smp4m_msg_check_mask
289 call smp_call_function_single_interrupt
292 maybe_smp4m_msg_check_mask:
293 beq,a maybe_smp4m_msg_check_resched
295 call smp_call_function_interrupt
298 maybe_smp4m_msg_check_resched:
299 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
300 beq,a maybe_smp4m_msg_out
302 call smp_resched_interrupt
308 .globl linux_trap_ipi15_sun4m
309 linux_trap_ipi15_sun4m:
311 sethi %hi(0x80000000), %o2
312 GET_PROCESSOR4M_ID(o0)
313 sethi %hi(sun4m_irq_percpu), %l5
314 or %l5, %lo(sun4m_irq_percpu), %o5
317 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
319 be sun4m_nmi_error ! Must be an NMI async memory error
320 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
322 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
329 call smp4m_cross_call_irq
331 b ret_trap_lockless_ipi
335 /* SMP per-cpu ticker interrupts are handled specially. */
339 sethi %hi(CC_ICLR), %o0
340 sethi %hi(1 << 14), %o1
341 or %o0, %lo(CC_ICLR), %o0
342 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
347 call smp4d_percpu_timer_interrupt
348 add %sp, STACKFRAME_SZ, %o0
354 .globl linux_trap_ipi15_sun4d
355 linux_trap_ipi15_sun4d:
357 sethi %hi(CC_BASE), %o4
358 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
359 or %o4, (CC_EREG - CC_BASE), %o0
360 ldda [%o0] ASI_M_MXCC, %o0
363 sethi %hi(BB_STAT2), %o2
364 lduba [%o2] ASI_M_CTL, %o2
365 andcc %o2, BB_STAT2_MASK, %g0
367 or %o4, (CC_ICLR - CC_BASE), %o0
368 sethi %hi(1 << 15), %o1
369 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
375 call smp4d_cross_call_irq
377 b ret_trap_lockless_ipi
384 lduha [%l4] ASI_M_MXCC, %l5
385 sethi %hi(1 << 15), %l7
387 stha %l5, [%l4] ASI_M_MXCC
391 #ifdef CONFIG_SPARC_LEON
393 .extern leon_ipi_interrupt
394 /* SMP per-cpu IPI interrupts are handled specially. */
402 call leonsmp_ipi_interrupt
403 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
409 .globl linux_trap_ipi15_leon
410 linux_trap_ipi15_leon:
417 call leon_cross_call_irq
419 b ret_trap_lockless_ipi
422 #endif /* CONFIG_SPARC_LEON */
424 #endif /* CONFIG_SMP */
426 /* This routine handles illegal instructions and privileged
427 * instruction attempts from user code.
430 .globl bad_instruction
432 sethi %hi(0xc1f80000), %l4
434 sethi %hi(0x81d80000), %l7
440 wr %l0, PSR_ET, %psr ! re-enable traps
443 add %sp, STACKFRAME_SZ, %o0
446 call do_illegal_instruction
451 1: /* unimplemented flush - just skip */
456 .globl priv_instruction
463 add %sp, STACKFRAME_SZ, %o0
466 call do_priv_instruction
471 /* This routine handles unaligned data accesses. */
475 andcc %l0, PSR_PS, %g0
485 call kernel_unaligned_trap
486 add %sp, STACKFRAME_SZ, %o0
493 wr %l0, PSR_ET, %psr ! re-enable traps
497 call user_unaligned_trap
498 add %sp, STACKFRAME_SZ, %o0
502 /* This routine handles floating point disabled traps. */
504 .globl fpd_trap_handler
508 wr %l0, PSR_ET, %psr ! re-enable traps
511 add %sp, STACKFRAME_SZ, %o0
519 /* This routine handles Floating Point Exceptions. */
521 .globl fpe_trap_handler
523 set fpsave_magic, %l5
526 sethi %hi(fpsave), %l5
527 or %l5, %lo(fpsave), %l5
530 sethi %hi(fpsave_catch2), %l5
531 or %l5, %lo(fpsave_catch2), %l5
537 sethi %hi(fpsave_catch), %l5
538 or %l5, %lo(fpsave_catch), %l5
547 wr %l0, PSR_ET, %psr ! re-enable traps
550 add %sp, STACKFRAME_SZ, %o0
558 /* This routine handles Tag Overflow Exceptions. */
560 .globl do_tag_overflow
564 wr %l0, PSR_ET, %psr ! re-enable traps
567 add %sp, STACKFRAME_SZ, %o0
570 call handle_tag_overflow
575 /* This routine handles Watchpoint Exceptions. */
581 wr %l0, PSR_ET, %psr ! re-enable traps
584 add %sp, STACKFRAME_SZ, %o0
587 call handle_watchpoint
592 /* This routine handles Register Access Exceptions. */
598 wr %l0, PSR_ET, %psr ! re-enable traps
601 add %sp, STACKFRAME_SZ, %o0
604 call handle_reg_access
609 /* This routine handles Co-Processor Disabled Exceptions. */
611 .globl do_cp_disabled
615 wr %l0, PSR_ET, %psr ! re-enable traps
618 add %sp, STACKFRAME_SZ, %o0
621 call handle_cp_disabled
626 /* This routine handles Co-Processor Exceptions. */
628 .globl do_cp_exception
632 wr %l0, PSR_ET, %psr ! re-enable traps
635 add %sp, STACKFRAME_SZ, %o0
638 call handle_cp_exception
643 /* This routine handles Hardware Divide By Zero Exceptions. */
649 wr %l0, PSR_ET, %psr ! re-enable traps
652 add %sp, STACKFRAME_SZ, %o0
655 call handle_hw_divzero
661 .globl do_flush_windows
668 andcc %l0, PSR_PS, %g0
672 call flush_user_windows
675 /* Advance over the trap instruction. */
676 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
678 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
679 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
683 .globl flush_patch_one
685 /* We get these for debugging routines using __builtin_return_address() */
688 FLUSH_ALL_KERNEL_WINDOWS
690 /* Advance over the trap instruction. */
691 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
693 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
694 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
698 /* The getcc software trap. The user wants the condition codes from
699 * the %psr in register %g1.
703 .globl getcc_trap_handler
705 srl %l0, 20, %g1 ! give user
706 and %g1, 0xf, %g1 ! only ICC bits in %psr
707 jmp %l2 ! advance over trap instruction
708 rett %l2 + 0x4 ! like this...
710 /* The setcc software trap. The user has condition codes in %g1
711 * that it would like placed in the %psr. Be careful not to flip
712 * any unintentional bits!
716 .globl setcc_trap_handler
720 andn %l0, %l5, %l0 ! clear ICC bits in %psr
721 and %l4, %l5, %l4 ! clear non-ICC bits in user value
722 or %l4, %l0, %l4 ! or them in... mix mix mix
724 wr %l4, 0x0, %psr ! set new %psr
725 WRITE_PAUSE ! TI scumbags...
727 jmp %l2 ! advance over trap instruction
728 rett %l2 + 0x4 ! like this...
731 /* NMI async memory error handling. */
732 sethi %hi(0x80000000), %l4
733 sethi %hi(sun4m_irq_global), %o5
734 ld [%o5 + %lo(sun4m_irq_global)], %l5
735 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
737 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
746 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
748 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
754 .globl linux_trap_ipi15_sun4m
755 linux_trap_ipi15_sun4m:
760 #endif /* CONFIG_SMP */
768 lda [%l5] ASI_M_MMUREGS, %l6 ! read sfar first
769 lda [%l4] ASI_M_MMUREGS, %l5 ! read sfsr last
772 srl %l5, 6, %l5 ! and encode all info into l7
777 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
783 and %o1, 1, %o1 ! arg2 = text_faultp
785 and %o2, 2, %o2 ! arg3 = writep
786 andn %o3, 0xfff, %o3 ! arg4 = faulting address
792 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
797 .globl sys_nis_syscall
800 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
801 call c_sys_nis_syscall
808 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
814 st %g0, [%sp + STACKFRAME_SZ + PT_I2]
817 add %sp, STACKFRAME_SZ, %o0
820 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
823 .globl sys_sparc_pipe
826 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
831 .globl sys_sigaltstack
850 add %sp, STACKFRAME_SZ, %o0
852 ld [%curptr + TI_FLAGS], %l5
853 andcc %l5, _TIF_SYSCALL_TRACE, %g0
861 /* We don't want to muck with user registers like a
862 * normal syscall, just return.
867 .globl sys_rt_sigreturn
870 add %sp, STACKFRAME_SZ, %o0
872 ld [%curptr + TI_FLAGS], %l5
873 andcc %l5, _TIF_SYSCALL_TRACE, %g0
877 add %sp, STACKFRAME_SZ, %o0
882 /* We are returning to a signal handler. */
885 /* Now that we have a real sys_clone, sys_fork() is
886 * implemented in terms of it. Our _real_ implementation
887 * of SunOS vfork() will use sys_vfork().
889 * XXX These three should be consolidated into mostly shared
890 * XXX code just like on sparc64... -DaveM
893 .globl sys_fork, flush_patch_two
897 FLUSH_ALL_KERNEL_WINDOWS;
898 ld [%curptr + TI_TASK], %o4
901 mov SIGCHLD, %o0 ! arg0: clone flags
904 mov %fp, %o1 ! arg1: usp
905 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
906 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
911 /* Whee, kernel threads! */
912 .globl sys_clone, flush_patch_three
916 FLUSH_ALL_KERNEL_WINDOWS;
917 ld [%curptr + TI_TASK], %o4
921 /* arg0,1: flags,usp -- loaded already */
922 cmp %o1, 0x0 ! Is new_usp NULL?
926 mov %fp, %o1 ! yes, use callers usp
927 andn %o1, 7, %o1 ! no, align to 8 bytes
929 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
930 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
935 /* Whee, real vfork! */
936 .globl sys_vfork, flush_patch_four
939 FLUSH_ALL_KERNEL_WINDOWS;
940 ld [%curptr + TI_TASK], %o4
945 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
946 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
948 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
949 sethi %hi(sparc_do_fork), %l1
951 jmpl %l1 + %lo(sparc_do_fork), %g0
952 add %sp, STACKFRAME_SZ, %o2
955 linux_sparc_ni_syscall:
956 sethi %hi(sys_ni_syscall), %l7
957 b syscall_is_too_hard
958 or %l7, %lo(sys_ni_syscall), %l7
969 add %sp, STACKFRAME_SZ, %o0
985 ld [%g3 + TI_TASK], %o0
987 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
989 /* Linux native system calls enter here... */
991 .globl linux_sparc_syscall
993 sethi %hi(PSR_SYSCALL), %l4
995 /* Direct access to user regs, must faster. */
997 bgeu linux_sparc_ni_syscall
1001 bne linux_fast_syscall
1002 /* Just do first insn from SAVE_ALL in the delay slot */
1004 syscall_is_too_hard:
1008 wr %l0, PSR_ET, %psr
1013 ld [%curptr + TI_FLAGS], %l5
1015 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1017 bne linux_syscall_trace
1024 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1027 ld [%curptr + TI_FLAGS], %l6
1028 cmp %o0, -ERESTART_RESTARTBLOCK
1029 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1032 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1034 /* System call success, clear Carry condition code. */
1037 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1038 bne linux_syscall_trace2
1039 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1040 add %l1, 0x4, %l2 /* npc = npc+4 */
1041 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1043 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1045 /* System call failure, set Carry condition code.
1046 * Also, get abs(errno) to return to the process.
1050 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1052 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1053 bne linux_syscall_trace2
1054 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1055 add %l1, 0x4, %l2 /* npc = npc+4 */
1056 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1058 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1060 linux_syscall_trace2:
1061 add %sp, STACKFRAME_SZ, %o0
1064 add %l1, 0x4, %l2 /* npc = npc+4 */
1065 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1067 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1070 /* Saving and restoring the FPU state is best done from lowlevel code.
1072 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1073 * void *fpqueue, unsigned long *fpqdepth)
1078 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1085 /* We have an fpqueue to save. */
1099 std %f0, [%o0 + 0x00]
1100 std %f2, [%o0 + 0x08]
1101 std %f4, [%o0 + 0x10]
1102 std %f6, [%o0 + 0x18]
1103 std %f8, [%o0 + 0x20]
1104 std %f10, [%o0 + 0x28]
1105 std %f12, [%o0 + 0x30]
1106 std %f14, [%o0 + 0x38]
1107 std %f16, [%o0 + 0x40]
1108 std %f18, [%o0 + 0x48]
1109 std %f20, [%o0 + 0x50]
1110 std %f22, [%o0 + 0x58]
1111 std %f24, [%o0 + 0x60]
1112 std %f26, [%o0 + 0x68]
1113 std %f28, [%o0 + 0x70]
1115 std %f30, [%o0 + 0x78]
1117 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1118 * code for pointing out this possible deadlock, while we save state
1119 * above we could trap on the fsr store so our low level fpu trap
1120 * code has to know how to deal with this.
1130 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1134 ldd [%o0 + 0x00], %f0
1135 ldd [%o0 + 0x08], %f2
1136 ldd [%o0 + 0x10], %f4
1137 ldd [%o0 + 0x18], %f6
1138 ldd [%o0 + 0x20], %f8
1139 ldd [%o0 + 0x28], %f10
1140 ldd [%o0 + 0x30], %f12
1141 ldd [%o0 + 0x38], %f14
1142 ldd [%o0 + 0x40], %f16
1143 ldd [%o0 + 0x48], %f18
1144 ldd [%o0 + 0x50], %f20
1145 ldd [%o0 + 0x58], %f22
1146 ldd [%o0 + 0x60], %f24
1147 ldd [%o0 + 0x68], %f26
1148 ldd [%o0 + 0x70], %f28
1149 ldd [%o0 + 0x78], %f30
1154 /* __ndelay and __udelay take two arguments:
1155 * 0 - nsecs or usecs to delay
1156 * 1 - per_cpu udelay_val (loops per jiffy)
1158 * Note that ndelay gives HZ times higher resolution but has a 10ms
1159 * limit. udelay can handle up to 1s.
1163 save %sp, -STACKFRAME_SZ, %sp
1164 mov %i0, %o0 ! round multiplier up so large ns ok
1165 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1168 mov %i1, %o1 ! udelay_val
1172 mov %o1, %o0 ! >>32 later for better resolution
1176 save %sp, -STACKFRAME_SZ, %sp
1178 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1179 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1182 mov %i1, %o1 ! udelay_val
1185 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1186 or %g0, %lo(0x028f4b62), %l0
1187 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1191 mov HZ, %o0 ! >>32 earlier for wider range
1204 /* Handle a software breakpoint */
1205 /* We have to inform parent that child has stopped */
1207 .globl breakpoint_trap
1211 wr %l0, PSR_ET, %psr
1214 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1215 call sparc_breakpoint
1216 add %sp, STACKFRAME_SZ, %o0
1222 .globl kgdb_trap_low
1223 .type kgdb_trap_low,#function
1227 wr %l0, PSR_ET, %psr
1231 add %sp, STACKFRAME_SZ, %o0
1234 .size kgdb_trap_low,.-kgdb_trap_low
1238 .globl flush_patch_exception
1239 flush_patch_exception:
1240 FLUSH_ALL_KERNEL_WINDOWS;
1242 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1243 mov 1, %g1 ! signal EFAULT condition
1246 .globl kill_user_windows, kuw_patch1_7win
1248 kuw_patch1_7win: sll %o3, 6, %o3
1250 /* No matter how much overhead this routine has in the worst
1251 * case scenerio, it is several times better than taking the
1252 * traps with the old method of just doing flush_user_windows().
1255 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1256 orcc %g0, %o0, %g0 ! if no bits set, we are done
1257 be 3f ! nothing to do
1258 rd %psr, %o5 ! must clear interrupts
1259 or %o5, PSR_PIL, %o4 ! or else that could change
1260 wr %o4, 0x0, %psr ! the uwinmask state
1261 WRITE_PAUSE ! burn them cycles
1263 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1264 orcc %g0, %o0, %g0 ! did an interrupt come in?
1265 be 4f ! yep, we are done
1266 rd %wim, %o3 ! get current wim
1267 srl %o3, 1, %o4 ! simulate a save
1269 sll %o3, 7, %o3 ! compute next wim
1270 or %o4, %o3, %o3 ! result
1271 andncc %o0, %o3, %o0 ! clean this bit in umask
1272 bne kuw_patch1 ! not done yet
1273 srl %o3, 1, %o4 ! begin another save simulation
1274 wr %o3, 0x0, %wim ! set the new wim
1275 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
1277 wr %o5, 0x0, %psr ! re-enable interrupts
1278 WRITE_PAUSE ! burn baby burn
1281 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1284 .globl restore_current
1286 LOAD_CURRENT(g6, o0)
1290 #ifdef CONFIG_PCIC_PCI
1291 #include <asm/pcic.h>
1294 .globl linux_trap_ipi15_pcic
1295 linux_trap_ipi15_pcic:
1300 * First deactivate NMI
1301 * or we cannot drop ET, cannot get window spill traps.
1302 * The busy loop is necessary because the PIO error
1303 * sometimes does not go away quickly and we trap again.
1305 sethi %hi(pcic_regs), %o1
1306 ld [%o1 + %lo(pcic_regs)], %o2
1308 ! Get pending status for printouts later.
1309 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1311 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1312 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
1314 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1315 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1319 or %l0, PSR_PIL, %l4
1322 wr %l4, PSR_ET, %psr
1326 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1329 .globl pcic_nmi_trap_patch
1330 pcic_nmi_trap_patch:
1331 sethi %hi(linux_trap_ipi15_pcic), %l3
1332 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1336 #endif /* CONFIG_PCIC_PCI */
1340 save %sp, -0x40, %sp
1341 save %sp, -0x40, %sp
1342 save %sp, -0x40, %sp
1343 save %sp, -0x40, %sp
1344 save %sp, -0x40, %sp
1345 save %sp, -0x40, %sp
1346 save %sp, -0x40, %sp
1357 ENTRY(hard_smp_processor_id)
1361 .section .cpuid_patch, "ax"
1362 /* Instruction location. */
1364 /* SUN4D implementation. */
1365 lda [%g0] ASI_M_VIKING_TMP1, %o0
1368 /* LEON implementation. */
1375 ENDPROC(hard_smp_processor_id)
1378 /* End of entry.S */