2 * Page fault handler for SH with an MMU.
4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 Paul Mundt
7 * Based on linux/arch/i386/mm/fault.c:
8 * Copyright (C) 1995 Linus Torvalds
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
14 #include <linux/kernel.h>
16 #include <linux/hardirq.h>
17 #include <linux/kprobes.h>
18 #include <asm/system.h>
19 #include <asm/mmu_context.h>
22 extern void die(const char *,struct pt_regs *,long);
25 * This routine handles page faults. It determines the address,
26 * and the problem, and then passes it off to one of the appropriate
29 asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
30 unsigned long writeaccess,
31 unsigned long address)
33 struct task_struct *tsk;
35 struct vm_area_struct * vma;
41 if (kgdb_nofault && kgdb_bus_err_hook)
47 si_code = SEGV_MAPERR;
50 * If we're in an interrupt or have no user
51 * context, we must not take the fault..
53 if (in_atomic() || !mm)
56 down_read(&mm->mmap_sem);
58 vma = find_vma(mm, address);
61 if (vma->vm_start <= address)
63 if (!(vma->vm_flags & VM_GROWSDOWN))
65 if (expand_stack(vma, address))
68 * Ok, we have a good vm_area for this memory access, so
72 si_code = SEGV_ACCERR;
74 if (!(vma->vm_flags & VM_WRITE))
77 if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
82 * If for any reason at all we couldn't handle the fault,
83 * make sure we exit gracefully rather than endlessly redo
87 switch (handle_mm_fault(mm, vma, address, writeaccess)) {
102 up_read(&mm->mmap_sem);
106 * Something tried to access memory that isn't in our memory map..
107 * Fix it, but check if it's kernel or user first..
110 up_read(&mm->mmap_sem);
112 if (user_mode(regs)) {
113 info.si_signo = SIGSEGV;
115 info.si_code = si_code;
116 info.si_addr = (void *) address;
117 force_sig_info(SIGSEGV, &info, tsk);
122 /* Are we prepared to handle this kernel fault? */
123 if (fixup_exception(regs))
127 * Oops. The kernel tried to access some bad page. We'll have to
128 * terminate things with extreme prejudice.
131 if (address < PAGE_SIZE)
132 printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
134 printk(KERN_ALERT "Unable to handle kernel paging request");
135 printk(" at virtual address %08lx\n", address);
136 printk(KERN_ALERT "pc = %08lx\n", regs->pc);
137 asm volatile("mov.l %1, %0"
139 : "m" (__m(MMU_TTB)));
141 page = ((unsigned long *) page)[address >> 22];
142 printk(KERN_ALERT "*pde = %08lx\n", page);
143 if (page & _PAGE_PRESENT) {
145 address &= 0x003ff000;
146 page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
147 printk(KERN_ALERT "*pte = %08lx\n", page);
150 die("Oops", regs, writeaccess);
154 * We ran out of memory, or some other thing happened to us that made
155 * us unable to handle the page fault gracefully.
158 up_read(&mm->mmap_sem);
159 if (is_init(current)) {
161 down_read(&mm->mmap_sem);
164 printk("VM: killing process %s\n", tsk->comm);
170 up_read(&mm->mmap_sem);
173 * Send a sigbus, regardless of whether we were in kernel
176 info.si_signo = SIGBUS;
178 info.si_code = BUS_ADRERR;
179 info.si_addr = (void *)address;
180 force_sig_info(SIGBUS, &info, tsk);
182 /* Kernel mode? Handle exceptions or die */
183 if (!user_mode(regs))
187 #ifdef CONFIG_SH_STORE_QUEUES
189 * This is a special case for the SH-4 store queues, as pages for this
190 * space still need to be faulted in before it's possible to flush the
191 * store queue cache for writeout to the remapped region.
193 #define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000)
195 #define P3_ADDR_MAX P4SEG
199 * Called with interrupts disabled.
201 asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
202 unsigned long writeaccess,
203 unsigned long address)
210 struct mm_struct *mm = current->mm;
214 #ifdef CONFIG_SH_KGDB
215 if (kgdb_nofault && kgdb_bus_err_hook)
220 * We don't take page faults for P1, P2, and parts of P4, these
221 * are always mapped, whether it be due to legacy behaviour in
222 * 29-bit mode, or due to PMB configuration in 32-bit mode.
224 if (address >= P3SEG && address < P3_ADDR_MAX) {
225 pgd = pgd_offset_k(address);
228 if (unlikely(address >= TASK_SIZE || !mm))
231 pgd = pgd_offset(mm, address);
234 pud = pud_offset(pgd, address);
235 if (pud_none_or_clear_bad(pud))
237 pmd = pmd_offset(pud, address);
238 if (pmd_none_or_clear_bad(pmd))
242 pte = pte_offset_map_lock(mm, pmd, address, &ptl);
244 pte = pte_offset_kernel(pmd, address);
247 if (unlikely(pte_none(entry) || pte_not_present(entry)))
249 if (unlikely(writeaccess && !pte_write(entry)))
253 entry = pte_mkdirty(entry);
254 entry = pte_mkyoung(entry);
256 #ifdef CONFIG_CPU_SH4
258 * ITLB is not affected by "ldtlb" instruction.
259 * So, we need to flush the entry by ourselves.
261 __flush_tlb_page(get_asid(), address & PAGE_MASK);
265 update_mmu_cache(NULL, address, entry);
269 pte_unmap_unlock(pte, ptl);