2 * 'traps.c' handles hardware traps and faults after we have saved some
5 * SuperH version: Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2000 Philipp Rumpf
7 * Copyright (C) 2000 David Howells
8 * Copyright (C) 2002 - 2006 Paul Mundt
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
14 #include <linux/kernel.h>
15 #include <linux/ptrace.h>
16 #include <linux/init.h>
17 #include <linux/spinlock.h>
18 #include <linux/module.h>
19 #include <linux/kallsyms.h>
21 #include <asm/system.h>
22 #include <asm/uaccess.h>
26 #define CHK_REMOTE_DEBUG(regs) \
28 if (kgdb_debug_hook && !user_mode(regs))\
29 (*kgdb_debug_hook)(regs); \
32 #define CHK_REMOTE_DEBUG(regs)
36 # define TRAP_RESERVED_INST 4
37 # define TRAP_ILLEGAL_SLOT_INST 6
38 # define TRAP_ADDRESS_ERROR 9
39 # ifdef CONFIG_CPU_SH2A
40 # define TRAP_DIVZERO_ERROR 17
41 # define TRAP_DIVOVF_ERROR 18
44 #define TRAP_RESERVED_INST 12
45 #define TRAP_ILLEGAL_SLOT_INST 13
48 static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
53 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
55 for (p = bottom & ~31; p < top; ) {
56 printk("%04lx: ", p & 0xffff);
58 for (i = 0; i < 8; i++, p += 4) {
61 if (p < bottom || p >= top)
64 if (__get_user(val, (unsigned int __user *)p)) {
75 DEFINE_SPINLOCK(die_lock);
77 void die(const char * str, struct pt_regs * regs, long err)
79 static int die_counter;
82 spin_lock_irq(&die_lock);
85 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
87 CHK_REMOTE_DEBUG(regs);
91 printk("Process: %s (pid: %d, stack limit = %p)\n",
92 current->comm, current->pid, task_stack_page(current) + 1);
94 if (!user_mode(regs) || in_interrupt())
95 dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
96 (unsigned long)task_stack_page(current));
99 spin_unlock_irq(&die_lock);
103 static inline void die_if_kernel(const char *str, struct pt_regs *regs,
106 if (!user_mode(regs))
111 * try and fix up kernelspace address errors
112 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
113 * - kernel/userspace interfaces cause a jump to an appropriate handler
114 * - other kernel errors are bad
115 * - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault
117 static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
119 if (!user_mode(regs)) {
120 const struct exception_table_entry *fixup;
121 fixup = search_exception_tables(regs->pc);
123 regs->pc = fixup->fixup;
132 * handle an instruction that does an unaligned memory access by emulating the
134 * - note that PC _may not_ point to the faulting instruction
135 * (if that instruction is in a branch delay slot)
136 * - return 0 if emulation okay, -EFAULT on existential error
138 static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
140 int ret, index, count;
141 unsigned long *rm, *rn;
142 unsigned char *src, *dst;
144 index = (instruction>>8)&15; /* 0x0F00 */
145 rn = ®s->regs[index];
147 index = (instruction>>4)&15; /* 0x00F0 */
148 rm = ®s->regs[index];
150 count = 1<<(instruction&3);
153 switch (instruction>>12) {
154 case 0: /* mov.[bwl] to/from memory via r0+rn */
155 if (instruction & 8) {
157 src = (unsigned char*) *rm;
158 src += regs->regs[0];
159 dst = (unsigned char*) rn;
160 *(unsigned long*)dst = 0;
162 #ifdef __LITTLE_ENDIAN__
163 if (copy_from_user(dst, src, count))
166 if ((count == 2) && dst[1] & 0x80) {
173 if (__copy_user(dst, src, count))
176 if ((count == 2) && dst[2] & 0x80) {
183 src = (unsigned char*) rm;
184 #if !defined(__LITTLE_ENDIAN__)
187 dst = (unsigned char*) *rn;
188 dst += regs->regs[0];
190 if (copy_to_user(dst, src, count))
196 case 1: /* mov.l Rm,@(disp,Rn) */
197 src = (unsigned char*) rm;
198 dst = (unsigned char*) *rn;
199 dst += (instruction&0x000F)<<2;
201 if (copy_to_user(dst,src,4))
206 case 2: /* mov.[bwl] to memory, possibly with pre-decrement */
209 src = (unsigned char*) rm;
210 dst = (unsigned char*) *rn;
211 #if !defined(__LITTLE_ENDIAN__)
214 if (copy_to_user(dst, src, count))
219 case 5: /* mov.l @(disp,Rm),Rn */
220 src = (unsigned char*) *rm;
221 src += (instruction&0x000F)<<2;
222 dst = (unsigned char*) rn;
223 *(unsigned long*)dst = 0;
225 if (copy_from_user(dst,src,4))
230 case 6: /* mov.[bwl] from memory, possibly with post-increment */
231 src = (unsigned char*) *rm;
234 dst = (unsigned char*) rn;
235 *(unsigned long*)dst = 0;
237 #ifdef __LITTLE_ENDIAN__
238 if (copy_from_user(dst, src, count))
241 if ((count == 2) && dst[1] & 0x80) {
248 if (copy_from_user(dst, src, count))
251 if ((count == 2) && dst[2] & 0x80) {
260 switch ((instruction&0xFF00)>>8) {
261 case 0x81: /* mov.w R0,@(disp,Rn) */
262 src = (unsigned char*) ®s->regs[0];
263 #if !defined(__LITTLE_ENDIAN__)
266 dst = (unsigned char*) *rm; /* called Rn in the spec */
267 dst += (instruction&0x000F)<<1;
269 if (copy_to_user(dst, src, 2))
274 case 0x85: /* mov.w @(disp,Rm),R0 */
275 src = (unsigned char*) *rm;
276 src += (instruction&0x000F)<<1;
277 dst = (unsigned char*) ®s->regs[0];
278 *(unsigned long*)dst = 0;
280 #if !defined(__LITTLE_ENDIAN__)
284 if (copy_from_user(dst, src, 2))
287 #ifdef __LITTLE_ENDIAN__
306 /* Argh. Address not only misaligned but also non-existent.
307 * Raise an EFAULT and see if it's trapped
309 return die_if_no_fixup("Fault in unaligned fixup", regs, 0);
313 * emulate the instruction in the delay slot
314 * - fetches the instruction from PC+2
316 static inline int handle_unaligned_delayslot(struct pt_regs *regs)
320 if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) {
321 /* the instruction-fetch faulted */
326 die("delay-slot-insn faulting in handle_unaligned_delayslot", regs, 0);
329 return handle_unaligned_ins(instruction,regs);
333 * handle an instruction that does an unaligned memory access
334 * - have to be careful of branch delay-slot instructions that fault
336 * - if the branch would be taken PC points to the branch
337 * - if the branch would not be taken, PC points to delay-slot
339 * - PC always points to delayed branch
340 * - return 0 if handled, -EFAULT if failed (may not return if in kernel)
343 /* Macros to determine offset from current PC for branch instructions */
344 /* Explicit type coercion is used to force sign extension where needed */
345 #define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
346 #define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
349 * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
352 #ifndef CONFIG_CPU_SH2A
353 static int handle_unaligned_notify_count = 10;
355 static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
360 index = (instruction>>8)&15; /* 0x0F00 */
361 rm = regs->regs[index];
363 /* shout about the first ten userspace fixups */
364 if (user_mode(regs) && handle_unaligned_notify_count>0) {
365 handle_unaligned_notify_count--;
367 printk("Fixing up unaligned userspace access in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
368 current->comm,current->pid,(u16*)regs->pc,instruction);
372 switch (instruction&0xF000) {
374 if (instruction==0x000B) {
376 ret = handle_unaligned_delayslot(regs);
380 else if ((instruction&0x00FF)==0x0023) {
382 ret = handle_unaligned_delayslot(regs);
386 else if ((instruction&0x00FF)==0x0003) {
388 ret = handle_unaligned_delayslot(regs);
390 regs->pr = regs->pc + 4;
395 /* mov.[bwl] to/from memory via r0+rn */
400 case 0x1000: /* mov.l Rm,@(disp,Rn) */
403 case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */
407 if ((instruction&0x00FF)==0x002B) {
409 ret = handle_unaligned_delayslot(regs);
413 else if ((instruction&0x00FF)==0x000B) {
415 ret = handle_unaligned_delayslot(regs);
417 regs->pr = regs->pc + 4;
422 /* mov.[bwl] to/from memory via r0+rn */
427 case 0x5000: /* mov.l @(disp,Rm),Rn */
430 case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */
433 case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */
434 switch (instruction&0x0F00) {
435 case 0x0100: /* mov.w R0,@(disp,Rm) */
437 case 0x0500: /* mov.w @(disp,Rm),R0 */
439 case 0x0B00: /* bf lab - no delayslot*/
441 case 0x0F00: /* bf/s lab */
442 ret = handle_unaligned_delayslot(regs);
444 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
445 if ((regs->sr & 0x00000001) != 0)
446 regs->pc += 4; /* next after slot */
449 regs->pc += SH_PC_8BIT_OFFSET(instruction);
452 case 0x0900: /* bt lab - no delayslot */
454 case 0x0D00: /* bt/s lab */
455 ret = handle_unaligned_delayslot(regs);
457 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
458 if ((regs->sr & 0x00000001) == 0)
459 regs->pc += 4; /* next after slot */
462 regs->pc += SH_PC_8BIT_OFFSET(instruction);
468 case 0xA000: /* bra label */
469 ret = handle_unaligned_delayslot(regs);
471 regs->pc += SH_PC_12BIT_OFFSET(instruction);
474 case 0xB000: /* bsr label */
475 ret = handle_unaligned_delayslot(regs);
477 regs->pr = regs->pc + 4;
478 regs->pc += SH_PC_12BIT_OFFSET(instruction);
484 /* handle non-delay-slot instruction */
486 ret = handle_unaligned_ins(instruction,regs);
491 #endif /* CONFIG_CPU_SH2A */
493 #ifdef CONFIG_CPU_HAS_SR_RB
494 #define lookup_exception_vector(x) \
495 __asm__ __volatile__ ("stc r2_bank, %0\n\t" : "=r" ((x)))
497 #define lookup_exception_vector(x) \
498 __asm__ __volatile__ ("mov r4, %0\n\t" : "=r" ((x)))
502 * Handle various address error exceptions
504 asmlinkage void do_address_error(struct pt_regs *regs,
505 unsigned long writeaccess,
506 unsigned long address)
508 unsigned long error_code = 0;
510 #ifndef CONFIG_CPU_SH2A
515 /* Intentional ifdef */
516 #ifdef CONFIG_CPU_HAS_SR_RB
517 lookup_exception_vector(error_code);
522 if (user_mode(regs)) {
524 current->thread.error_code = error_code;
525 #ifdef CONFIG_CPU_SH2
527 * On the SH-2, we only have a single vector for address
528 * errors, there's no differentiating between a load error
531 current->thread.trap_no = 9;
533 current->thread.trap_no = (writeaccess) ? 8 : 7;
536 /* bad PC is not something we can fix */
540 #ifndef CONFIG_CPU_SH2A
542 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
543 /* Argh. Fault on the instruction itself.
544 This should never happen non-SMP
550 tmp = handle_unaligned_access(instruction, regs);
558 printk(KERN_NOTICE "Killing process \"%s\" due to unaligned access\n", current->comm);
559 force_sig(SIGSEGV, current);
562 die("unaligned program counter", regs, error_code);
564 #ifndef CONFIG_CPU_SH2A
566 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
567 /* Argh. Fault on the instruction itself.
568 This should never happen non-SMP
571 die("insn faulting in do_address_error", regs, 0);
574 handle_unaligned_access(instruction, regs);
577 printk(KERN_NOTICE "Killing process \"%s\" due to unaligned access\n", current->comm);
578 force_sig(SIGSEGV, current);
585 * SH-DSP support gerg@snapgear.com.
587 int is_dsp_inst(struct pt_regs *regs)
592 * Safe guard if DSP mode is already enabled or we're lacking
593 * the DSP altogether.
595 if (!(cpu_data->flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
598 get_user(inst, ((unsigned short *) regs->pc));
602 /* Check for any type of DSP or support instruction */
603 if ((inst == 0xf000) || (inst == 0x4000))
609 #define is_dsp_inst(regs) (0)
610 #endif /* CONFIG_SH_DSP */
612 #ifdef CONFIG_CPU_SH2A
613 asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
614 unsigned long r6, unsigned long r7,
615 struct pt_regs __regs)
617 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
620 current->thread.trap_no = r4;
621 current->thread.error_code = 0;
624 case TRAP_DIVZERO_ERROR:
625 info.si_code = FPE_INTDIV;
627 case TRAP_DIVOVF_ERROR:
628 info.si_code = FPE_INTOVF;
632 force_sig_info(SIGFPE, &info, current);
636 /* arch/sh/kernel/cpu/sh4/fpu.c */
637 extern int do_fpu_inst(unsigned short, struct pt_regs *);
638 extern asmlinkage void do_fpu_state_restore(unsigned long r4, unsigned long r5,
639 unsigned long r6, unsigned long r7, struct pt_regs __regs);
641 asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
642 unsigned long r6, unsigned long r7,
643 struct pt_regs __regs)
645 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
646 unsigned long error_code;
647 struct task_struct *tsk = current;
649 #ifdef CONFIG_SH_FPU_EMU
650 unsigned short inst = 0;
653 get_user(inst, (unsigned short*)regs->pc);
655 err = do_fpu_inst(inst, regs);
660 /* not a FPU inst. */
664 /* Check if it's a DSP instruction */
665 if (is_dsp_inst(regs)) {
666 /* Enable DSP mode, and restart instruction. */
672 lookup_exception_vector(error_code);
675 tsk->thread.error_code = error_code;
676 tsk->thread.trap_no = TRAP_RESERVED_INST;
677 CHK_REMOTE_DEBUG(regs);
678 force_sig(SIGILL, tsk);
679 die_if_no_fixup("reserved instruction", regs, error_code);
682 #ifdef CONFIG_SH_FPU_EMU
683 static int emulate_branch(unsigned short inst, struct pt_regs* regs)
686 * bfs: 8fxx: PC+=d*2+4;
687 * bts: 8dxx: PC+=d*2+4;
688 * bra: axxx: PC+=D*2+4;
689 * bsr: bxxx: PC+=D*2+4 after PR=PC+4;
690 * braf:0x23: PC+=Rn*2+4;
691 * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4;
693 * jsr: 4x0b: PC=Rn after PR=PC+4;
696 if ((inst & 0xfd00) == 0x8d00) {
697 regs->pc += SH_PC_8BIT_OFFSET(inst);
701 if ((inst & 0xe000) == 0xa000) {
702 regs->pc += SH_PC_12BIT_OFFSET(inst);
706 if ((inst & 0xf0df) == 0x0003) {
707 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
711 if ((inst & 0xf0df) == 0x400b) {
712 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
716 if ((inst & 0xffff) == 0x000b) {
725 asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
726 unsigned long r6, unsigned long r7,
727 struct pt_regs __regs)
729 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
730 unsigned long error_code;
731 struct task_struct *tsk = current;
732 #ifdef CONFIG_SH_FPU_EMU
733 unsigned short inst = 0;
735 get_user(inst, (unsigned short *)regs->pc + 1);
736 if (!do_fpu_inst(inst, regs)) {
737 get_user(inst, (unsigned short *)regs->pc);
738 if (!emulate_branch(inst, regs))
740 /* fault in branch.*/
742 /* not a FPU inst. */
745 lookup_exception_vector(error_code);
748 tsk->thread.error_code = error_code;
749 tsk->thread.trap_no = TRAP_RESERVED_INST;
750 CHK_REMOTE_DEBUG(regs);
751 force_sig(SIGILL, tsk);
752 die_if_no_fixup("illegal slot instruction", regs, error_code);
755 asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
756 unsigned long r6, unsigned long r7,
757 struct pt_regs __regs)
759 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
762 lookup_exception_vector(ex);
763 die_if_kernel("exception", regs, ex);
766 #if defined(CONFIG_SH_STANDARD_BIOS)
767 void *gdb_vbr_vector;
769 static inline void __init gdb_vbr_init(void)
771 register unsigned long vbr;
774 * Read the old value of the VBR register to initialise
775 * the vector through which debug and BIOS traps are
776 * delegated by the Linux trap handler.
778 asm volatile("stc vbr, %0" : "=r" (vbr));
780 gdb_vbr_vector = (void *)(vbr + 0x100);
781 printk("Setting GDB trap vector to 0x%08lx\n",
782 (unsigned long)gdb_vbr_vector);
786 void __init per_cpu_trap_init(void)
788 extern void *vbr_base;
790 #ifdef CONFIG_SH_STANDARD_BIOS
794 /* NOTE: The VBR value should be at P1
795 (or P2, virtural "fixed" address space).
796 It's definitely should not in physical address. */
798 asm volatile("ldc %0, vbr"
804 void *set_exception_table_vec(unsigned int vec, void *handler)
806 extern void *exception_handling_table[];
809 old_handler = exception_handling_table[vec];
810 exception_handling_table[vec] = handler;
814 extern asmlinkage void address_error_handler(unsigned long r4, unsigned long r5,
815 unsigned long r6, unsigned long r7,
816 struct pt_regs __regs);
818 void __init trap_init(void)
820 set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
821 set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
823 #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
824 defined(CONFIG_SH_FPU_EMU)
826 * For SH-4 lacking an FPU, treat floating point instructions as
827 * reserved. They'll be handled in the math-emu case, or faulted on
830 set_exception_table_evt(0x800, do_reserved_inst);
831 set_exception_table_evt(0x820, do_illegal_slot_inst);
832 #elif defined(CONFIG_SH_FPU)
833 set_exception_table_evt(0x800, do_fpu_state_restore);
834 set_exception_table_evt(0x820, do_fpu_state_restore);
837 #ifdef CONFIG_CPU_SH2
838 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_handler);
840 #ifdef CONFIG_CPU_SH2A
841 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
842 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
845 /* Setup VBR for boot cpu */
849 void show_trace(struct task_struct *tsk, unsigned long *sp,
850 struct pt_regs *regs)
854 if (regs && user_mode(regs))
857 printk("\nCall trace: ");
858 #ifdef CONFIG_KALLSYMS
862 while (!kstack_end(sp)) {
864 if (kernel_text_address(addr))
871 void show_stack(struct task_struct *tsk, unsigned long *sp)
878 sp = (unsigned long *)current_stack_pointer;
880 sp = (unsigned long *)tsk->thread.sp;
882 stack = (unsigned long)sp;
883 dump_mem("Stack: ", stack, THREAD_SIZE +
884 (unsigned long)task_stack_page(tsk));
885 show_trace(tsk, sp, NULL);
888 void dump_stack(void)
890 show_stack(NULL, NULL);
892 EXPORT_SYMBOL(dump_stack);