2 * linux/arch/sh/boards/se/7724/setup.c
4 * Copyright (C) 2009 Renesas Solutions Corp.
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/physmap.h>
18 #include <linux/delay.h>
19 #include <linux/smc91x.h>
20 #include <linux/gpio.h>
21 #include <linux/input.h>
22 #include <linux/usb/r8a66597.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <media/sh_mobile_ceu.h>
26 #include <asm/heartbeat.h>
27 #include <asm/sh_eth.h>
28 #include <asm/clock.h>
29 #include <asm/sh_keysc.h>
30 #include <cpu/sh7724.h>
31 #include <mach-se/mach/se7724.h>
35 * ------------------------------------
36 * SW31 : 1001 1100 : default
37 * SW32 : 0111 1111 : use on board flash
39 * SW41 : abxx xxxx -> a = 0 : Analog monitor
48 * When you use 1280 x 720 lcdc output,
49 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
50 * and change SW41 to use 720p
54 static struct heartbeat_data heartbeat_data = {
58 static struct resource heartbeat_resources[] = {
62 .flags = IORESOURCE_MEM,
66 static struct platform_device heartbeat_device = {
70 .platform_data = &heartbeat_data,
72 .num_resources = ARRAY_SIZE(heartbeat_resources),
73 .resource = heartbeat_resources,
77 static struct smc91x_platdata smc91x_info = {
78 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
81 static struct resource smc91x_eth_resources[] = {
86 .flags = IORESOURCE_MEM,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
94 static struct platform_device smc91x_eth_device = {
96 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
97 .resource = smc91x_eth_resources,
99 .platform_data = &smc91x_info,
104 static struct mtd_partition nor_flash_partitions[] = {
108 .size = (1 * 1024 * 1024),
109 .mask_flags = MTD_WRITEABLE, /* Read-only */
112 .offset = MTDPART_OFS_APPEND,
113 .size = (2 * 1024 * 1024),
116 .offset = MTDPART_OFS_APPEND,
117 .size = MTDPART_SIZ_FULL,
121 static struct physmap_flash_data nor_flash_data = {
123 .parts = nor_flash_partitions,
124 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
127 static struct resource nor_flash_resources[] = {
132 .flags = IORESOURCE_MEM,
136 static struct platform_device nor_flash_device = {
137 .name = "physmap-flash",
138 .resource = nor_flash_resources,
139 .num_resources = ARRAY_SIZE(nor_flash_resources),
141 .platform_data = &nor_flash_data,
146 static struct sh_mobile_lcdc_info lcdc_info = {
147 .clock_source = LCDC_CLK_EXTERNAL,
149 .chan = LCDC_CHAN_MAINLCD,
154 .sync = 0, /* hsync and vsync are active low */
156 .lcd_size_cfg = { /* 7.0 inch */
165 static struct resource lcdc_resources[] = {
170 .flags = IORESOURCE_MEM,
174 .flags = IORESOURCE_IRQ,
178 static struct platform_device lcdc_device = {
179 .name = "sh_mobile_lcdc_fb",
180 .num_resources = ARRAY_SIZE(lcdc_resources),
181 .resource = lcdc_resources,
183 .platform_data = &lcdc_info,
188 static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
189 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
192 static struct resource ceu0_resources[] = {
197 .flags = IORESOURCE_MEM,
201 .flags = IORESOURCE_IRQ,
204 /* place holder for contiguous memory */
208 static struct platform_device ceu0_device = {
209 .name = "sh_mobile_ceu",
210 .id = 0, /* "ceu0" clock */
211 .num_resources = ARRAY_SIZE(ceu0_resources),
212 .resource = ceu0_resources,
214 .platform_data = &sh_mobile_ceu0_info,
219 static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
220 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
223 static struct resource ceu1_resources[] = {
228 .flags = IORESOURCE_MEM,
232 .flags = IORESOURCE_IRQ,
235 /* place holder for contiguous memory */
239 static struct platform_device ceu1_device = {
240 .name = "sh_mobile_ceu",
241 .id = 1, /* "ceu1" clock */
242 .num_resources = ARRAY_SIZE(ceu1_resources),
243 .resource = ceu1_resources,
245 .platform_data = &sh_mobile_ceu1_info,
249 /* KEYSC in SoC (Needs SW33-2 set to ON) */
250 static struct sh_keysc_info keysc_info = {
251 .mode = SH_KEYSC_MODE_1,
255 KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
256 KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
257 KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
258 KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
259 KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
260 KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
264 static struct resource keysc_resources[] = {
269 .flags = IORESOURCE_MEM,
273 .flags = IORESOURCE_IRQ,
277 static struct platform_device keysc_device = {
279 .id = 0, /* "keysc0" clock */
280 .num_resources = ARRAY_SIZE(keysc_resources),
281 .resource = keysc_resources,
283 .platform_data = &keysc_info,
288 static struct resource sh_eth_resources[] = {
290 .start = SH_ETH_ADDR,
291 .end = SH_ETH_ADDR + 0x1FC,
292 .flags = IORESOURCE_MEM,
296 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
300 struct sh_eth_plat_data sh_eth_plat = {
301 .phy = 0x1f, /* SMSC LAN8187 */
302 .edmac_endian = EDMAC_LITTLE_ENDIAN,
305 static struct platform_device sh_eth_device = {
309 .platform_data = &sh_eth_plat,
311 .num_resources = ARRAY_SIZE(sh_eth_resources),
312 .resource = sh_eth_resources,
315 static struct r8a66597_platdata sh7724_usb0_host_data = {
319 static struct resource sh7724_usb0_host_resources[] = {
323 .flags = IORESOURCE_MEM,
328 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
332 static struct platform_device sh7724_usb0_host_device = {
333 .name = "r8a66597_hcd",
336 .dma_mask = NULL, /* not use dma */
337 .coherent_dma_mask = 0xffffffff,
338 .platform_data = &sh7724_usb0_host_data,
340 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
341 .resource = sh7724_usb0_host_resources,
344 static struct platform_device *ms7724se_devices[] __initdata = {
353 &sh7724_usb0_host_device,
356 #define EEPROM_OP 0xBA206000
357 #define EEPROM_ADR 0xBA206004
358 #define EEPROM_DATA 0xBA20600C
359 #define EEPROM_STAT 0xBA206010
360 #define EEPROM_STRT 0xBA206014
361 static int __init sh_eth_is_eeprom_ready(void)
366 if (!ctrl_inw(EEPROM_STAT))
371 printk(KERN_ERR "ms7724se can not access to eeprom\n");
375 static void __init sh_eth_init(void)
380 /* check EEPROM status */
381 if (!sh_eth_is_eeprom_ready())
384 /* read MAC addr from EEPROM */
385 for (i = 0 ; i < 3 ; i++) {
386 ctrl_outw(0x0, EEPROM_OP); /* read */
387 ctrl_outw(i*2, EEPROM_ADR);
388 ctrl_outw(0x1, EEPROM_STRT);
389 if (!sh_eth_is_eeprom_ready())
392 mac[i] = ctrl_inw(EEPROM_DATA);
393 mac[i] = ((mac[i] & 0xFF) << 8) | (mac[i] >> 8); /* swap */
397 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
400 ctrl_outl(((mac[0] << 16) | (mac[1])), SH_ETH_MAHR);
401 ctrl_outl((mac[2]), SH_ETH_MALR);
404 #define SW4140 0xBA201000
405 #define FPGA_OUT 0xBA200400
406 #define PORT_HIZA 0xA4050158
407 #define PORT_MSELCRB 0xA4050182
409 #define SW41_A 0x0100
410 #define SW41_B 0x0200
411 #define SW41_C 0x0400
412 #define SW41_D 0x0800
413 #define SW41_E 0x1000
414 #define SW41_F 0x2000
415 #define SW41_G 0x4000
416 #define SW41_H 0x8000
418 static int __init devices_setup(void)
420 u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
423 ctrl_outw(ctrl_inw(FPGA_OUT) &
424 ~((1 << 1) | /* LAN */
425 (1 << 6) | /* VIDEO DAC */
426 (1 << 12) | /* USB0 */
427 (1 << 14)), /* RMII */
430 /* turn on USB clocks, use external clock */
431 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
434 /* Let LED9 show STATUS2 */
435 gpio_request(GPIO_FN_STATUS2, NULL);
437 /* Lit LED10 show STATUS0 */
438 gpio_request(GPIO_FN_STATUS0, NULL);
440 /* Lit LED11 show PDSTATUS */
441 gpio_request(GPIO_FN_PDSTATUS, NULL);
444 gpio_request(GPIO_PTJ6, NULL);
445 gpio_direction_output(GPIO_PTJ6, 1);
446 gpio_export(GPIO_PTJ6, 0);
449 gpio_request(GPIO_PTJ5, NULL);
450 gpio_direction_output(GPIO_PTJ5, 1);
451 gpio_export(GPIO_PTJ5, 0);
454 gpio_request(GPIO_PTJ7, NULL);
455 gpio_direction_output(GPIO_PTJ7, 1);
456 gpio_export(GPIO_PTJ7, 0);
459 /* enable USB0 port */
460 ctrl_outw(0x0600, 0xa40501d4);
462 /* enable IRQ 0,1,2 */
463 gpio_request(GPIO_FN_INTC_IRQ0, NULL);
464 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
465 gpio_request(GPIO_FN_INTC_IRQ2, NULL);
468 gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
469 gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
470 gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
471 gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
472 gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
475 gpio_request(GPIO_FN_LCDD23, NULL);
476 gpio_request(GPIO_FN_LCDD22, NULL);
477 gpio_request(GPIO_FN_LCDD21, NULL);
478 gpio_request(GPIO_FN_LCDD20, NULL);
479 gpio_request(GPIO_FN_LCDD19, NULL);
480 gpio_request(GPIO_FN_LCDD18, NULL);
481 gpio_request(GPIO_FN_LCDD17, NULL);
482 gpio_request(GPIO_FN_LCDD16, NULL);
483 gpio_request(GPIO_FN_LCDD15, NULL);
484 gpio_request(GPIO_FN_LCDD14, NULL);
485 gpio_request(GPIO_FN_LCDD13, NULL);
486 gpio_request(GPIO_FN_LCDD12, NULL);
487 gpio_request(GPIO_FN_LCDD11, NULL);
488 gpio_request(GPIO_FN_LCDD10, NULL);
489 gpio_request(GPIO_FN_LCDD9, NULL);
490 gpio_request(GPIO_FN_LCDD8, NULL);
491 gpio_request(GPIO_FN_LCDD7, NULL);
492 gpio_request(GPIO_FN_LCDD6, NULL);
493 gpio_request(GPIO_FN_LCDD5, NULL);
494 gpio_request(GPIO_FN_LCDD4, NULL);
495 gpio_request(GPIO_FN_LCDD3, NULL);
496 gpio_request(GPIO_FN_LCDD2, NULL);
497 gpio_request(GPIO_FN_LCDD1, NULL);
498 gpio_request(GPIO_FN_LCDD0, NULL);
499 gpio_request(GPIO_FN_LCDDISP, NULL);
500 gpio_request(GPIO_FN_LCDHSYN, NULL);
501 gpio_request(GPIO_FN_LCDDCK, NULL);
502 gpio_request(GPIO_FN_LCDVSYN, NULL);
503 gpio_request(GPIO_FN_LCDDON, NULL);
504 gpio_request(GPIO_FN_LCDVEPWC, NULL);
505 gpio_request(GPIO_FN_LCDVCPWC, NULL);
506 gpio_request(GPIO_FN_LCDRD, NULL);
507 gpio_request(GPIO_FN_LCDLCLK, NULL);
508 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
511 gpio_request(GPIO_FN_VIO0_D15, NULL);
512 gpio_request(GPIO_FN_VIO0_D14, NULL);
513 gpio_request(GPIO_FN_VIO0_D13, NULL);
514 gpio_request(GPIO_FN_VIO0_D12, NULL);
515 gpio_request(GPIO_FN_VIO0_D11, NULL);
516 gpio_request(GPIO_FN_VIO0_D10, NULL);
517 gpio_request(GPIO_FN_VIO0_D9, NULL);
518 gpio_request(GPIO_FN_VIO0_D8, NULL);
519 gpio_request(GPIO_FN_VIO0_D7, NULL);
520 gpio_request(GPIO_FN_VIO0_D6, NULL);
521 gpio_request(GPIO_FN_VIO0_D5, NULL);
522 gpio_request(GPIO_FN_VIO0_D4, NULL);
523 gpio_request(GPIO_FN_VIO0_D3, NULL);
524 gpio_request(GPIO_FN_VIO0_D2, NULL);
525 gpio_request(GPIO_FN_VIO0_D1, NULL);
526 gpio_request(GPIO_FN_VIO0_D0, NULL);
527 gpio_request(GPIO_FN_VIO0_VD, NULL);
528 gpio_request(GPIO_FN_VIO0_CLK, NULL);
529 gpio_request(GPIO_FN_VIO0_FLD, NULL);
530 gpio_request(GPIO_FN_VIO0_HD, NULL);
531 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
534 gpio_request(GPIO_FN_VIO1_D7, NULL);
535 gpio_request(GPIO_FN_VIO1_D6, NULL);
536 gpio_request(GPIO_FN_VIO1_D5, NULL);
537 gpio_request(GPIO_FN_VIO1_D4, NULL);
538 gpio_request(GPIO_FN_VIO1_D3, NULL);
539 gpio_request(GPIO_FN_VIO1_D2, NULL);
540 gpio_request(GPIO_FN_VIO1_D1, NULL);
541 gpio_request(GPIO_FN_VIO1_D0, NULL);
542 gpio_request(GPIO_FN_VIO1_FLD, NULL);
543 gpio_request(GPIO_FN_VIO1_HD, NULL);
544 gpio_request(GPIO_FN_VIO1_VD, NULL);
545 gpio_request(GPIO_FN_VIO1_CLK, NULL);
546 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
549 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
550 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
551 gpio_request(GPIO_FN_KEYIN4, NULL);
552 gpio_request(GPIO_FN_KEYIN3, NULL);
553 gpio_request(GPIO_FN_KEYIN2, NULL);
554 gpio_request(GPIO_FN_KEYIN1, NULL);
555 gpio_request(GPIO_FN_KEYIN0, NULL);
556 gpio_request(GPIO_FN_KEYOUT3, NULL);
557 gpio_request(GPIO_FN_KEYOUT2, NULL);
558 gpio_request(GPIO_FN_KEYOUT1, NULL);
559 gpio_request(GPIO_FN_KEYOUT0, NULL);
564 * please remove J33 pin from your board !!
566 * ms7724 board should not use GPIO_FN_LNKSTA pin
567 * So, This time PTX5 is set to input pin
569 gpio_request(GPIO_FN_RMII_RXD0, NULL);
570 gpio_request(GPIO_FN_RMII_RXD1, NULL);
571 gpio_request(GPIO_FN_RMII_TXD0, NULL);
572 gpio_request(GPIO_FN_RMII_TXD1, NULL);
573 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
574 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
575 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
576 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
577 gpio_request(GPIO_FN_MDIO, NULL);
578 gpio_request(GPIO_FN_MDC, NULL);
579 gpio_request(GPIO_PTX5, NULL);
580 gpio_direction_input(GPIO_PTX5);
585 lcdc_info.ch[0].lcd_cfg.xres = 1280;
586 lcdc_info.ch[0].lcd_cfg.yres = 720;
587 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
588 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
589 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
590 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
591 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
592 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
595 lcdc_info.ch[0].lcd_cfg.xres = 640;
596 lcdc_info.ch[0].lcd_cfg.yres = 480;
597 lcdc_info.ch[0].lcd_cfg.left_margin = 105;
598 lcdc_info.ch[0].lcd_cfg.right_margin = 50;
599 lcdc_info.ch[0].lcd_cfg.hsync_len = 96;
600 lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
601 lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
602 lcdc_info.ch[0].lcd_cfg.vsync_len = 2;
606 /* Digital monitor */
607 lcdc_info.ch[0].interface_type = RGB18;
608 lcdc_info.ch[0].flags = 0;
611 lcdc_info.ch[0].interface_type = RGB24;
612 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
615 return platform_add_devices(ms7724se_devices,
616 ARRAY_SIZE(ms7724se_devices));
618 device_initcall(devices_setup);
620 static struct sh_machine_vector mv_ms7724se __initmv = {
621 .mv_name = "ms7724se",
622 .mv_init_irq = init_se7724_IRQ,
623 .mv_nr_irqs = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,