2 * arch/s390/kernel/head64.S
4 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Hartmut Penner <hp@de.ibm.com>
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>
8 * Rob van der Heij <rvdhei@iae.nl>
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
14 # startup-code at 0x10000, running in absolute addressing mode
15 # this is called either by the ipl loader or directly by PSW restart
16 # or linload or SALIPL
19 startup:basr %r13,0 # get base
20 .LPG0: l %r13,0f-.LPG0(%r13)
22 0: .long startup_continue
25 # params at 10400 (setup.h)
29 .quad 0 # INITRD_START
33 .byte "root=/dev/ram0 ro"
39 basr %r13,0 # get base
40 .LPG1: sll %r13,1 # remove high order bit
43 lhi %r1,1 # mode 1 = esame
44 mvi __LC_AR_MODE_ID,1 # set esame flag
45 slr %r0,%r0 # set cpuid to zero
46 sigp %r1,%r0,0x12 # switch to esame mode
47 sam64 # switch to 64 bit mode
48 lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
49 lg %r12,.Lparmaddr-.LPG1(%r13)# pointer to parameter area
50 # move IPL device to lowcore
51 mvc __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
56 larl %r2,__bss_start # start of bss segment
57 larl %r3,_end # end of bss segment
58 sgr %r3,%r2 # length of bss
60 sgr %r5,%r5 # set src,length and pad to zero
61 mvcle %r2,%r4,0 # clear mem
62 jo .-4 # branch back, if not finish
64 l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
66 stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
68 stctg %r0,%r0,.Lcr-.LPG1(%r13) # get cr0
69 la %r1,0x200 # set bit 22
70 og %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
71 stg %r1,.Lcr-.LPG1(%r13)
72 lctlg %r0,%r0,.Lcr-.LPG1(%r13) # load modified cr0
74 mvc __LC_EXT_NEW_PSW(8),.Lpcmsk-.LPG1(%r13) # set postcall psw
76 stg %r1,__LC_EXT_NEW_PSW+8 # set handler
78 larl %r4,.Lsccb # %r4 is our index for sccb stuff
79 lgr %r1,%r4 # our sccb
80 .insn rre,0xb2200000,%r2,%r1 # service call
82 srl %r1,28 # get cc code
85 be .Lfchunk-.LPG1(%r13) # leave
87 be .Lservicecall-.LPG1(%r13)
88 lpswe .Lwaitsclp-.LPG1(%r13)
90 lh %r1,.Lsccbr-.Lsccb(%r4)
91 chi %r1,0x10 # 0x0010 is the sucess code
92 je .Lprocsccb # let's process the sccb
94 bne .Lfchunk-.LPG1(%r13) # unhandled error code
95 c %r2,.Lrcp-.LPG1(%r13) # Did we try Read SCP forced
96 bne .Lfchunk-.LPG1(%r13) # if no, give up
97 l %r2,.Lrcp2-.LPG1(%r13) # try with Read SCP
98 b .Lservicecall-.LPG1(%r13)
101 icm %r1,3,.Lscpincr1-.Lsccb(%r4) # use this one if != 0
103 lg %r1,.Lscpincr2-.Lsccb(%r4) # otherwise use this one
105 xr %r3,%r3 # same logic
106 ic %r3,.Lscpa1-.Lsccb(%r4)
109 l %r3,.Lscpa2-.Lsccb(%r4)
111 mlgr %r2,%r1 # mem in MB on 128-bit
112 l %r1,.Lonemb-.LPG1(%r13)
113 mlgr %r2,%r1 # mem size in bytes in %r3
114 b .Lfchunk-.LPG1(%r13)
121 .quad 0x00 # place holder for cr0
123 .quad 0x0102000180000000,.Lsclph
125 .int 0x00120001 # Read SCP forced code
127 .int 0x00020001 # Read SCP code
132 # set program check new psw mask
133 mvc __LC_PGM_NEW_PSW(8),.Lpcmsk-.LPG1(%r13)
136 # find memory chunks.
138 lgr %r9,%r3 # end of mem
139 larl %r1,.Lchkmem # set program check address
140 stg %r1,__LC_PGM_NEW_PSW+8
141 la %r1,1 # test in increments of 128KB
143 larl %r3,memory_chunk
144 slgr %r4,%r4 # set start of chunk to zero
145 slgr %r5,%r5 # set end of chunk to zero
146 slr %r6,%r6 # set access code to zero
147 la %r10,MEMORY_CHUNKS # number of chunks
149 tprot 0(%r5),0 # test protection of first byte
152 clr %r6,%r7 # compare cc with last access code
156 algr %r5,%r1 # add 128KB to end of chunk
157 # no need to check here,
158 brc 12,.Lloop # this is the same chunk
159 .Lchkmem: # > 16EB or tprot got a program check
160 clgr %r4,%r5 # chunk size > 0?
162 stg %r4,0(%r3) # store start address of chunk
165 stg %r0,8(%r3) # store size of chunk
166 st %r6,20(%r3) # store type of chunk
169 stg %r5,0(%r8) # store memory size
170 ahi %r10,-1 # update chunk number
172 lr %r6,%r7 # set access code to last cc
173 # we got an exception or we're starting a new
174 # chunk , we must check if we should
175 # still try to find valid memory (if we detected
176 # the amount of available storage), and if we
183 clgr %r0, %r9 # did we detect memory?
184 je .Ldonemem # if not, leave
185 chi %r10, 0 # do we have chunks left?
188 algr %r5,%r1 # add 128KB to end of chunk
189 lgr %r4,%r5 # potential new chunk
190 clgr %r5,%r9 # should we go on?
194 larl %r12,machine_flags
196 # find out if we are running under VM
198 stidp __LC_CPUID # store cpuid
199 tm __LC_CPUID,0xff # running under VM ?
201 oi 7(%r12),1 # set VM flag
202 0: lh %r0,__LC_CPUID+4 # get cpu version
203 chi %r0,0x7490 # running on a P/390 ?
205 oi 7(%r12),4 # set P/390 flag
209 # find out if we have the MVPG instruction
211 la %r1,0f-.LPG1(%r13) # set program check address
212 stg %r1,__LC_PGM_NEW_PSW+8
216 mvpg %r1,%r2 # test MVPG instruction
217 oi 7(%r12),16 # set MVPG flag
221 # find out if the diag 0x44 works in 64 bit mode
223 la %r1,0f-.LPG1(%r13) # set program check address
224 stg %r1,__LC_PGM_NEW_PSW+8
225 diag 0,0,0x44 # test diag 0x44
226 oi 7(%r12),32 # set diag44 flag
230 # find out if we have the IDTE instruction
232 la %r1,0f-.LPG1(%r13) # set program check address
233 stg %r1,__LC_PGM_NEW_PSW+8
234 .long 0xb2b10000 # store facility list
235 tm 0xc8,0x08 # check bit for clearing-by-ASCE
240 oi 7(%r12),0x80 # set IDTE flag
243 lpswe .Lentry-.LPG1(13) # jump to _stext in primary-space,
244 # virtual and never return ...
246 .Lentry:.quad 0x0000000180000000,_stext
247 .Lctl: .quad 0x04b50002 # cr0: various things
248 .quad 0 # cr1: primary space segment table
249 .quad .Lduct # cr2: dispatchable unit control table
250 .quad 0 # cr3: instruction authorization
251 .quad 0 # cr4: instruction authorization
252 .quad 0xffffffffffffffff # cr5: primary-aste origin
253 .quad 0 # cr6: I/O interrupts
254 .quad 0 # cr7: secondary space segment table
255 .quad 0 # cr8: access registers translation
256 .quad 0 # cr9: tracing off
257 .quad 0 # cr10: tracing off
258 .quad 0 # cr11: tracing off
259 .quad 0 # cr12: tracing off
260 .quad 0 # cr13: home space segment table
261 .quad 0xc0000000 # cr14: machine check handling off
262 .quad 0 # cr15: linkage stack operations
263 .Lduct: .long 0,0,0,0,0,0,0,0
264 .long 0,0,0,0,0,0,0,0
265 .Lpcmsk:.quad 0x0000000180000000
266 .L4malign:.quad 0xffffffffffc00000
267 .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
268 .Lnop: .long 0x07000700
273 .globl s390_readinfo_sccb
276 .hword 0x1000 # length, one page
278 .byte 0x80 # variable response bit set
280 .hword 0x00 # response code
293 #ifdef CONFIG_SHARED_KERNEL
298 # startup-code, running in absolute addressing mode
301 _stext: basr %r13,0 # get base
306 larl %r15,init_thread_union
307 lg %r14,__TI_task(%r15) # cache current in lowcore
308 stg %r14,__LC_CURRENT
309 aghi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
310 stg %r15,__LC_KERNEL_STACK # set end of kernel stack
312 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
314 # check control registers
315 stctg %c0,%c15,0(%r15)
316 oi 6(%r15),0x40 # enable sigp emergency signal
317 oi 4(%r15),0x10 # switch on low address proctection
318 lctlg %c0,%c15,0(%r15)
321 lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
322 brasl %r14,start_kernel # go to C code
324 # We returned from start_kernel ?!? PANIK
327 lpswe .Ldw-.(%r13) # load disabled wait psw
330 .Ldw: .quad 0x0002000180000000,0x0000000000000000
331 .Laregs: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0