2 * arch/ppc/platforms/pmac_feature.c
4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
5 * Ben. Herrenschmidt (benh@kernel.crashing.org)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * - Replace mdelay with some schedule loop if possible
15 * - Shorten some obfuscated delays on some routines (like modem
17 * - Refcount some clocks (see darwin)
18 * - Split split split...
21 #include <linux/config.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/delay.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/spinlock.h>
28 #include <linux/adb.h>
29 #include <linux/pmu.h>
30 #include <linux/ioport.h>
31 #include <linux/pci.h>
32 #include <asm/sections.h>
33 #include <asm/errno.h>
34 #include <asm/ohare.h>
35 #include <asm/heathrow.h>
36 #include <asm/keylargo.h>
37 #include <asm/uninorth.h>
40 #include <asm/machdep.h>
41 #include <asm/pmac_feature.h>
42 #include <asm/dbdma.h>
43 #include <asm/pci-bridge.h>
44 #include <asm/pmac_low_i2c.h>
49 #define DBG(fmt,...) printk(KERN_DEBUG fmt)
55 extern int powersave_lowspeed;
58 extern int powersave_nap;
59 extern struct device_node *k2_skiplist[2];
63 * We use a single global lock to protect accesses. Each driver has
64 * to take care of its own locking
66 static DEFINE_SPINLOCK(feature_lock __pmacdata);
68 #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
69 #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
73 * Instance of some macio stuffs
75 struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata;
77 struct macio_chip* __pmac
78 macio_find(struct device_node* child, int type)
83 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
84 if (child == macio_chips[i].of_node &&
85 (!type || macio_chips[i].type == type))
86 return &macio_chips[i];
87 child = child->parent;
92 static const char* macio_names[] __pmacdata =
110 * Uninorth reg. access. Note that Uni-N regs are big endian
113 #define UN_REG(r) (uninorth_base + ((r) >> 2))
114 #define UN_IN(r) (in_be32(UN_REG(r)))
115 #define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
116 #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
117 #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
119 static struct device_node* uninorth_node __pmacdata;
120 static u32 __iomem * uninorth_base __pmacdata;
121 static u32 uninorth_rev __pmacdata;
122 static int uninorth_u3 __pmacdata;
123 static void __iomem *u3_ht;
126 * For each motherboard family, we have a table of functions pointers
127 * that handle the various features.
130 typedef long (*feature_call)(struct device_node* node, long param, long value);
132 struct feature_table_entry {
133 unsigned int selector;
134 feature_call function;
139 const char* model_string;
140 const char* model_name;
142 struct feature_table_entry* features;
143 unsigned long board_flags;
145 static struct pmac_mb_def pmac_mb __pmacdata;
148 * Here are the chip specific feature functions
151 static inline int __pmac
152 simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
154 struct macio_chip* macio;
157 macio = macio_find(node, type);
162 MACIO_BIS(reg, mask);
164 MACIO_BIC(reg, mask);
165 (void)MACIO_IN32(reg);
171 #ifndef CONFIG_POWER4
174 ohare_htw_scc_enable(struct device_node* node, long param, long value)
176 struct macio_chip* macio;
177 unsigned long chan_mask;
183 macio = macio_find(node, 0);
186 if (!strcmp(node->name, "ch-a"))
187 chan_mask = MACIO_FLAG_SCCA_ON;
188 else if (!strcmp(node->name, "ch-b"))
189 chan_mask = MACIO_FLAG_SCCB_ON;
193 htw = (macio->type == macio_heathrow || macio->type == macio_paddington
194 || macio->type == macio_gatwick);
195 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
196 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
197 pmac_mb.model_id != PMAC_TYPE_YIKES);
199 #ifdef CONFIG_ADB_PMU
200 if ((param & 0xfff) == PMAC_SCC_IRDA)
202 #endif /* CONFIG_ADB_PMU */
204 fcr = MACIO_IN32(OHARE_FCR);
205 /* Check if scc cell need enabling */
206 if (!(fcr & OH_SCC_ENABLE)) {
207 fcr |= OH_SCC_ENABLE;
209 /* Side effect: this will also power up the
210 * modem, but it's too messy to figure out on which
211 * ports this controls the tranceiver and on which
212 * it controls the modem
215 fcr &= ~HRW_SCC_TRANS_EN_N;
216 MACIO_OUT32(OHARE_FCR, fcr);
217 fcr |= (rmask = HRW_RESET_SCC);
218 MACIO_OUT32(OHARE_FCR, fcr);
220 fcr |= (rmask = OH_SCC_RESET);
221 MACIO_OUT32(OHARE_FCR, fcr);
224 (void)MACIO_IN32(OHARE_FCR);
228 MACIO_OUT32(OHARE_FCR, fcr);
230 if (chan_mask & MACIO_FLAG_SCCA_ON)
232 if (chan_mask & MACIO_FLAG_SCCB_ON)
234 MACIO_OUT32(OHARE_FCR, fcr);
235 macio->flags |= chan_mask;
237 if (param & PMAC_SCC_FLAG_XMON)
238 macio->flags |= MACIO_FLAG_SCC_LOCKED;
240 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
243 fcr = MACIO_IN32(OHARE_FCR);
244 if (chan_mask & MACIO_FLAG_SCCA_ON)
246 if (chan_mask & MACIO_FLAG_SCCB_ON)
248 MACIO_OUT32(OHARE_FCR, fcr);
249 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
250 fcr &= ~OH_SCC_ENABLE;
252 fcr |= HRW_SCC_TRANS_EN_N;
253 MACIO_OUT32(OHARE_FCR, fcr);
255 macio->flags &= ~(chan_mask);
258 #ifdef CONFIG_ADB_PMU
259 if ((param & 0xfff) == PMAC_SCC_IRDA)
261 #endif /* CONFIG_ADB_PMU */
267 ohare_floppy_enable(struct device_node* node, long param, long value)
269 return simple_feature_tweak(node, macio_ohare,
270 OHARE_FCR, OH_FLOPPY_ENABLE, value);
274 ohare_mesh_enable(struct device_node* node, long param, long value)
276 return simple_feature_tweak(node, macio_ohare,
277 OHARE_FCR, OH_MESH_ENABLE, value);
281 ohare_ide_enable(struct device_node* node, long param, long value)
285 /* For some reason, setting the bit in set_initial_features()
286 * doesn't stick. I'm still investigating... --BenH.
289 simple_feature_tweak(node, macio_ohare,
290 OHARE_FCR, OH_IOBUS_ENABLE, 1);
291 return simple_feature_tweak(node, macio_ohare,
292 OHARE_FCR, OH_IDE0_ENABLE, value);
294 return simple_feature_tweak(node, macio_ohare,
295 OHARE_FCR, OH_BAY_IDE_ENABLE, value);
302 ohare_ide_reset(struct device_node* node, long param, long value)
306 return simple_feature_tweak(node, macio_ohare,
307 OHARE_FCR, OH_IDE0_RESET_N, !value);
309 return simple_feature_tweak(node, macio_ohare,
310 OHARE_FCR, OH_IDE1_RESET_N, !value);
317 ohare_sleep_state(struct device_node* node, long param, long value)
319 struct macio_chip* macio = &macio_chips[0];
321 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
324 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
325 } else if (value == 0) {
326 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
333 heathrow_modem_enable(struct device_node* node, long param, long value)
335 struct macio_chip* macio;
339 macio = macio_find(node, macio_unknown);
342 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
345 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
347 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
350 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
351 pmac_mb.model_id != PMAC_TYPE_YIKES) {
354 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
356 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
358 (void)MACIO_IN32(HEATHROW_FCR);
363 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
364 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
365 UNLOCK(flags); mdelay(250); LOCK(flags);
366 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
367 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
368 UNLOCK(flags); mdelay(250); LOCK(flags);
369 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
370 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
371 UNLOCK(flags); mdelay(250);
377 heathrow_floppy_enable(struct device_node* node, long param, long value)
379 return simple_feature_tweak(node, macio_unknown,
381 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
386 heathrow_mesh_enable(struct device_node* node, long param, long value)
388 struct macio_chip* macio;
391 macio = macio_find(node, macio_unknown);
395 /* Set clear mesh cell enable */
397 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
399 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
400 (void)MACIO_IN32(HEATHROW_FCR);
402 /* Set/Clear termination power */
404 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
406 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
407 (void)MACIO_IN32(HEATHROW_MBCR);
415 heathrow_ide_enable(struct device_node* node, long param, long value)
419 return simple_feature_tweak(node, macio_unknown,
420 HEATHROW_FCR, HRW_IDE0_ENABLE, value);
422 return simple_feature_tweak(node, macio_unknown,
423 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
430 heathrow_ide_reset(struct device_node* node, long param, long value)
434 return simple_feature_tweak(node, macio_unknown,
435 HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
437 return simple_feature_tweak(node, macio_unknown,
438 HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
445 heathrow_bmac_enable(struct device_node* node, long param, long value)
447 struct macio_chip* macio;
450 macio = macio_find(node, 0);
455 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
456 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
458 (void)MACIO_IN32(HEATHROW_FCR);
461 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
463 (void)MACIO_IN32(HEATHROW_FCR);
467 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
474 heathrow_sound_enable(struct device_node* node, long param, long value)
476 struct macio_chip* macio;
479 /* B&W G3 and Yikes don't support that properly (the
480 * sound appear to never come back after beeing shut down).
482 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
483 pmac_mb.model_id == PMAC_TYPE_YIKES)
486 macio = macio_find(node, 0);
491 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
492 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
494 (void)MACIO_IN32(HEATHROW_FCR);
497 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
498 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
504 static u32 save_fcr[6] __pmacdata;
505 static u32 save_mbcr __pmacdata;
506 static u32 save_gpio_levels[2] __pmacdata;
507 static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata;
508 static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata;
509 static u32 save_unin_clock_ctl __pmacdata;
510 static struct dbdma_regs save_dbdma[13] __pmacdata;
511 static struct dbdma_regs save_alt_dbdma[13] __pmacdata;
514 dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
518 /* Save state & config of DBDMA channels */
519 for (i=0; i<13; i++) {
520 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
521 (macio->base + ((0x8000+i*0x100)>>2));
522 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
523 save[i].cmdptr = in_le32(&chan->cmdptr);
524 save[i].intr_sel = in_le32(&chan->intr_sel);
525 save[i].br_sel = in_le32(&chan->br_sel);
526 save[i].wait_sel = in_le32(&chan->wait_sel);
531 dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
535 /* Save state & config of DBDMA channels */
536 for (i=0; i<13; i++) {
537 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
538 (macio->base + ((0x8000+i*0x100)>>2));
539 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
540 while (in_le32(&chan->status) & ACTIVE)
542 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
543 out_le32(&chan->cmdptr, save[i].cmdptr);
544 out_le32(&chan->intr_sel, save[i].intr_sel);
545 out_le32(&chan->br_sel, save[i].br_sel);
546 out_le32(&chan->wait_sel, save[i].wait_sel);
551 heathrow_sleep(struct macio_chip* macio, int secondary)
554 dbdma_save(macio, save_alt_dbdma);
555 save_fcr[2] = MACIO_IN32(0x38);
556 save_fcr[3] = MACIO_IN32(0x3c);
558 dbdma_save(macio, save_dbdma);
559 save_fcr[0] = MACIO_IN32(0x38);
560 save_fcr[1] = MACIO_IN32(0x3c);
561 save_mbcr = MACIO_IN32(0x34);
562 /* Make sure sound is shut down */
563 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
564 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
565 /* This seems to be necessary as well or the fan
566 * keeps coming up and battery drains fast */
567 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
568 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
569 /* Make sure eth is down even if module or sleep
570 * won't work properly */
571 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
573 /* Make sure modem is shut down */
574 MACIO_OUT8(HRW_GPIO_MODEM_RESET,
575 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
576 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
577 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
579 /* Let things settle */
580 (void)MACIO_IN32(HEATHROW_FCR);
584 heathrow_wakeup(struct macio_chip* macio, int secondary)
587 MACIO_OUT32(0x38, save_fcr[2]);
588 (void)MACIO_IN32(0x38);
590 MACIO_OUT32(0x3c, save_fcr[3]);
591 (void)MACIO_IN32(0x38);
593 dbdma_restore(macio, save_alt_dbdma);
595 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
596 (void)MACIO_IN32(0x38);
598 MACIO_OUT32(0x3c, save_fcr[1]);
599 (void)MACIO_IN32(0x38);
601 MACIO_OUT32(0x34, save_mbcr);
602 (void)MACIO_IN32(0x38);
604 dbdma_restore(macio, save_dbdma);
609 heathrow_sleep_state(struct device_node* node, long param, long value)
611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
614 if (macio_chips[1].type == macio_gatwick)
615 heathrow_sleep(&macio_chips[0], 1);
616 heathrow_sleep(&macio_chips[0], 0);
617 } else if (value == 0) {
618 heathrow_wakeup(&macio_chips[0], 0);
619 if (macio_chips[1].type == macio_gatwick)
620 heathrow_wakeup(&macio_chips[0], 1);
626 core99_scc_enable(struct device_node* node, long param, long value)
628 struct macio_chip* macio;
630 unsigned long chan_mask;
633 macio = macio_find(node, 0);
636 if (!strcmp(node->name, "ch-a"))
637 chan_mask = MACIO_FLAG_SCCA_ON;
638 else if (!strcmp(node->name, "ch-b"))
639 chan_mask = MACIO_FLAG_SCCB_ON;
644 int need_reset_scc = 0;
645 int need_reset_irda = 0;
648 fcr = MACIO_IN32(KEYLARGO_FCR0);
649 /* Check if scc cell need enabling */
650 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
651 fcr |= KL0_SCC_CELL_ENABLE;
654 if (chan_mask & MACIO_FLAG_SCCA_ON) {
655 fcr |= KL0_SCCA_ENABLE;
656 /* Don't enable line drivers for I2S modem */
657 if ((param & 0xfff) == PMAC_SCC_I2S1)
658 fcr &= ~KL0_SCC_A_INTF_ENABLE;
660 fcr |= KL0_SCC_A_INTF_ENABLE;
662 if (chan_mask & MACIO_FLAG_SCCB_ON) {
663 fcr |= KL0_SCCB_ENABLE;
664 /* Perform irda specific inits */
665 if ((param & 0xfff) == PMAC_SCC_IRDA) {
666 fcr &= ~KL0_SCC_B_INTF_ENABLE;
667 fcr |= KL0_IRDA_ENABLE;
668 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
669 fcr |= KL0_IRDA_SOURCE1_SEL;
670 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
671 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
674 fcr |= KL0_SCC_B_INTF_ENABLE;
676 MACIO_OUT32(KEYLARGO_FCR0, fcr);
677 macio->flags |= chan_mask;
678 if (need_reset_scc) {
679 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
680 (void)MACIO_IN32(KEYLARGO_FCR0);
684 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
686 if (need_reset_irda) {
687 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
688 (void)MACIO_IN32(KEYLARGO_FCR0);
692 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
695 if (param & PMAC_SCC_FLAG_XMON)
696 macio->flags |= MACIO_FLAG_SCC_LOCKED;
698 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
701 fcr = MACIO_IN32(KEYLARGO_FCR0);
702 if (chan_mask & MACIO_FLAG_SCCA_ON)
703 fcr &= ~KL0_SCCA_ENABLE;
704 if (chan_mask & MACIO_FLAG_SCCB_ON) {
705 fcr &= ~KL0_SCCB_ENABLE;
706 /* Perform irda specific clears */
707 if ((param & 0xfff) == PMAC_SCC_IRDA) {
708 fcr &= ~KL0_IRDA_ENABLE;
709 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
710 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
711 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
714 MACIO_OUT32(KEYLARGO_FCR0, fcr);
715 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
716 fcr &= ~KL0_SCC_CELL_ENABLE;
717 MACIO_OUT32(KEYLARGO_FCR0, fcr);
719 macio->flags &= ~(chan_mask);
727 core99_modem_enable(struct device_node* node, long param, long value)
729 struct macio_chip* macio;
733 /* Hack for internal USB modem */
735 if (macio_chips[0].type != macio_keylargo)
737 node = macio_chips[0].of_node;
739 macio = macio_find(node, 0);
742 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
743 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
744 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
748 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
750 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
755 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
757 (void)MACIO_IN32(KEYLARGO_FCR2);
760 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
765 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
766 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
767 UNLOCK(flags); mdelay(250); LOCK(flags);
768 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
769 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
770 UNLOCK(flags); mdelay(250); LOCK(flags);
771 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
772 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
773 UNLOCK(flags); mdelay(250);
779 pangea_modem_enable(struct device_node* node, long param, long value)
781 struct macio_chip* macio;
785 /* Hack for internal USB modem */
787 if (macio_chips[0].type != macio_pangea &&
788 macio_chips[0].type != macio_intrepid)
790 node = macio_chips[0].of_node;
792 macio = macio_find(node, 0);
795 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
796 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
797 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
801 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
803 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
808 MACIO_OUT8(KL_GPIO_MODEM_POWER,
809 KEYLARGO_GPIO_OUTPUT_ENABLE);
811 (void)MACIO_IN32(KEYLARGO_FCR2);
814 MACIO_OUT8(KL_GPIO_MODEM_POWER,
815 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
820 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
821 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
822 UNLOCK(flags); mdelay(250); LOCK(flags);
823 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
824 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
825 UNLOCK(flags); mdelay(250); LOCK(flags);
826 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
827 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
828 UNLOCK(flags); mdelay(250);
834 core99_ata100_enable(struct device_node* node, long value)
837 struct pci_dev *pdev = NULL;
840 if (uninorth_rev < 0x24)
845 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
847 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
848 (void)UN_IN(UNI_N_CLOCK_CNTL);
853 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
854 pdev = pci_find_slot(pbus, pid);
857 pci_enable_device(pdev);
858 pci_set_master(pdev);
864 core99_ide_enable(struct device_node* node, long param, long value)
866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
871 return simple_feature_tweak(node, macio_unknown,
872 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
874 return simple_feature_tweak(node, macio_unknown,
875 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
877 return simple_feature_tweak(node, macio_unknown,
878 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
880 return core99_ata100_enable(node, value);
887 core99_ide_reset(struct device_node* node, long param, long value)
891 return simple_feature_tweak(node, macio_unknown,
892 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
894 return simple_feature_tweak(node, macio_unknown,
895 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
897 return simple_feature_tweak(node, macio_unknown,
898 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
905 core99_gmac_enable(struct device_node* node, long param, long value)
911 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
913 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
914 (void)UN_IN(UNI_N_CLOCK_CNTL);
922 core99_gmac_phy_reset(struct device_node* node, long param, long value)
925 struct macio_chip* macio;
927 macio = &macio_chips[0];
928 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
929 macio->type != macio_intrepid)
933 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
934 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
938 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
939 KEYLARGO_GPIO_OUTOUT_DATA);
947 core99_sound_chip_enable(struct device_node* node, long param, long value)
949 struct macio_chip* macio;
952 macio = macio_find(node, 0);
956 /* Do a better probe code, screamer G4 desktops &
957 * iMacs can do that too, add a recalibrate in
960 if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
961 pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
964 MACIO_OUT8(KL_GPIO_SOUND_POWER,
965 KEYLARGO_GPIO_OUTPUT_ENABLE |
966 KEYLARGO_GPIO_OUTOUT_DATA);
968 MACIO_OUT8(KL_GPIO_SOUND_POWER,
969 KEYLARGO_GPIO_OUTPUT_ENABLE);
970 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
977 core99_airport_enable(struct device_node* node, long param, long value)
979 struct macio_chip* macio;
983 macio = macio_find(node, 0);
987 /* Hint: we allow passing of macio itself for the sake of the
990 if (node != macio->of_node &&
991 (!node->parent || node->parent != macio->of_node))
993 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
997 /* This code is a reproduction of OF enable-cardslot
998 * and init-wireless methods, slightly hacked until
1002 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
1003 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
1007 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
1008 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
1014 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1015 (void)MACIO_IN32(KEYLARGO_FCR2);
1017 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
1018 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
1020 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1021 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1023 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1024 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1026 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1027 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1029 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1030 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1033 MACIO_OUT32(0x1c000, 0);
1035 MACIO_OUT8(0x1a3e0, 0x41);
1036 (void)MACIO_IN8(0x1a3e0);
1039 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1040 (void)MACIO_IN32(KEYLARGO_FCR2);
1044 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1047 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1048 (void)MACIO_IN32(KEYLARGO_FCR2);
1049 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1050 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1051 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1052 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1053 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1054 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1057 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1064 core99_reset_cpu(struct device_node* node, long param, long value)
1066 unsigned int reset_io = 0;
1067 unsigned long flags;
1068 struct macio_chip* macio;
1069 struct device_node* np;
1070 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0,
1073 KL_GPIO_RESET_CPU3 };
1075 macio = &macio_chips[0];
1076 if (macio->type != macio_keylargo)
1079 np = find_path_device("/cpus");
1082 for (np = np->child; np != NULL; np = np->sibling) {
1083 u32* num = (u32 *)get_property(np, "reg", NULL);
1084 u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
1085 if (num == NULL || rst == NULL)
1087 if (param == *num) {
1092 if (np == NULL || reset_io == 0)
1093 reset_io = dflt_reset_lines[param];
1096 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1097 (void)MACIO_IN8(reset_io);
1099 MACIO_OUT8(reset_io, 0);
1100 (void)MACIO_IN8(reset_io);
1105 #endif /* CONFIG_SMP */
1108 core99_usb_enable(struct device_node* node, long param, long value)
1110 struct macio_chip* macio;
1111 unsigned long flags;
1116 macio = &macio_chips[0];
1117 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1118 macio->type != macio_intrepid)
1121 prop = (char *)get_property(node, "AAPL,clock-id", NULL);
1124 if (strncmp(prop, "usb0u048", 8) == 0)
1126 else if (strncmp(prop, "usb1u148", 8) == 0)
1128 else if (strncmp(prop, "usb2u248", 8) == 0)
1133 /* Sorry for the brute-force locking, but this is only used during
1134 * sleep and the timing seem to be critical
1140 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1141 (void)MACIO_IN32(KEYLARGO_FCR0);
1145 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1146 } else if (number == 2) {
1147 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1149 (void)MACIO_IN32(KEYLARGO_FCR0);
1152 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1153 } else if (number == 4) {
1154 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1156 (void)MACIO_IN32(KEYLARGO_FCR1);
1159 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1162 reg = MACIO_IN32(KEYLARGO_FCR4);
1163 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1164 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1165 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1166 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1167 MACIO_OUT32(KEYLARGO_FCR4, reg);
1168 (void)MACIO_IN32(KEYLARGO_FCR4);
1171 reg = MACIO_IN32(KEYLARGO_FCR3);
1172 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1173 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1174 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1175 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1176 MACIO_OUT32(KEYLARGO_FCR3, reg);
1177 (void)MACIO_IN32(KEYLARGO_FCR3);
1180 if (macio->type == macio_intrepid) {
1181 /* wait for clock stopped bits to clear */
1182 u32 test0 = 0, test1 = 0;
1183 u32 status0, status1;
1189 test0 = UNI_N_CLOCK_STOPPED_USB0;
1190 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1193 test0 = UNI_N_CLOCK_STOPPED_USB1;
1194 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1197 test0 = UNI_N_CLOCK_STOPPED_USB2;
1198 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1202 if (--timeout <= 0) {
1203 printk(KERN_ERR "core99_usb_enable: "
1204 "Timeout waiting for clocks\n");
1208 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1209 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1210 } while ((status0 & test0) | (status1 & test1));
1216 reg = MACIO_IN32(KEYLARGO_FCR4);
1217 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1218 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1219 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1220 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1221 MACIO_OUT32(KEYLARGO_FCR4, reg);
1222 (void)MACIO_IN32(KEYLARGO_FCR4);
1225 reg = MACIO_IN32(KEYLARGO_FCR3);
1226 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1227 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1228 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1229 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1230 MACIO_OUT32(KEYLARGO_FCR3, reg);
1231 (void)MACIO_IN32(KEYLARGO_FCR3);
1235 if (macio->type != macio_intrepid)
1236 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1237 (void)MACIO_IN32(KEYLARGO_FCR0);
1239 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1240 (void)MACIO_IN32(KEYLARGO_FCR0);
1241 } else if (number == 2) {
1242 if (macio->type != macio_intrepid)
1243 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1244 (void)MACIO_IN32(KEYLARGO_FCR0);
1246 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1247 (void)MACIO_IN32(KEYLARGO_FCR0);
1248 } else if (number == 4) {
1250 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1251 (void)MACIO_IN32(KEYLARGO_FCR1);
1261 core99_firewire_enable(struct device_node* node, long param, long value)
1263 unsigned long flags;
1264 struct macio_chip* macio;
1266 macio = &macio_chips[0];
1267 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1268 macio->type != macio_intrepid)
1270 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1275 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1276 (void)UN_IN(UNI_N_CLOCK_CNTL);
1278 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1279 (void)UN_IN(UNI_N_CLOCK_CNTL);
1288 core99_firewire_cable_power(struct device_node* node, long param, long value)
1290 unsigned long flags;
1291 struct macio_chip* macio;
1293 /* Trick: we allow NULL node */
1294 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1296 macio = &macio_chips[0];
1297 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1298 macio->type != macio_intrepid)
1300 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1305 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1306 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1309 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1310 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1319 intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1321 unsigned long flags;
1323 if (uninorth_rev < 0xd2)
1328 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1330 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1337 #endif /* CONFIG_POWER4 */
1340 core99_read_gpio(struct device_node* node, long param, long value)
1342 struct macio_chip* macio = &macio_chips[0];
1344 return MACIO_IN8(param);
1349 core99_write_gpio(struct device_node* node, long param, long value)
1351 struct macio_chip* macio = &macio_chips[0];
1353 MACIO_OUT8(param, (u8)(value & 0xff));
1357 #ifdef CONFIG_POWER4
1360 g5_gmac_enable(struct device_node* node, long param, long value)
1362 struct macio_chip* macio = &macio_chips[0];
1363 unsigned long flags;
1368 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1370 k2_skiplist[0] = NULL;
1372 k2_skiplist[0] = node;
1374 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1384 g5_fw_enable(struct device_node* node, long param, long value)
1386 struct macio_chip* macio = &macio_chips[0];
1387 unsigned long flags;
1391 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1393 k2_skiplist[1] = NULL;
1395 k2_skiplist[1] = node;
1397 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1407 g5_mpic_enable(struct device_node* node, long param, long value)
1409 unsigned long flags;
1411 if (node->parent == NULL || strcmp(node->parent->name, "u3"))
1415 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1423 g5_reset_cpu(struct device_node* node, long param, long value)
1425 unsigned int reset_io = 0;
1426 unsigned long flags;
1427 struct macio_chip* macio;
1428 struct device_node* np;
1430 macio = &macio_chips[0];
1431 if (macio->type != macio_keylargo2)
1434 np = find_path_device("/cpus");
1437 for (np = np->child; np != NULL; np = np->sibling) {
1438 u32* num = (u32 *)get_property(np, "reg", NULL);
1439 u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
1440 if (num == NULL || rst == NULL)
1442 if (param == *num) {
1447 if (np == NULL || reset_io == 0)
1451 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1452 (void)MACIO_IN8(reset_io);
1454 MACIO_OUT8(reset_io, 0);
1455 (void)MACIO_IN8(reset_io);
1460 #endif /* CONFIG_SMP */
1463 * This can be called from pmac_smp so isn't static
1465 * This takes the second CPU off the bus on dual CPU machines
1468 void __pmac g5_phy_disable_cpu1(void)
1470 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1473 #endif /* CONFIG_POWER4 */
1475 #ifndef CONFIG_POWER4
1478 keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1484 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1485 (void)MACIO_IN32(KEYLARGO_FCR0);
1489 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1490 KL0_SCC_CELL_ENABLE |
1491 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1492 KL0_IRDA_CLK19_ENABLE);
1494 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1495 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1497 MACIO_BIC(KEYLARGO_FCR1,
1498 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1499 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1500 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1501 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1502 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1503 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1504 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1507 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1508 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1510 temp = MACIO_IN32(KEYLARGO_FCR3);
1511 if (macio->rev >= 2) {
1512 temp |= KL3_SHUTDOWN_PLL2X;
1514 temp |= KL3_SHUTDOWN_PLL_TOTAL;
1517 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1518 KL3_SHUTDOWN_PLLKW35;
1520 temp |= KL3_SHUTDOWN_PLLKW12;
1521 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1522 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1524 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1525 MACIO_OUT32(KEYLARGO_FCR3, temp);
1527 /* Flush posted writes & wait a bit */
1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1532 pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1536 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1537 KL0_SCC_CELL_ENABLE |
1538 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1540 MACIO_BIC(KEYLARGO_FCR1,
1541 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1542 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1543 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1544 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1545 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1547 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1548 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1550 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1552 temp = MACIO_IN32(KEYLARGO_FCR3);
1553 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1554 KL3_SHUTDOWN_PLLKW35;
1555 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1556 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1558 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1559 MACIO_OUT32(KEYLARGO_FCR3, temp);
1561 /* Flush posted writes & wait a bit */
1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1566 intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1570 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1571 KL0_SCC_CELL_ENABLE);
1573 MACIO_BIC(KEYLARGO_FCR1,
1574 /*KL1_USB2_CELL_ENABLE |*/
1575 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1576 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1577 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);
1578 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1579 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1581 temp = MACIO_IN32(KEYLARGO_FCR3);
1582 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1583 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1585 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1586 MACIO_OUT32(KEYLARGO_FCR3, temp);
1588 /* Flush posted writes & wait a bit */
1589 (void)MACIO_IN32(KEYLARGO_FCR0);
1596 struct macio_chip* macio;
1599 macio = &macio_chips[0];
1600 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1601 macio->type != macio_intrepid)
1604 /* The device-tree contains that in the hwclock node */
1605 if (macio->type == macio_intrepid) {
1606 UN_OUT(UNI_N_CLOCK_SPREADING, 0);
1610 /* We power off the wireless slot in case it was not done
1611 * by the driver. We don't power it on automatically however
1613 if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1614 core99_airport_enable(macio->of_node, 0, 0);
1616 /* We power off the FW cable. Should be done by the driver... */
1617 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1618 core99_firewire_enable(NULL, 0, 0);
1619 core99_firewire_cable_power(NULL, 0, 0);
1622 /* We make sure int. modem is off (in case driver lost it) */
1623 if (macio->type == macio_keylargo)
1624 core99_modem_enable(macio->of_node, 0, 0);
1626 pangea_modem_enable(macio->of_node, 0, 0);
1628 /* We make sure the sound is off as well */
1629 core99_sound_chip_enable(macio->of_node, 0, 0);
1632 * Save various bits of KeyLargo
1635 /* Save the state of the various GPIOs */
1636 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1637 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1638 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1639 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1640 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1641 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1644 if (macio->type == macio_keylargo)
1645 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1646 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1647 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1648 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1649 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1650 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1651 if (macio->type == macio_pangea || macio->type == macio_intrepid)
1652 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1654 /* Save state & config of DBDMA channels */
1655 dbdma_save(macio, save_dbdma);
1658 * Turn off as much as we can
1660 if (macio->type == macio_pangea)
1661 pangea_shutdown(macio, 1);
1662 else if (macio->type == macio_intrepid)
1663 intrepid_shutdown(macio, 1);
1664 else if (macio->type == macio_keylargo)
1665 keylargo_shutdown(macio, 1);
1668 * Put the host bridge to sleep
1671 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1672 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1675 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1676 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1678 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1679 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1683 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1685 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1686 MACIO_BIS(0x506e0, 0x00400000);
1687 MACIO_BIS(0x506e0, 0x80000000);
1693 core99_wake_up(void)
1695 struct macio_chip* macio;
1698 macio = &macio_chips[0];
1699 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1700 macio->type != macio_intrepid)
1704 * Wakeup the host bridge
1706 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1708 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1715 if (macio->type == macio_keylargo) {
1716 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1717 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1719 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1720 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1721 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1722 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1723 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1724 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1725 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1726 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1727 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1728 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1729 if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1730 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1731 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1734 dbdma_restore(macio, save_dbdma);
1736 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1737 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1738 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1739 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1740 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1741 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1743 /* FIXME more black magic with OpenPIC ... */
1744 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1745 MACIO_BIC(0x506e0, 0x00400000);
1746 MACIO_BIC(0x506e0, 0x80000000);
1749 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1752 /* Restore clock spreading */
1753 if (macio->type == macio_intrepid) {
1754 UN_OUT(UNI_N_CLOCK_SPREADING, 2);
1762 core99_sleep_state(struct device_node* node, long param, long value)
1764 /* Param == 1 means to enter the "fake sleep" mode that is
1765 * used for CPU speed switch
1769 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1770 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1772 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1774 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1779 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1783 return core99_sleep();
1784 else if (value == 0)
1785 return core99_wake_up();
1789 #endif /* CONFIG_POWER4 */
1792 generic_dev_can_wake(struct device_node* node, long param, long value)
1794 /* Todo: eventually check we are really dealing with on-board
1798 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1799 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1804 generic_get_mb_info(struct device_node* node, long param, long value)
1807 case PMAC_MB_INFO_MODEL:
1808 return pmac_mb.model_id;
1809 case PMAC_MB_INFO_FLAGS:
1810 return pmac_mb.board_flags;
1811 case PMAC_MB_INFO_NAME:
1812 /* hack hack hack... but should work */
1813 *((const char **)value) = pmac_mb.model_name;
1824 /* Used on any machine
1826 static struct feature_table_entry any_features[] __pmacdata = {
1827 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1828 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1832 #ifndef CONFIG_POWER4
1834 /* OHare based motherboards. Currently, we only use these on the
1835 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1836 * to have issues with turning on/off those asic cells
1838 static struct feature_table_entry ohare_features[] __pmacdata = {
1839 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1840 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1841 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
1842 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable},
1843 { PMAC_FTR_IDE_RESET, ohare_ide_reset},
1844 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state },
1848 /* Heathrow desktop machines (Beige G3).
1849 * Separated as some features couldn't be properly tested
1850 * and the serial port control bits appear to confuse it.
1852 static struct feature_table_entry heathrow_desktop_features[] __pmacdata = {
1853 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1854 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1855 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1856 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1857 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1861 /* Heathrow based laptop, that is the Wallstreet and mainstreet
1864 static struct feature_table_entry heathrow_laptop_features[] __pmacdata = {
1865 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1866 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1867 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1868 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1869 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1870 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1871 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1872 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1873 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1877 /* Paddington based machines
1878 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1880 static struct feature_table_entry paddington_features[] __pmacdata = {
1881 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1882 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1883 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1884 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1885 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1886 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1887 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1888 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1889 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1893 /* Core99 & MacRISC 2 machines (all machines released since the
1894 * iBook (included), that is all AGP machines, except pangea
1895 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1896 * used on iBook2 & iMac "flow power".
1898 static struct feature_table_entry core99_features[] __pmacdata = {
1899 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1900 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1901 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1902 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1903 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1904 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1905 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1906 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1907 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1908 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1909 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1910 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1912 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
1913 #endif /* CONFIG_SMP */
1914 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1915 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1921 static struct feature_table_entry rackmac_features[] __pmacdata = {
1922 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1923 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1924 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1925 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1926 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1927 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1928 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1929 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1930 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1932 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
1933 #endif /* CONFIG_SMP */
1934 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1935 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1941 static struct feature_table_entry pangea_features[] __pmacdata = {
1942 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1943 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
1944 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1945 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1946 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1947 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1948 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1949 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1950 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1951 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1952 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1953 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1954 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1955 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1959 /* Intrepid features
1961 static struct feature_table_entry intrepid_features[] __pmacdata = {
1962 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1963 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
1964 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
1965 { PMAC_FTR_IDE_RESET, core99_ide_reset },
1966 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
1967 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
1968 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
1969 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
1970 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
1971 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
1972 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
1973 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
1974 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1975 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1976 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable },
1980 #else /* CONFIG_POWER4 */
1984 static struct feature_table_entry g5_features[] __pmacdata = {
1985 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
1986 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
1987 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
1989 { PMAC_FTR_RESET_CPU, g5_reset_cpu },
1990 #endif /* CONFIG_SMP */
1991 { PMAC_FTR_READ_GPIO, core99_read_gpio },
1992 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
1996 #endif /* CONFIG_POWER4 */
1998 static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
1999 #ifndef CONFIG_POWER4
2004 { "AAPL,8500", "PowerMac 8500/8600",
2005 PMAC_TYPE_PSURGE, NULL,
2008 { "AAPL,9500", "PowerMac 9500/9600",
2009 PMAC_TYPE_PSURGE, NULL,
2012 { "AAPL,7200", "PowerMac 7200",
2013 PMAC_TYPE_PSURGE, NULL,
2016 { "AAPL,7300", "PowerMac 7200/7300",
2017 PMAC_TYPE_PSURGE, NULL,
2020 { "AAPL,7500", "PowerMac 7500",
2021 PMAC_TYPE_PSURGE, NULL,
2024 { "AAPL,ShinerESB", "Apple Network Server",
2025 PMAC_TYPE_ANS, NULL,
2028 { "AAPL,e407", "Alchemy",
2029 PMAC_TYPE_ALCHEMY, NULL,
2032 { "AAPL,e411", "Gazelle",
2033 PMAC_TYPE_GAZELLE, NULL,
2036 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)",
2037 PMAC_TYPE_GOSSAMER, heathrow_desktop_features,
2040 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)",
2041 PMAC_TYPE_SILK, heathrow_desktop_features,
2044 { "PowerMac1,1", "Blue&White G3",
2045 PMAC_TYPE_YOSEMITE, paddington_features,
2048 { "PowerMac1,2", "PowerMac G4 PCI Graphics",
2049 PMAC_TYPE_YIKES, paddington_features,
2052 { "PowerMac2,1", "iMac FireWire",
2053 PMAC_TYPE_FW_IMAC, core99_features,
2054 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2056 { "PowerMac2,2", "iMac FireWire",
2057 PMAC_TYPE_FW_IMAC, core99_features,
2058 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2060 { "PowerMac3,1", "PowerMac G4 AGP Graphics",
2061 PMAC_TYPE_SAWTOOTH, core99_features,
2064 { "PowerMac3,2", "PowerMac G4 AGP Graphics",
2065 PMAC_TYPE_SAWTOOTH, core99_features,
2066 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2068 { "PowerMac3,3", "PowerMac G4 AGP Graphics",
2069 PMAC_TYPE_SAWTOOTH, core99_features,
2070 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2072 { "PowerMac3,4", "PowerMac G4 Silver",
2073 PMAC_TYPE_QUICKSILVER, core99_features,
2076 { "PowerMac3,5", "PowerMac G4 Silver",
2077 PMAC_TYPE_QUICKSILVER, core99_features,
2080 { "PowerMac3,6", "PowerMac G4 Windtunnel",
2081 PMAC_TYPE_WINDTUNNEL, core99_features,
2084 { "PowerMac4,1", "iMac \"Flower Power\"",
2085 PMAC_TYPE_PANGEA_IMAC, pangea_features,
2088 { "PowerMac4,2", "Flat panel iMac",
2089 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
2092 { "PowerMac4,4", "eMac",
2093 PMAC_TYPE_EMAC, core99_features,
2096 { "PowerMac5,1", "PowerMac G4 Cube",
2097 PMAC_TYPE_CUBE, core99_features,
2098 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2100 { "PowerMac6,1", "Flat panel iMac",
2101 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2104 { "PowerMac6,3", "Flat panel iMac",
2105 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2108 { "PowerMac6,4", "eMac",
2109 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2112 { "PowerMac10,1", "Mac mini",
2113 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2114 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER,
2116 { "iMac,1", "iMac (first generation)",
2117 PMAC_TYPE_ORIG_IMAC, paddington_features,
2125 { "RackMac1,1", "XServe",
2126 PMAC_TYPE_RACKMAC, rackmac_features,
2129 { "RackMac1,2", "XServe rev. 2",
2130 PMAC_TYPE_RACKMAC, rackmac_features,
2138 { "AAPL,3400/2400", "PowerBook 3400",
2139 PMAC_TYPE_HOOPER, ohare_features,
2140 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2142 { "AAPL,3500", "PowerBook 3500",
2143 PMAC_TYPE_KANGA, ohare_features,
2144 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2146 { "AAPL,PowerBook1998", "PowerBook Wallstreet",
2147 PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
2148 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2150 { "PowerBook1,1", "PowerBook 101 (Lombard)",
2151 PMAC_TYPE_101_PBOOK, paddington_features,
2152 PMAC_MB_MAY_SLEEP | PMAC_MB_MOBILE
2154 { "PowerBook2,1", "iBook (first generation)",
2155 PMAC_TYPE_ORIG_IBOOK, core99_features,
2156 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2158 { "PowerBook2,2", "iBook FireWire",
2159 PMAC_TYPE_FW_IBOOK, core99_features,
2160 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2161 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2163 { "PowerBook3,1", "PowerBook Pismo",
2164 PMAC_TYPE_PISMO, core99_features,
2165 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2166 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2168 { "PowerBook3,2", "PowerBook Titanium",
2169 PMAC_TYPE_TITANIUM, core99_features,
2170 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2172 { "PowerBook3,3", "PowerBook Titanium II",
2173 PMAC_TYPE_TITANIUM2, core99_features,
2174 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2176 { "PowerBook3,4", "PowerBook Titanium III",
2177 PMAC_TYPE_TITANIUM3, core99_features,
2178 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2180 { "PowerBook3,5", "PowerBook Titanium IV",
2181 PMAC_TYPE_TITANIUM4, core99_features,
2182 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2184 { "PowerBook4,1", "iBook 2",
2185 PMAC_TYPE_IBOOK2, pangea_features,
2186 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2188 { "PowerBook4,2", "iBook 2",
2189 PMAC_TYPE_IBOOK2, pangea_features,
2190 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2192 { "PowerBook4,3", "iBook 2 rev. 2",
2193 PMAC_TYPE_IBOOK2, pangea_features,
2194 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2196 { "PowerBook5,1", "PowerBook G4 17\"",
2197 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2198 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2200 { "PowerBook5,2", "PowerBook G4 15\"",
2201 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2202 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2204 { "PowerBook5,3", "PowerBook G4 17\"",
2205 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2206 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2208 { "PowerBook5,4", "PowerBook G4 15\"",
2209 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2210 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2212 { "PowerBook5,5", "PowerBook G4 17\"",
2213 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2214 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2216 { "PowerBook5,6", "PowerBook G4 15\"",
2217 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2218 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2220 { "PowerBook5,7", "PowerBook G4 17\"",
2221 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2222 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2224 { "PowerBook6,1", "PowerBook G4 12\"",
2225 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2226 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2228 { "PowerBook6,2", "PowerBook G4",
2229 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2230 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2232 { "PowerBook6,3", "iBook G4",
2233 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2234 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2236 { "PowerBook6,4", "PowerBook G4 12\"",
2237 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2238 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2240 { "PowerBook6,5", "iBook G4",
2241 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2242 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2244 { "PowerBook6,8", "PowerBook G4 12\"",
2245 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2246 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2248 #else /* CONFIG_POWER4 */
2249 { "PowerMac7,2", "PowerMac G5",
2250 PMAC_TYPE_POWERMAC_G5, g5_features,
2253 #endif /* CONFIG_POWER4 */
2257 * The toplevel feature_call callback
2260 pmac_do_feature_call(unsigned int selector, ...)
2262 struct device_node* node;
2265 feature_call func = NULL;
2268 if (pmac_mb.features)
2269 for (i=0; pmac_mb.features[i].function; i++)
2270 if (pmac_mb.features[i].selector == selector) {
2271 func = pmac_mb.features[i].function;
2275 for (i=0; any_features[i].function; i++)
2276 if (any_features[i].selector == selector) {
2277 func = any_features[i].function;
2283 va_start(args, selector);
2284 node = (struct device_node*)va_arg(args, void*);
2285 param = va_arg(args, long);
2286 value = va_arg(args, long);
2289 return func(node, param, value);
2293 probe_motherboard(void)
2296 struct macio_chip* macio = &macio_chips[0];
2297 const char* model = NULL;
2298 struct device_node *dt;
2300 /* Lookup known motherboard type in device-tree. First try an
2301 * exact match on the "model" property, then try a "compatible"
2302 * match is none is found.
2304 dt = find_devices("device-tree");
2306 model = (const char *) get_property(dt, "model", NULL);
2307 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2308 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2309 pmac_mb = pmac_mb_defs[i];
2313 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2314 if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
2315 pmac_mb = pmac_mb_defs[i];
2320 /* Fallback to selection depending on mac-io chip type */
2321 switch(macio->type) {
2322 #ifndef CONFIG_POWER4
2323 case macio_grand_central:
2324 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2325 pmac_mb.model_name = "Unknown PowerSurge";
2328 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2329 pmac_mb.model_name = "Unknown OHare-based";
2331 case macio_heathrow:
2332 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2333 pmac_mb.model_name = "Unknown Heathrow-based";
2334 pmac_mb.features = heathrow_desktop_features;
2336 case macio_paddington:
2337 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2338 pmac_mb.model_name = "Unknown Paddington-based";
2339 pmac_mb.features = paddington_features;
2341 case macio_keylargo:
2342 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2343 pmac_mb.model_name = "Unknown Keylargo-based";
2344 pmac_mb.features = core99_features;
2347 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2348 pmac_mb.model_name = "Unknown Pangea-based";
2349 pmac_mb.features = pangea_features;
2351 case macio_intrepid:
2352 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2353 pmac_mb.model_name = "Unknown Intrepid-based";
2354 pmac_mb.features = intrepid_features;
2356 #else /* CONFIG_POWER4 */
2357 case macio_keylargo2:
2358 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2359 pmac_mb.model_name = "Unknown G5";
2360 pmac_mb.features = g5_features;
2362 #endif /* CONFIG_POWER4 */
2367 #ifndef CONFIG_POWER4
2368 /* Fixup Hooper vs. Comet */
2369 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2370 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2373 /* Here, I used to disable the media-bay on comet. It
2374 * appears this is wrong, the floppy connector is actually
2375 * a kind of media-bay and works with the current driver.
2377 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2378 pmac_mb.model_id = PMAC_TYPE_COMET;
2379 iounmap(mach_id_ptr);
2381 #endif /* CONFIG_POWER4 */
2384 /* Set default value of powersave_nap on machines that support it.
2385 * It appears that uninorth rev 3 has a problem with it, we don't
2386 * enable it on those. In theory, the flush-on-lock property is
2387 * supposed to be set when not supported, but I'm not very confident
2388 * that all Apple OF revs did it properly, I do it the paranoid way.
2390 while (uninorth_base && uninorth_rev > 3) {
2391 struct device_node* np = find_path_device("/cpus");
2392 if (!np || !np->child) {
2393 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2397 /* Nap mode not supported on SMP */
2400 /* Nap mode not supported if flush-on-lock property is present */
2401 if (get_property(np, "flush-on-lock", NULL))
2404 printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
2408 /* On CPUs that support it (750FX), lowspeed by default during
2411 powersave_lowspeed = 1;
2412 #endif /* CONFIG_6xx */
2413 #ifdef CONFIG_POWER4
2416 /* Check for "mobile" machine */
2417 if (model && (strncmp(model, "PowerBook", 9) == 0
2418 || strncmp(model, "iBook", 5) == 0))
2419 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2422 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2426 /* Initialize the Core99 UniNorth host bridge and memory controller
2429 probe_uninorth(void)
2431 unsigned long actrl;
2433 /* Locate core99 Uni-N */
2434 uninorth_node = of_find_node_by_name(NULL, "uni-n");
2436 if (uninorth_node == NULL) {
2437 uninorth_node = of_find_node_by_name(NULL, "u3");
2440 if (uninorth_node && uninorth_node->n_addrs > 0) {
2441 unsigned long address = uninorth_node->addrs[0].address;
2442 uninorth_base = ioremap(address, 0x40000);
2443 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2445 u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2447 uninorth_node = NULL;
2452 printk(KERN_INFO "Found %s memory controller & host bridge, revision: %d\n",
2453 uninorth_u3 ? "U3" : "UniNorth", uninorth_rev);
2454 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2456 /* Set the arbitrer QAck delay according to what Apple does
2458 if (uninorth_rev < 0x11) {
2459 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2460 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2461 UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2462 UN_OUT(UNI_N_ARB_CTRL, actrl);
2465 /* Some more magic as done by them in recent MacOS X on UniNorth
2466 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2469 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0)
2470 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2474 probe_one_macio(const char* name, const char* compat, int type)
2476 struct device_node* node;
2478 volatile u32 __iomem * base;
2481 node = find_devices(name);
2482 if (!node || !node->n_addrs)
2486 if (device_is_compatible(node, compat))
2492 for(i=0; i<MAX_MACIO_CHIPS; i++) {
2493 if (!macio_chips[i].of_node)
2495 if (macio_chips[i].of_node == node)
2498 if (i >= MAX_MACIO_CHIPS) {
2499 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2500 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2503 base = ioremap(node->addrs[0].address, node->addrs[0].size);
2505 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
2508 if (type == macio_keylargo) {
2509 u32* did = (u32 *)get_property(node, "device-id", NULL);
2510 if (*did == 0x00000025)
2511 type = macio_pangea;
2512 if (*did == 0x0000003e)
2513 type = macio_intrepid;
2515 macio_chips[i].of_node = node;
2516 macio_chips[i].type = type;
2517 macio_chips[i].base = base;
2518 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
2519 macio_chips[i].name = macio_names[type];
2520 revp = (u32 *)get_property(node, "revision-id", NULL);
2522 macio_chips[i].rev = *revp;
2523 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2524 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2530 /* Warning, ordering is important */
2531 probe_one_macio("gc", NULL, macio_grand_central);
2532 probe_one_macio("ohare", NULL, macio_ohare);
2533 probe_one_macio("pci106b,7", NULL, macio_ohareII);
2534 probe_one_macio("mac-io", "keylargo", macio_keylargo);
2535 probe_one_macio("mac-io", "paddington", macio_paddington);
2536 probe_one_macio("mac-io", "gatwick", macio_gatwick);
2537 probe_one_macio("mac-io", "heathrow", macio_heathrow);
2538 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2540 /* Make sure the "main" macio chip appear first */
2541 if (macio_chips[0].type == macio_gatwick
2542 && macio_chips[1].type == macio_heathrow) {
2543 struct macio_chip temp = macio_chips[0];
2544 macio_chips[0] = macio_chips[1];
2545 macio_chips[1] = temp;
2547 if (macio_chips[0].type == macio_ohareII
2548 && macio_chips[1].type == macio_ohare) {
2549 struct macio_chip temp = macio_chips[0];
2550 macio_chips[0] = macio_chips[1];
2551 macio_chips[1] = temp;
2553 macio_chips[0].lbus.index = 0;
2554 macio_chips[1].lbus.index = 1;
2556 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2560 initial_serial_shutdown(struct device_node* np)
2563 struct slot_names_prop {
2568 int port_type = PMAC_SCC_ASYNC;
2571 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
2572 conn = get_property(np, "AAPL,connector", &len);
2573 if (conn && (strcmp(conn, "infrared") == 0))
2574 port_type = PMAC_SCC_IRDA;
2575 else if (device_is_compatible(np, "cobalt"))
2577 else if (slots && slots->count > 0) {
2578 if (strcmp(slots->name, "IrDA") == 0)
2579 port_type = PMAC_SCC_IRDA;
2580 else if (strcmp(slots->name, "Modem") == 0)
2584 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2585 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2589 set_initial_features(void)
2591 struct device_node* np;
2593 /* That hack appears to be necessary for some StarMax motherboards
2594 * but I'm not too sure it was audited for side-effects on other
2595 * ohare based machines...
2596 * Since I still have difficulties figuring the right way to
2597 * differenciate them all and since that hack was there for a long
2598 * time, I'll keep it around
2600 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
2601 struct macio_chip* macio = &macio_chips[0];
2602 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2603 } else if (macio_chips[0].type == macio_ohare) {
2604 struct macio_chip* macio = &macio_chips[0];
2605 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2606 } else if (macio_chips[1].type == macio_ohare) {
2607 struct macio_chip* macio = &macio_chips[1];
2608 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2611 #ifdef CONFIG_POWER4
2612 if (macio_chips[0].type == macio_keylargo2) {
2614 /* On SMP machines running UP, we have the second CPU eating
2615 * bus cycles. We need to take it off the bus. This is done
2616 * from pmac_smp for SMP kernels running on one CPU
2618 np = of_find_node_by_type(NULL, "cpu");
2620 np = of_find_node_by_type(np, "cpu");
2622 g5_phy_disable_cpu1();
2625 #endif /* CONFIG_SMP */
2626 /* Enable GMAC for now for PCI probing. It will be disabled
2627 * later on after PCI probe
2629 np = of_find_node_by_name(NULL, "ethernet");
2631 if (device_is_compatible(np, "K2-GMAC"))
2632 g5_gmac_enable(np, 0, 1);
2633 np = of_find_node_by_name(np, "ethernet");
2636 /* Enable FW before PCI probe. Will be disabled later on
2637 * Note: We should have a batter way to check that we are
2638 * dealing with uninorth internal cell and not a PCI cell
2639 * on the external PCI. The code below works though.
2641 np = of_find_node_by_name(NULL, "firewire");
2643 if (device_is_compatible(np, "pci106b,5811")) {
2644 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2645 g5_fw_enable(np, 0, 1);
2647 np = of_find_node_by_name(np, "firewire");
2650 #else /* CONFIG_POWER4 */
2652 if (macio_chips[0].type == macio_keylargo ||
2653 macio_chips[0].type == macio_pangea ||
2654 macio_chips[0].type == macio_intrepid) {
2655 /* Enable GMAC for now for PCI probing. It will be disabled
2656 * later on after PCI probe
2658 np = of_find_node_by_name(NULL, "ethernet");
2661 && device_is_compatible(np->parent, "uni-north")
2662 && device_is_compatible(np, "gmac"))
2663 core99_gmac_enable(np, 0, 1);
2664 np = of_find_node_by_name(np, "ethernet");
2667 /* Enable FW before PCI probe. Will be disabled later on
2668 * Note: We should have a batter way to check that we are
2669 * dealing with uninorth internal cell and not a PCI cell
2670 * on the external PCI. The code below works though.
2672 np = of_find_node_by_name(NULL, "firewire");
2675 && device_is_compatible(np->parent, "uni-north")
2676 && (device_is_compatible(np, "pci106b,18") ||
2677 device_is_compatible(np, "pci106b,30") ||
2678 device_is_compatible(np, "pci11c1,5811"))) {
2679 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2680 core99_firewire_enable(np, 0, 1);
2682 np = of_find_node_by_name(np, "firewire");
2685 /* Enable ATA-100 before PCI probe. */
2686 np = of_find_node_by_name(NULL, "ata-6");
2689 && device_is_compatible(np->parent, "uni-north")
2690 && device_is_compatible(np, "kauai-ata")) {
2691 core99_ata100_enable(np, 1);
2693 np = of_find_node_by_name(np, "ata-6");
2696 /* Switch airport off */
2697 np = find_devices("radio");
2699 if (np && np->parent == macio_chips[0].of_node) {
2700 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2701 core99_airport_enable(np, 0, 0);
2707 /* On all machines that support sound PM, switch sound off */
2708 if (macio_chips[0].of_node)
2709 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2710 macio_chips[0].of_node, 0, 0);
2712 /* While on some desktop G3s, we turn it back on */
2713 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2714 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2715 pmac_mb.model_id == PMAC_TYPE_SILK)) {
2716 struct macio_chip* macio = &macio_chips[0];
2717 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2718 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2721 /* Hack for bumping clock speed on the new PowerBooks and the
2722 * iBook G4. This implements the "platform-do-clockspreading" OF
2723 * property. For safety, we also check the product ID in the
2724 * device-tree to make reasonably sure we won't set wrong values
2725 * in the clock chip.
2727 * Of course, ultimately, we have to implement a real parser for
2728 * the platform-do-* stuff...
2730 while (machine_is_compatible("PowerBook5,2") ||
2731 machine_is_compatible("PowerBook5,3") ||
2732 machine_is_compatible("PowerBook6,2") ||
2733 machine_is_compatible("PowerBook6,3")) {
2734 struct device_node *ui2c = of_find_node_by_type(NULL, "i2c");
2735 struct device_node *dt = of_find_node_by_name(NULL, "device-tree");
2738 int i, rc, changed = 0;
2742 productID = (u32 *)get_property(dt, "pid#", NULL);
2743 if (productID == NULL)
2746 struct device_node *p = of_get_parent(ui2c);
2747 if (p && !strcmp(p->name, "uni-n"))
2749 ui2c = of_find_node_by_type(ui2c, "i2c");
2753 DBG("Trying to bump clock speed for PID: %08x...\n", *productID);
2754 rc = pmac_low_i2c_open(ui2c, 1);
2757 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);
2758 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);
2759 DBG("read result: %d,", rc);
2761 pmac_low_i2c_close(ui2c);
2765 DBG(" %02x", buffer[i]);
2768 switch(*productID) {
2769 case 0x1182: /* AlBook 12" rev 2 */
2770 case 0x1183: /* iBook G4 12" */
2771 buffer[0] = (buffer[0] & 0x8f) | 0x70;
2772 buffer[2] = (buffer[2] & 0x7f) | 0x00;
2773 buffer[5] = (buffer[5] & 0x80) | 0x31;
2774 buffer[6] = (buffer[6] & 0x40) | 0xb0;
2775 buffer[7] = (buffer[7] & 0x00) | 0xc0;
2776 buffer[8] = (buffer[8] & 0x00) | 0x30;
2779 case 0x3142: /* AlBook 15" (ATI M10) */
2780 case 0x3143: /* AlBook 17" (ATI M10) */
2781 buffer[0] = (buffer[0] & 0xaf) | 0x50;
2782 buffer[2] = (buffer[2] & 0x7f) | 0x00;
2783 buffer[5] = (buffer[5] & 0x80) | 0x31;
2784 buffer[6] = (buffer[6] & 0x40) | 0xb0;
2785 buffer[7] = (buffer[7] & 0x00) | 0xd0;
2786 buffer[8] = (buffer[8] & 0x00) | 0x30;
2790 DBG("i2c-hwclock: Machine model not handled\n");
2794 pmac_low_i2c_close(ui2c);
2797 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_stdsub);
2798 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_write, 0x80, buffer, 9);
2799 DBG("write result: %d,", rc);
2800 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);
2801 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);
2802 DBG("read result: %d,", rc);
2804 pmac_low_i2c_close(ui2c);
2808 DBG(" %02x", buffer[i]);
2809 pmac_low_i2c_close(ui2c);
2813 #endif /* CONFIG_POWER4 */
2815 /* On all machines, switch modem & serial ports off */
2816 np = find_devices("ch-a");
2818 initial_serial_shutdown(np);
2821 np = find_devices("ch-b");
2823 initial_serial_shutdown(np);
2829 pmac_feature_init(void)
2831 /* Detect the UniNorth memory controller */
2834 /* Probe mac-io controllers */
2835 if (probe_macios()) {
2836 printk(KERN_WARNING "No mac-io chip found\n");
2840 /* Setup low-level i2c stuffs */
2841 pmac_init_low_i2c();
2843 /* Probe machine type */
2844 if (probe_motherboard())
2845 printk(KERN_WARNING "Unknown PowerMac !\n");
2847 /* Set some initial features (turn off some chips that will
2848 * be later turned on)
2850 set_initial_features();
2854 pmac_feature_late_init(void)
2856 struct device_node* np;
2858 /* Request some resources late */
2860 request_OF_resource(uninorth_node, 0, NULL);
2861 np = find_devices("hammerhead");
2863 request_OF_resource(np, 0, NULL);
2864 np = find_devices("interrupt-controller");
2866 request_OF_resource(np, 0, NULL);
2870 device_initcall(pmac_feature_late_init);
2872 #ifdef CONFIG_POWER4
2874 static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2876 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2877 int bits[8] = { 8,16,0,32,2,4,0,0 };
2878 int freq = (frq >> 8) & 0xf;
2880 if (freqs[freq] == 0)
2881 printk("%s: Unknown HT link frequency %x\n", name, freq);
2883 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2885 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2888 void __init pmac_check_ht_link(void)
2890 u32 ufreq, freq, ucfg, cfg;
2891 struct device_node *pcix_node;
2892 u8 px_bus, px_devfn;
2893 struct pci_controller *px_hose;
2895 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
2896 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
2897 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
2898 dump_HT_speeds("U3 HyperTransport", cfg, freq);
2900 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2901 if (pcix_node == NULL) {
2902 printk("No PCI-X bridge found\n");
2905 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2906 printk("PCI-X bridge found but not matched to pci\n");
2909 px_hose = pci_find_hose_for_OF_device(pcix_node);
2910 if (px_hose == NULL) {
2911 printk("PCI-X bridge found but not matched to host\n");
2914 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2915 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2916 dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2917 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2918 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2919 dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2922 #endif /* CONFIG_POWER4 */
2925 * Early video resume hook
2928 static void (*pmac_early_vresume_proc)(void *data) __pmacdata;
2929 static void *pmac_early_vresume_data __pmacdata;
2931 void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2933 if (_machine != _MACH_Pmac)
2936 pmac_early_vresume_proc = proc;
2937 pmac_early_vresume_data = data;
2940 EXPORT_SYMBOL(pmac_set_early_video_resume);
2942 void __pmac pmac_call_early_video_resume(void)
2944 if (pmac_early_vresume_proc)
2945 pmac_early_vresume_proc(pmac_early_vresume_data);
2949 * AGP related suspend/resume code
2952 static struct pci_dev *pmac_agp_bridge __pmacdata;
2953 static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata;
2954 static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata;
2956 void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
2957 int (*suspend)(struct pci_dev *bridge),
2958 int (*resume)(struct pci_dev *bridge))
2960 if (suspend || resume) {
2961 pmac_agp_bridge = bridge;
2962 pmac_agp_suspend = suspend;
2963 pmac_agp_resume = resume;
2966 if (bridge != pmac_agp_bridge)
2968 pmac_agp_suspend = pmac_agp_resume = NULL;
2971 EXPORT_SYMBOL(pmac_register_agp_pm);
2973 void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
2975 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
2977 if (pmac_agp_bridge->bus != dev->bus)
2979 pmac_agp_suspend(pmac_agp_bridge);
2981 EXPORT_SYMBOL(pmac_suspend_agp_for_card);
2983 void __pmac pmac_resume_agp_for_card(struct pci_dev *dev)
2985 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
2987 if (pmac_agp_bridge->bus != dev->bus)
2989 pmac_agp_resume(pmac_agp_bridge);
2991 EXPORT_SYMBOL(pmac_resume_agp_for_card);