Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
[pandora-kernel.git] / arch / powerpc / platforms / iseries / setup.c
1 /*
2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4  *
5  *    Description:
6  *      Architecture- / platform-specific boot-time initialization code for
7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9  *      <dan@net4x.com>.
10  *
11  *      This program is free software; you can redistribute it and/or
12  *      modify it under the terms of the GNU General Public License
13  *      as published by the Free Software Foundation; either version
14  *      2 of the License, or (at your option) any later version.
15  */
16
17 #undef DEBUG
18
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
31
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
34 #include <asm/page.h>
35 #include <asm/mmu.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/sections.h>
40 #include <asm/iommu.h>
41 #include <asm/firmware.h>
42
43 #include <asm/time.h>
44 #include <asm/paca.h>
45 #include <asm/cache.h>
46 #include <asm/sections.h>
47 #include <asm/abs_addr.h>
48 #include <asm/iseries/hv_lp_config.h>
49 #include <asm/iseries/hv_call_event.h>
50 #include <asm/iseries/hv_call_xm.h>
51 #include <asm/iseries/it_lp_queue.h>
52 #include <asm/iseries/mf.h>
53 #include <asm/iseries/hv_lp_event.h>
54 #include <asm/iseries/lpar_map.h>
55
56 #include "naca.h"
57 #include "setup.h"
58 #include "irq.h"
59 #include "vpd_areas.h"
60 #include "processor_vpd.h"
61 #include "main_store.h"
62 #include "call_sm.h"
63 #include "call_hpt.h"
64
65 extern void hvlog(char *fmt, ...);
66
67 #ifdef DEBUG
68 #define DBG(fmt...) hvlog(fmt)
69 #else
70 #define DBG(fmt...)
71 #endif
72
73 /* Function Prototypes */
74 extern void ppcdbg_initialize(void);
75
76 static void build_iSeries_Memory_Map(void);
77 static void iseries_shared_idle(void);
78 static void iseries_dedicated_idle(void);
79 #ifdef CONFIG_PCI
80 extern void iSeries_pci_final_fixup(void);
81 #else
82 static void iSeries_pci_final_fixup(void) { }
83 #endif
84
85 /* Global Variables */
86 int piranha_simulator;
87
88 extern int rd_size;             /* Defined in drivers/block/rd.c */
89 extern unsigned long klimit;
90 extern unsigned long embedded_sysmap_start;
91 extern unsigned long embedded_sysmap_end;
92
93 extern unsigned long iSeries_recal_tb;
94 extern unsigned long iSeries_recal_titan;
95
96 static int mf_initialized;
97
98 static unsigned long cmd_mem_limit;
99
100 struct MemoryBlock {
101         unsigned long absStart;
102         unsigned long absEnd;
103         unsigned long logicalStart;
104         unsigned long logicalEnd;
105 };
106
107 /*
108  * Process the main store vpd to determine where the holes in memory are
109  * and return the number of physical blocks and fill in the array of
110  * block data.
111  */
112 static unsigned long iSeries_process_Condor_mainstore_vpd(
113                 struct MemoryBlock *mb_array, unsigned long max_entries)
114 {
115         unsigned long holeFirstChunk, holeSizeChunks;
116         unsigned long numMemoryBlocks = 1;
117         struct IoHriMainStoreSegment4 *msVpd =
118                 (struct IoHriMainStoreSegment4 *)xMsVpd;
119         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
120         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
121         unsigned long holeSize = holeEnd - holeStart;
122
123         printk("Mainstore_VPD: Condor\n");
124         /*
125          * Determine if absolute memory has any
126          * holes so that we can interpret the
127          * access map we get back from the hypervisor
128          * correctly.
129          */
130         mb_array[0].logicalStart = 0;
131         mb_array[0].logicalEnd = 0x100000000;
132         mb_array[0].absStart = 0;
133         mb_array[0].absEnd = 0x100000000;
134
135         if (holeSize) {
136                 numMemoryBlocks = 2;
137                 holeStart = holeStart & 0x000fffffffffffff;
138                 holeStart = addr_to_chunk(holeStart);
139                 holeFirstChunk = holeStart;
140                 holeSize = addr_to_chunk(holeSize);
141                 holeSizeChunks = holeSize;
142                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
143                                 holeFirstChunk, holeSizeChunks );
144                 mb_array[0].logicalEnd = holeFirstChunk;
145                 mb_array[0].absEnd = holeFirstChunk;
146                 mb_array[1].logicalStart = holeFirstChunk;
147                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
148                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
149                 mb_array[1].absEnd = 0x100000000;
150         }
151         return numMemoryBlocks;
152 }
153
154 #define MaxSegmentAreas                 32
155 #define MaxSegmentAdrRangeBlocks        128
156 #define MaxAreaRangeBlocks              4
157
158 static unsigned long iSeries_process_Regatta_mainstore_vpd(
159                 struct MemoryBlock *mb_array, unsigned long max_entries)
160 {
161         struct IoHriMainStoreSegment5 *msVpdP =
162                 (struct IoHriMainStoreSegment5 *)xMsVpd;
163         unsigned long numSegmentBlocks = 0;
164         u32 existsBits = msVpdP->msAreaExists;
165         unsigned long area_num;
166
167         printk("Mainstore_VPD: Regatta\n");
168
169         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
170                 unsigned long numAreaBlocks;
171                 struct IoHriMainStoreArea4 *currentArea;
172
173                 if (existsBits & 0x80000000) {
174                         unsigned long block_num;
175
176                         currentArea = &msVpdP->msAreaArray[area_num];
177                         numAreaBlocks = currentArea->numAdrRangeBlocks;
178                         printk("ms_vpd: processing area %2ld  blocks=%ld",
179                                         area_num, numAreaBlocks);
180                         for (block_num = 0; block_num < numAreaBlocks;
181                                         ++block_num ) {
182                                 /* Process an address range block */
183                                 struct MemoryBlock tempBlock;
184                                 unsigned long i;
185
186                                 tempBlock.absStart =
187                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
188                                 tempBlock.absEnd =
189                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
190                                 tempBlock.logicalStart = 0;
191                                 tempBlock.logicalEnd   = 0;
192                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
193                                                 block_num, tempBlock.absStart,
194                                                 tempBlock.absEnd);
195
196                                 for (i = 0; i < numSegmentBlocks; ++i) {
197                                         if (mb_array[i].absStart ==
198                                                         tempBlock.absStart)
199                                                 break;
200                                 }
201                                 if (i == numSegmentBlocks) {
202                                         if (numSegmentBlocks == max_entries)
203                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
204                                         mb_array[numSegmentBlocks] = tempBlock;
205                                         ++numSegmentBlocks;
206                                 } else
207                                         printk(" (duplicate)");
208                         }
209                         printk("\n");
210                 }
211                 existsBits <<= 1;
212         }
213         /* Now sort the blocks found into ascending sequence */
214         if (numSegmentBlocks > 1) {
215                 unsigned long m, n;
216
217                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
218                         for (n = numSegmentBlocks - 1; m < n; --n) {
219                                 if (mb_array[n].absStart <
220                                                 mb_array[n-1].absStart) {
221                                         struct MemoryBlock tempBlock;
222
223                                         tempBlock = mb_array[n];
224                                         mb_array[n] = mb_array[n-1];
225                                         mb_array[n-1] = tempBlock;
226                                 }
227                         }
228                 }
229         }
230         /*
231          * Assign "logical" addresses to each block.  These
232          * addresses correspond to the hypervisor "bitmap" space.
233          * Convert all addresses into units of 256K chunks.
234          */
235         {
236         unsigned long i, nextBitmapAddress;
237
238         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
239         nextBitmapAddress = 0;
240         for (i = 0; i < numSegmentBlocks; ++i) {
241                 unsigned long length = mb_array[i].absEnd -
242                         mb_array[i].absStart;
243
244                 mb_array[i].logicalStart = nextBitmapAddress;
245                 mb_array[i].logicalEnd = nextBitmapAddress + length;
246                 nextBitmapAddress += length;
247                 printk("          Bitmap range: %016lx - %016lx\n"
248                                 "        Absolute range: %016lx - %016lx\n",
249                                 mb_array[i].logicalStart,
250                                 mb_array[i].logicalEnd,
251                                 mb_array[i].absStart, mb_array[i].absEnd);
252                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
253                                 0x000fffffffffffff);
254                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
255                                 0x000fffffffffffff);
256                 mb_array[i].logicalStart =
257                         addr_to_chunk(mb_array[i].logicalStart);
258                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
259         }
260         }
261
262         return numSegmentBlocks;
263 }
264
265 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
266                 unsigned long max_entries)
267 {
268         unsigned long i;
269         unsigned long mem_blocks = 0;
270
271         if (cpu_has_feature(CPU_FTR_SLB))
272                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
273                                 max_entries);
274         else
275                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
276                                 max_entries);
277
278         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
279         for (i = 0; i < mem_blocks; ++i) {
280                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
281                        "                             abs chunks %016lx - %016lx\n",
282                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
283                         mb_array[i].absStart, mb_array[i].absEnd);
284         }
285         return mem_blocks;
286 }
287
288 static void __init iSeries_get_cmdline(void)
289 {
290         char *p, *q;
291
292         /* copy the command line parameter from the primary VSP  */
293         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
294                         HvLpDma_Direction_RemoteToLocal);
295
296         p = cmd_line;
297         q = cmd_line + 255;
298         while(p < q) {
299                 if (!*p || *p == '\n')
300                         break;
301                 ++p;
302         }
303         *p = 0;
304 }
305
306 static void __init iSeries_init_early(void)
307 {
308         DBG(" -> iSeries_init_early()\n");
309
310         ppc64_firmware_features = FW_FEATURE_ISERIES;
311
312         ppcdbg_initialize();
313
314         ppc64_interrupt_controller = IC_ISERIES;
315
316 #if defined(CONFIG_BLK_DEV_INITRD)
317         /*
318          * If the init RAM disk has been configured and there is
319          * a non-zero starting address for it, set it up
320          */
321         if (naca.xRamDisk) {
322                 initrd_start = (unsigned long)__va(naca.xRamDisk);
323                 initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE;
324                 initrd_below_start_ok = 1;      // ramdisk in kernel space
325                 ROOT_DEV = Root_RAM0;
326                 if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize)
327                         rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024;
328         } else
329 #endif /* CONFIG_BLK_DEV_INITRD */
330         {
331             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
332         }
333
334         iSeries_recal_tb = get_tb();
335         iSeries_recal_titan = HvCallXm_loadTod();
336
337         /*
338          * Initialize the hash table management pointers
339          */
340         hpte_init_iSeries();
341
342         /*
343          * Initialize the DMA/TCE management
344          */
345         iommu_init_early_iSeries();
346
347         /* Initialize machine-dependency vectors */
348 #ifdef CONFIG_SMP
349         smp_init_iSeries();
350 #endif
351         if (itLpNaca.xPirEnvironMode == 0)
352                 piranha_simulator = 1;
353
354         /* Associate Lp Event Queue 0 with processor 0 */
355         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
356
357         mf_init();
358         mf_initialized = 1;
359         mb();
360
361         /* If we were passed an initrd, set the ROOT_DEV properly if the values
362          * look sensible. If not, clear initrd reference.
363          */
364 #ifdef CONFIG_BLK_DEV_INITRD
365         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
366             initrd_end > initrd_start)
367                 ROOT_DEV = Root_RAM0;
368         else
369                 initrd_start = initrd_end = 0;
370 #endif /* CONFIG_BLK_DEV_INITRD */
371
372         DBG(" <- iSeries_init_early()\n");
373 }
374
375 struct mschunks_map mschunks_map = {
376         /* XXX We don't use these, but Piranha might need them. */
377         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
378         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
379         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
380 };
381 EXPORT_SYMBOL(mschunks_map);
382
383 void mschunks_alloc(unsigned long num_chunks)
384 {
385         klimit = _ALIGN(klimit, sizeof(u32));
386         mschunks_map.mapping = (u32 *)klimit;
387         klimit += num_chunks * sizeof(u32);
388         mschunks_map.num_chunks = num_chunks;
389 }
390
391 /*
392  * The iSeries may have very large memories ( > 128 GB ) and a partition
393  * may get memory in "chunks" that may be anywhere in the 2**52 real
394  * address space.  The chunks are 256K in size.  To map this to the
395  * memory model Linux expects, the AS/400 specific code builds a
396  * translation table to translate what Linux thinks are "physical"
397  * addresses to the actual real addresses.  This allows us to make
398  * it appear to Linux that we have contiguous memory starting at
399  * physical address zero while in fact this could be far from the truth.
400  * To avoid confusion, I'll let the words physical and/or real address
401  * apply to the Linux addresses while I'll use "absolute address" to
402  * refer to the actual hardware real address.
403  *
404  * build_iSeries_Memory_Map gets information from the Hypervisor and
405  * looks at the Main Store VPD to determine the absolute addresses
406  * of the memory that has been assigned to our partition and builds
407  * a table used to translate Linux's physical addresses to these
408  * absolute addresses.  Absolute addresses are needed when
409  * communicating with the hypervisor (e.g. to build HPT entries)
410  */
411
412 static void __init build_iSeries_Memory_Map(void)
413 {
414         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
415         u32 nextPhysChunk;
416         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
417         u32 totalChunks,moreChunks;
418         u32 currChunk, thisChunk, absChunk;
419         u32 currDword;
420         u32 chunkBit;
421         u64 map;
422         struct MemoryBlock mb[32];
423         unsigned long numMemoryBlocks, curBlock;
424
425         /* Chunk size on iSeries is 256K bytes */
426         totalChunks = (u32)HvLpConfig_getMsChunks();
427         mschunks_alloc(totalChunks);
428
429         /*
430          * Get absolute address of our load area
431          * and map it to physical address 0
432          * This guarantees that the loadarea ends up at physical 0
433          * otherwise, it might not be returned by PLIC as the first
434          * chunks
435          */
436
437         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
438         loadAreaSize =  itLpNaca.xLoadAreaChunks;
439
440         /*
441          * Only add the pages already mapped here.
442          * Otherwise we might add the hpt pages
443          * The rest of the pages of the load area
444          * aren't in the HPT yet and can still
445          * be assigned an arbitrary physical address
446          */
447         if ((loadAreaSize * 64) > HvPagesToMap)
448                 loadAreaSize = HvPagesToMap / 64;
449
450         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
451
452         /*
453          * TODO Do we need to do something if the HPT is in the 64MB load area?
454          * This would be required if the itLpNaca.xLoadAreaChunks includes
455          * the HPT size
456          */
457
458         printk("Mapping load area - physical addr = 0000000000000000\n"
459                 "                    absolute addr = %016lx\n",
460                 chunk_to_addr(loadAreaFirstChunk));
461         printk("Load area size %dK\n", loadAreaSize * 256);
462
463         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
464                 mschunks_map.mapping[nextPhysChunk] =
465                         loadAreaFirstChunk + nextPhysChunk;
466
467         /*
468          * Get absolute address of our HPT and remember it so
469          * we won't map it to any physical address
470          */
471         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
472         hptSizePages = (u32)HvCallHpt_getHptPages();
473         hptSizeChunks = hptSizePages >> (MSCHUNKS_CHUNK_SHIFT - PAGE_SHIFT);
474         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
475
476         printk("HPT absolute addr = %016lx, size = %dK\n",
477                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
478
479         ppc64_pft_size = __ilog2(hptSizePages * PAGE_SIZE);
480
481         /*
482          * The actual hashed page table is in the hypervisor,
483          * we have no direct access
484          */
485         htab_address = NULL;
486
487         /*
488          * Determine if absolute memory has any
489          * holes so that we can interpret the
490          * access map we get back from the hypervisor
491          * correctly.
492          */
493         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
494
495         /*
496          * Process the main store access map from the hypervisor
497          * to build up our physical -> absolute translation table
498          */
499         curBlock = 0;
500         currChunk = 0;
501         currDword = 0;
502         moreChunks = totalChunks;
503
504         while (moreChunks) {
505                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
506                                 currDword);
507                 thisChunk = currChunk;
508                 while (map) {
509                         chunkBit = map >> 63;
510                         map <<= 1;
511                         if (chunkBit) {
512                                 --moreChunks;
513                                 while (thisChunk >= mb[curBlock].logicalEnd) {
514                                         ++curBlock;
515                                         if (curBlock >= numMemoryBlocks)
516                                                 panic("out of memory blocks");
517                                 }
518                                 if (thisChunk < mb[curBlock].logicalStart)
519                                         panic("memory block error");
520
521                                 absChunk = mb[curBlock].absStart +
522                                         (thisChunk - mb[curBlock].logicalStart);
523                                 if (((absChunk < hptFirstChunk) ||
524                                      (absChunk > hptLastChunk)) &&
525                                     ((absChunk < loadAreaFirstChunk) ||
526                                      (absChunk > loadAreaLastChunk))) {
527                                         mschunks_map.mapping[nextPhysChunk] =
528                                                 absChunk;
529                                         ++nextPhysChunk;
530                                 }
531                         }
532                         ++thisChunk;
533                 }
534                 ++currDword;
535                 currChunk += 64;
536         }
537
538         /*
539          * main store size (in chunks) is
540          *   totalChunks - hptSizeChunks
541          * which should be equal to
542          *   nextPhysChunk
543          */
544         systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
545 }
546
547 /*
548  * Document me.
549  */
550 static void __init iSeries_setup_arch(void)
551 {
552         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
553
554         if (get_paca()->lppaca.shared_proc) {
555                 ppc_md.idle_loop = iseries_shared_idle;
556                 printk(KERN_INFO "Using shared processor idle loop\n");
557         } else {
558                 ppc_md.idle_loop = iseries_dedicated_idle;
559                 printk(KERN_INFO "Using dedicated idle loop\n");
560         }
561
562         /* Setup the Lp Event Queue */
563         setup_hvlpevent_queue();
564
565         printk("Max  logical processors = %d\n",
566                         itVpdAreas.xSlicMaxLogicalProcs);
567         printk("Max physical processors = %d\n",
568                         itVpdAreas.xSlicMaxPhysicalProcs);
569
570         systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
571         printk("Processor version = %x\n", systemcfg->processor);
572 }
573
574 static void iSeries_show_cpuinfo(struct seq_file *m)
575 {
576         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
577 }
578
579 /*
580  * Document me.
581  * and Implement me.
582  */
583 static int iSeries_get_irq(struct pt_regs *regs)
584 {
585         /* -2 means ignore this interrupt */
586         return -2;
587 }
588
589 /*
590  * Document me.
591  */
592 static void iSeries_restart(char *cmd)
593 {
594         mf_reboot();
595 }
596
597 /*
598  * Document me.
599  */
600 static void iSeries_power_off(void)
601 {
602         mf_power_off();
603 }
604
605 /*
606  * Document me.
607  */
608 static void iSeries_halt(void)
609 {
610         mf_power_off();
611 }
612
613 static void __init iSeries_progress(char * st, unsigned short code)
614 {
615         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
616         if (!piranha_simulator && mf_initialized) {
617                 if (code != 0xffff)
618                         mf_display_progress(code);
619                 else
620                         mf_clear_src();
621         }
622 }
623
624 static void __init iSeries_fixup_klimit(void)
625 {
626         /*
627          * Change klimit to take into account any ram disk
628          * that may be included
629          */
630         if (naca.xRamDisk)
631                 klimit = KERNELBASE + (u64)naca.xRamDisk +
632                         (naca.xRamDiskSize * PAGE_SIZE);
633         else {
634                 /*
635                  * No ram disk was included - check and see if there
636                  * was an embedded system map.  Change klimit to take
637                  * into account any embedded system map
638                  */
639                 if (embedded_sysmap_end)
640                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
641                                         0xfffffffffffff000);
642         }
643 }
644
645 static int __init iSeries_src_init(void)
646 {
647         /* clear the progress line */
648         ppc_md.progress(" ", 0xffff);
649         return 0;
650 }
651
652 late_initcall(iSeries_src_init);
653
654 static inline void process_iSeries_events(void)
655 {
656         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
657 }
658
659 static void yield_shared_processor(void)
660 {
661         unsigned long tb;
662
663         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
664                                     HvCall_MaskLpEvent |
665                                     HvCall_MaskLpProd |
666                                     HvCall_MaskTimeout);
667
668         tb = get_tb();
669         /* Compute future tb value when yield should expire */
670         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
671
672         /*
673          * The decrementer stops during the yield.  Force a fake decrementer
674          * here and let the timer_interrupt code sort out the actual time.
675          */
676         get_paca()->lppaca.int_dword.fields.decr_int = 1;
677         process_iSeries_events();
678 }
679
680 static void iseries_shared_idle(void)
681 {
682         while (1) {
683                 while (!need_resched() && !hvlpevent_is_pending()) {
684                         local_irq_disable();
685                         ppc64_runlatch_off();
686
687                         /* Recheck with irqs off */
688                         if (!need_resched() && !hvlpevent_is_pending())
689                                 yield_shared_processor();
690
691                         HMT_medium();
692                         local_irq_enable();
693                 }
694
695                 ppc64_runlatch_on();
696
697                 if (hvlpevent_is_pending())
698                         process_iSeries_events();
699
700                 schedule();
701         }
702 }
703
704 static void iseries_dedicated_idle(void)
705 {
706         long oldval;
707
708         while (1) {
709                 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
710
711                 if (!oldval) {
712                         set_thread_flag(TIF_POLLING_NRFLAG);
713
714                         while (!need_resched()) {
715                                 ppc64_runlatch_off();
716                                 HMT_low();
717
718                                 if (hvlpevent_is_pending()) {
719                                         HMT_medium();
720                                         ppc64_runlatch_on();
721                                         process_iSeries_events();
722                                 }
723                         }
724
725                         HMT_medium();
726                         clear_thread_flag(TIF_POLLING_NRFLAG);
727                 } else {
728                         set_need_resched();
729                 }
730
731                 ppc64_runlatch_on();
732                 schedule();
733         }
734 }
735
736 #ifndef CONFIG_PCI
737 void __init iSeries_init_IRQ(void) { }
738 #endif
739
740 static int __init iseries_probe(int platform)
741 {
742         return PLATFORM_ISERIES_LPAR == platform;
743 }
744
745 struct machdep_calls __initdata iseries_md = {
746         .setup_arch     = iSeries_setup_arch,
747         .show_cpuinfo   = iSeries_show_cpuinfo,
748         .init_IRQ       = iSeries_init_IRQ,
749         .get_irq        = iSeries_get_irq,
750         .init_early     = iSeries_init_early,
751         .pcibios_fixup  = iSeries_pci_final_fixup,
752         .restart        = iSeries_restart,
753         .power_off      = iSeries_power_off,
754         .halt           = iSeries_halt,
755         .get_boot_time  = iSeries_get_boot_time,
756         .set_rtc_time   = iSeries_set_rtc_time,
757         .get_rtc_time   = iSeries_get_rtc_time,
758         .calibrate_decr = generic_calibrate_decr,
759         .progress       = iSeries_progress,
760         .probe          = iseries_probe,
761         /* XXX Implement enable_pmcs for iSeries */
762 };
763
764 struct blob {
765         unsigned char data[PAGE_SIZE];
766         unsigned long next;
767 };
768
769 struct iseries_flat_dt {
770         struct boot_param_header header;
771         u64 reserve_map[2];
772         struct blob dt;
773         struct blob strings;
774 };
775
776 struct iseries_flat_dt iseries_dt;
777
778 void dt_init(struct iseries_flat_dt *dt)
779 {
780         dt->header.off_mem_rsvmap =
781                 offsetof(struct iseries_flat_dt, reserve_map);
782         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
783         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
784         dt->header.totalsize = sizeof(struct iseries_flat_dt);
785         dt->header.dt_strings_size = sizeof(struct blob);
786
787         /* There is no notion of hardware cpu id on iSeries */
788         dt->header.boot_cpuid_phys = smp_processor_id();
789
790         dt->dt.next = (unsigned long)&dt->dt.data;
791         dt->strings.next = (unsigned long)&dt->strings.data;
792
793         dt->header.magic = OF_DT_HEADER;
794         dt->header.version = 0x10;
795         dt->header.last_comp_version = 0x10;
796
797         dt->reserve_map[0] = 0;
798         dt->reserve_map[1] = 0;
799 }
800
801 void dt_check_blob(struct blob *b)
802 {
803         if (b->next >= (unsigned long)&b->next) {
804                 DBG("Ran out of space in flat device tree blob!\n");
805                 BUG();
806         }
807 }
808
809 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
810 {
811         *((u32*)dt->dt.next) = value;
812         dt->dt.next += sizeof(u32);
813
814         dt_check_blob(&dt->dt);
815 }
816
817 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
818 {
819         *((u64*)dt->dt.next) = value;
820         dt->dt.next += sizeof(u64);
821
822         dt_check_blob(&dt->dt);
823 }
824
825 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
826 {
827         unsigned long start = blob->next - (unsigned long)blob->data;
828
829         memcpy((char *)blob->next, data, len);
830         blob->next = _ALIGN(blob->next + len, 4);
831
832         dt_check_blob(blob);
833
834         return start;
835 }
836
837 void dt_start_node(struct iseries_flat_dt *dt, char *name)
838 {
839         dt_push_u32(dt, OF_DT_BEGIN_NODE);
840         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
841 }
842
843 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
844
845 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
846 {
847         unsigned long offset;
848
849         dt_push_u32(dt, OF_DT_PROP);
850
851         /* Length of the data */
852         dt_push_u32(dt, len);
853
854         /* Put the property name in the string blob. */
855         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
856
857         /* The offset of the properties name in the string blob. */
858         dt_push_u32(dt, (u32)offset);
859
860         /* The actual data. */
861         dt_push_bytes(&dt->dt, data, len);
862 }
863
864 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
865 {
866         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
867 }
868
869 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
870 {
871         dt_prop(dt, name, (char *)&data, sizeof(u32));
872 }
873
874 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
875 {
876         dt_prop(dt, name, (char *)&data, sizeof(u64));
877 }
878
879 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
880 {
881         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
882 }
883
884 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
885 {
886         dt_prop(dt, name, NULL, 0);
887 }
888
889 void dt_cpus(struct iseries_flat_dt *dt)
890 {
891         unsigned char buf[32];
892         unsigned char *p;
893         unsigned int i, index;
894         struct IoHriProcessorVpd *d;
895
896         /* yuck */
897         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
898         p = strchr(buf, ' ');
899         if (!p) p = buf + strlen(buf);
900
901         dt_start_node(dt, "cpus");
902         dt_prop_u32(dt, "#address-cells", 1);
903         dt_prop_u32(dt, "#size-cells", 0);
904
905         for (i = 0; i < NR_CPUS; i++) {
906                 if (paca[i].lppaca.dyn_proc_status >= 2)
907                         continue;
908
909                 snprintf(p, 32 - (p - buf), "@%d", i);
910                 dt_start_node(dt, buf);
911
912                 dt_prop_str(dt, "device_type", "cpu");
913
914                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
915                 d = &xIoHriProcessorVpd[index];
916
917                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
918                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
919
920                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
921                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
922
923                 /* magic conversions to Hz copied from old code */
924                 dt_prop_u32(dt, "clock-frequency",
925                         ((1UL << 34) * 1000000) / d->xProcFreq);
926                 dt_prop_u32(dt, "timebase-frequency",
927                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
928
929                 dt_prop_u32(dt, "reg", i);
930
931                 dt_end_node(dt);
932         }
933
934         dt_end_node(dt);
935 }
936
937 void build_flat_dt(struct iseries_flat_dt *dt)
938 {
939         u64 tmp[2];
940
941         dt_init(dt);
942
943         dt_start_node(dt, "");
944
945         dt_prop_u32(dt, "#address-cells", 2);
946         dt_prop_u32(dt, "#size-cells", 2);
947
948         /* /memory */
949         dt_start_node(dt, "memory@0");
950         dt_prop_str(dt, "name", "memory");
951         dt_prop_str(dt, "device_type", "memory");
952         tmp[0] = 0;
953         tmp[1] = systemcfg->physicalMemorySize;
954         dt_prop_u64_list(dt, "reg", tmp, 2);
955         dt_end_node(dt);
956
957         /* /chosen */
958         dt_start_node(dt, "chosen");
959         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
960         if (cmd_mem_limit)
961                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
962         dt_end_node(dt);
963
964         dt_cpus(dt);
965
966         dt_end_node(dt);
967
968         dt_push_u32(dt, OF_DT_END);
969 }
970
971 void * __init iSeries_early_setup(void)
972 {
973         iSeries_fixup_klimit();
974
975         /*
976          * Initialize the table which translate Linux physical addresses to
977          * AS/400 absolute addresses
978          */
979         build_iSeries_Memory_Map();
980
981         iSeries_get_cmdline();
982
983         /* Save unparsed command line copy for /proc/cmdline */
984         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
985
986         /* Parse early parameters, in particular mem=x */
987         parse_early_param();
988
989         build_flat_dt(&iseries_dt);
990
991         return (void *) __pa(&iseries_dt);
992 }
993
994 /*
995  * On iSeries we just parse the mem=X option from the command line.
996  * On pSeries it's a bit more complicated, see prom_init_mem()
997  */
998 static int __init early_parsemem(char *p)
999 {
1000         if (p)
1001                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
1002         return 0;
1003 }
1004 early_param("mem", early_parsemem);