2 * Copyright (C) 2001 Allan Trautman, IBM Corporation
3 * Copyright (C) 2005,2007 Stephen Rothwell, IBM Corp
5 * iSeries specific routines for PCI.
7 * Based on code from pci.c and iSeries_pci.c 32bit
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <linux/jiffies.h>
27 #include <linux/kernel.h>
28 #include <linux/list.h>
29 #include <linux/string.h>
30 #include <linux/init.h>
31 #include <linux/module.h>
32 #include <linux/pci.h>
35 #include <asm/types.h>
39 #include <asm/machdep.h>
40 #include <asm/pci-bridge.h>
41 #include <asm/iommu.h>
42 #include <asm/abs_addr.h>
43 #include <asm/firmware.h>
45 #include <asm/iseries/hv_types.h>
46 #include <asm/iseries/hv_call_xm.h>
47 #include <asm/iseries/mf.h>
48 #include <asm/iseries/iommu.h>
50 #include <asm/ppc-pci.h>
56 #define PCI_RETRY_MAX 3
57 static int limit_pci_retries = 1; /* Set Retry Error on. */
61 * Each Entry size is 4 MB * 1024 Entries = 4GB I/O address space.
63 #define IOMM_TABLE_MAX_ENTRIES 1024
64 #define IOMM_TABLE_ENTRY_SIZE 0x0000000000400000UL
65 #define BASE_IO_MEMORY 0xE000000000000000UL
66 #define END_IO_MEMORY 0xEFFFFFFFFFFFFFFFUL
68 static unsigned long max_io_memory = BASE_IO_MEMORY;
69 static long current_iomm_table_entry;
74 static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
75 static u64 ds_addr_table[IOMM_TABLE_MAX_ENTRIES];
77 static DEFINE_SPINLOCK(iomm_table_lock);
80 * Generate a Direct Select Address for the Hypervisor
82 static inline u64 iseries_ds_addr(struct device_node *node)
84 struct pci_dn *pdn = PCI_DN(node);
85 const u32 *sbp = of_get_property(node, "linux,subbus", NULL);
87 return ((u64)pdn->busno << 48) + ((u64)(sbp ? *sbp : 0) << 40)
92 * Size of Bus VPD data
94 #define BUS_VPDSIZE 1024
99 #define VPD_END_OF_AREA 0x79
100 #define VPD_ID_STRING 0x82
101 #define VPD_VENDOR_AREA 0x84
106 #define VPD_FRU_FRAME_ID 0x4649 /* "FI" */
107 #define VPD_SLOT_MAP_FORMAT 0x4D46 /* "MF" */
108 #define VPD_SLOT_MAP 0x534D /* "SM" */
111 * Structures of the areas
113 struct mfg_vpd_area {
119 #define MFG_ENTRY_SIZE 3
125 char card_location[3];
129 #define SLOT_ENTRY_SIZE 16
132 * Parse the Slot Area
134 static void __init iseries_parse_slot_area(struct slot_map *map, int len,
135 HvAgentId agent, u8 *phb, char card[4])
138 * Parse Slot label until we find the one requested
141 if (map->agent == agent) {
143 * If Phb wasn't found, grab the entry first one found.
147 /* Found it, extract the data. */
148 if (map->phb == *phb) {
149 memcpy(card, &map->card_location, 3);
154 /* Point to the next Slot */
155 map = (struct slot_map *)((char *)map + SLOT_ENTRY_SIZE);
156 len -= SLOT_ENTRY_SIZE;
163 static void __init iseries_parse_mfg_area(struct mfg_vpd_area *area, int len,
164 HvAgentId agent, u8 *phb, u8 *frame, char card[4])
166 u16 slot_map_fmt = 0;
170 int mfg_tag_len = area->length;
171 /* Frame ID (FI 4649020310 ) */
172 if (area->tag == VPD_FRU_FRAME_ID)
173 *frame = area->data1;
174 /* Slot Map Format (MF 4D46020004 ) */
175 else if (area->tag == VPD_SLOT_MAP_FORMAT)
176 slot_map_fmt = (area->data1 * 256)
178 /* Slot Map (SM 534D90 */
179 else if (area->tag == VPD_SLOT_MAP) {
180 struct slot_map *slot_map;
182 if (slot_map_fmt == 0x1004)
183 slot_map = (struct slot_map *)((char *)area
184 + MFG_ENTRY_SIZE + 1);
186 slot_map = (struct slot_map *)((char *)area
188 iseries_parse_slot_area(slot_map, mfg_tag_len,
192 * Point to the next Mfg Area
193 * Use defined size, sizeof give wrong answer
195 area = (struct mfg_vpd_area *)((char *)area + mfg_tag_len
197 len -= (mfg_tag_len + MFG_ENTRY_SIZE);
202 * Look for "BUS".. Data is not Null terminated.
203 * PHBID of 0xFF indicates PHB was not found in VPD Data.
205 static u8 __init iseries_parse_phbid(u8 *area, int len)
208 if ((*area == 'B') && (*(area + 1) == 'U')
209 && (*(area + 2) == 'S')) {
222 * Parse out the VPD Areas
224 static void __init iseries_parse_vpd(u8 *data, int data_len,
225 HvAgentId agent, u8 *frame, char card[4])
229 while (data_len > 0) {
233 if (tag == VPD_END_OF_AREA)
235 len = *(data + 1) + (*(data + 2) * 256);
238 if (tag == VPD_ID_STRING)
239 phb = iseries_parse_phbid(data, len);
240 else if (tag == VPD_VENDOR_AREA)
241 iseries_parse_mfg_area((struct mfg_vpd_area *)data, len,
242 agent, &phb, frame, card);
243 /* Point to next Area. */
249 static int __init iseries_get_location_code(u16 bus, HvAgentId agent,
250 u8 *frame, char card[4])
254 u8 *bus_vpd = kmalloc(BUS_VPDSIZE, GFP_KERNEL);
256 if (bus_vpd == NULL) {
257 printk("PCI: Bus VPD Buffer allocation failure.\n");
260 bus_vpd_len = HvCallPci_getBusVpd(bus, iseries_hv_addr(bus_vpd),
262 if (bus_vpd_len == 0) {
263 printk("PCI: Bus VPD Buffer zero length.\n");
266 /* printk("PCI: bus_vpd: %p, %d\n",bus_vpd, bus_vpd_len); */
267 /* Make sure this is what I think it is */
268 if (*bus_vpd != VPD_ID_STRING) {
269 printk("PCI: Bus VPD Buffer missing starting tag.\n");
272 iseries_parse_vpd(bus_vpd, bus_vpd_len, agent, frame, card);
280 * Prints the device information.
281 * - Pass in pci_dev* pointer to the device.
282 * - Pass in the device count
285 * PCI: Bus 0, Device 26, Vendor 0x12AE Frame 1, Card C10 Ethernet
288 static void __init iseries_device_information(struct pci_dev *pdev,
289 u16 bus, HvSubBusNumber subbus)
295 agent = ISERIES_PCI_AGENTID(ISERIES_GET_DEVICE_FROM_SUBBUS(subbus),
296 ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
298 if (iseries_get_location_code(bus, agent, &frame, card)) {
299 printk(KERN_INFO "PCI: %s, Vendor %04X Frame%3d, "
300 "Card %4s 0x%04X\n", pci_name(pdev), pdev->vendor,
301 frame, card, (int)(pdev->class >> 8));
306 * iomm_table_allocate_entry
308 * Adds pci_dev entry in address translation table
310 * - Allocates the number of entries required in table base on BAR
312 * - Allocates starting at BASE_IO_MEMORY and increases.
313 * - The size is round up to be a multiple of entry size.
314 * - CurrentIndex is incremented to keep track of the last entry.
315 * - Builds the resource entry for allocated BARs.
317 static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
319 struct resource *bar_res = &dev->resource[bar_num];
320 long bar_size = pci_resource_len(dev, bar_num);
323 * No space to allocate, quick exit, skip Allocation.
328 * Set Resource values.
330 spin_lock(&iomm_table_lock);
331 bar_res->start = BASE_IO_MEMORY +
332 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
333 bar_res->end = bar_res->start + bar_size - 1;
335 * Allocate the number of table entries needed for BAR.
337 while (bar_size > 0 ) {
338 iomm_table[current_iomm_table_entry] = dev->sysdata;
339 ds_addr_table[current_iomm_table_entry] =
340 iseries_ds_addr(dev->sysdata) | (bar_num << 24);
341 bar_size -= IOMM_TABLE_ENTRY_SIZE;
342 ++current_iomm_table_entry;
344 max_io_memory = BASE_IO_MEMORY +
345 IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
346 spin_unlock(&iomm_table_lock);
350 * allocate_device_bars
352 * - Allocates ALL pci_dev BAR's and updates the resources with the
353 * BAR value. BARS with zero length will have the resources
354 * The HvCallPci_getBarParms is used to get the size of the BAR
355 * space. It calls iomm_table_allocate_entry to allocate
357 * - Loops through The Bar resources(0 - 5) including the ROM
360 static void __init allocate_device_bars(struct pci_dev *dev)
364 for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num)
365 iomm_table_allocate_entry(dev, bar_num);
369 * Log error information to system console.
370 * Filter out the device not there errors.
371 * PCI: EADs Connect Failed 0x18.58.10 Rc: 0x00xx
372 * PCI: Read Vendor Failed 0x18.58.10 Rc: 0x00xx
373 * PCI: Connect Bus Unit Failed 0x18.58.10 Rc: 0x00xx
375 static void pci_log_error(char *error, int bus, int subbus,
376 int agent, int hv_res)
378 if (hv_res == 0x0302)
380 printk(KERN_ERR "PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
381 error, bus, subbus, agent, hv_res);
385 * Look down the chain to find the matching Device Device
387 static struct device_node *find_device_node(int bus, int devfn)
389 struct device_node *node;
391 for (node = NULL; (node = of_find_all_nodes(node)); ) {
392 struct pci_dn *pdn = PCI_DN(node);
394 if (pdn && (bus == pdn->busno) && (devfn == pdn->devfn))
401 * iSeries_pcibios_fixup_resources
403 * Fixes up all resources for devices
405 void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev)
409 unsigned char bus = pdev->bus->number;
410 struct device_node *node;
413 node = find_device_node(bus, pdev->devfn);
414 pr_debug("PCI: iSeries %s, pdev %p, node %p\n",
415 pci_name(pdev), pdev, node);
417 printk("PCI: %s disabled, device tree entry not found !\n",
419 for (i = 0; i <= PCI_ROM_RESOURCE; i++)
420 pdev->resource[i].flags = 0;
423 sub_bus = of_get_property(node, "linux,subbus", NULL);
424 agent = of_get_property(node, "linux,agent-id", NULL);
425 if (agent && sub_bus) {
426 u8 irq = iSeries_allocate_IRQ(bus, 0, *sub_bus);
429 err = HvCallXm_connectBusUnit(bus, *sub_bus, *agent, irq);
431 pci_log_error("Connect Bus Unit",
432 bus, *sub_bus, *agent, err);
434 err = HvCallPci_configStore8(bus, *sub_bus,
435 *agent, PCI_INTERRUPT_LINE, irq);
437 pci_log_error("PciCfgStore Irq Failed!",
438 bus, *sub_bus, *agent, err);
444 pdev->sysdata = node;
445 allocate_device_bars(pdev);
446 iseries_device_information(pdev, bus, *sub_bus);
450 * iSeries_pci_final_fixup(void)
452 void __init iSeries_pci_final_fixup(void)
454 /* Fix up at the device node and pci_dev relationship */
455 mf_display_src(0xC9000100);
456 iSeries_activate_IRQs();
457 mf_display_src(0xC9000200);
461 * Config space read and write functions.
462 * For now at least, we look for the device node for the bus and devfn
463 * that we are asked to access. It may be possible to translate the devfn
464 * to a subbus and deviceid more directly.
466 static u64 hv_cfg_read_func[4] = {
467 HvCallPciConfigLoad8, HvCallPciConfigLoad16,
468 HvCallPciConfigLoad32, HvCallPciConfigLoad32
471 static u64 hv_cfg_write_func[4] = {
472 HvCallPciConfigStore8, HvCallPciConfigStore16,
473 HvCallPciConfigStore32, HvCallPciConfigStore32
477 * Read PCI config space
479 static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
480 int offset, int size, u32 *val)
482 struct device_node *node = find_device_node(bus->number, devfn);
484 struct HvCallPci_LoadReturn ret;
487 return PCIBIOS_DEVICE_NOT_FOUND;
490 return PCIBIOS_BAD_REGISTER_NUMBER;
493 fn = hv_cfg_read_func[(size - 1) & 3];
494 HvCall3Ret16(fn, &ret, iseries_ds_addr(node), offset, 0);
498 return PCIBIOS_DEVICE_NOT_FOUND; /* or something */
506 * Write PCI config space
509 static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
510 int offset, int size, u32 val)
512 struct device_node *node = find_device_node(bus->number, devfn);
517 return PCIBIOS_DEVICE_NOT_FOUND;
519 return PCIBIOS_BAD_REGISTER_NUMBER;
521 fn = hv_cfg_write_func[(size - 1) & 3];
522 ret = HvCall4(fn, iseries_ds_addr(node), offset, val, 0);
525 return PCIBIOS_DEVICE_NOT_FOUND;
530 static struct pci_ops iSeries_pci_ops = {
531 .read = iSeries_pci_read_config,
532 .write = iSeries_pci_write_config
537 * -> On Failure, print and log information.
538 * Increment Retry Count, if exceeds max, panic partition.
540 * PCI: Device 23.90 ReadL I/O Error( 0): 0x1234
541 * PCI: Device 23.90 ReadL Retry( 1)
542 * PCI: Device 23.90 ReadL Retry Successful(1)
544 static int check_return_code(char *type, struct device_node *dn,
548 struct pci_dn *pdn = PCI_DN(dn);
551 printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
552 type, pdn->busno, pdn->devfn,
555 * Bump the retry and check for retry count exceeded.
556 * If, Exceeded, panic the system.
558 if (((*retry) > PCI_RETRY_MAX) &&
559 (limit_pci_retries > 0)) {
560 mf_display_src(0xB6000103);
562 panic("PCI: Hardware I/O Error, SRC B6000103, "
563 "Automatic Reboot Disabled.\n");
565 return -1; /* Retry Try */
571 * Translate the I/O Address into a device node, bar, and bar offset.
572 * Note: Make sure the passed variable end up on the stack to avoid
573 * the exposure of being device global.
575 static inline struct device_node *xlate_iomm_address(
576 const volatile void __iomem *addr,
577 u64 *dsaptr, u64 *bar_offset, const char *func)
579 unsigned long orig_addr;
580 unsigned long base_addr;
582 struct device_node *dn;
584 orig_addr = (unsigned long __force)addr;
585 if ((orig_addr < BASE_IO_MEMORY) || (orig_addr >= max_io_memory)) {
586 static unsigned long last_jiffies;
587 static int num_printed;
589 if (time_after(jiffies, last_jiffies + 60 * HZ)) {
590 last_jiffies = jiffies;
593 if (num_printed++ < 10)
595 "iSeries_%s: invalid access at IO address %p\n",
599 base_addr = orig_addr - BASE_IO_MEMORY;
600 ind = base_addr / IOMM_TABLE_ENTRY_SIZE;
601 dn = iomm_table[ind];
604 *dsaptr = ds_addr_table[ind];
605 *bar_offset = base_addr % IOMM_TABLE_ENTRY_SIZE;
607 panic("PCI: Invalid PCI IO address detected!\n");
612 * Read MM I/O Instructions for the iSeries
613 * On MM I/O error, all ones are returned and iSeries_pci_IoError is cal
614 * else, data is returned in Big Endian format.
616 static u8 iseries_readb(const volatile void __iomem *addr)
621 struct HvCallPci_LoadReturn ret;
622 struct device_node *dn =
623 xlate_iomm_address(addr, &dsa, &bar_offset, "read_byte");
628 HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, bar_offset, 0);
629 } while (check_return_code("RDB", dn, &retry, ret.rc) != 0);
634 static u16 iseries_readw_be(const volatile void __iomem *addr)
639 struct HvCallPci_LoadReturn ret;
640 struct device_node *dn =
641 xlate_iomm_address(addr, &dsa, &bar_offset, "read_word");
646 HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
648 } while (check_return_code("RDW", dn, &retry, ret.rc) != 0);
653 static u32 iseries_readl_be(const volatile void __iomem *addr)
658 struct HvCallPci_LoadReturn ret;
659 struct device_node *dn =
660 xlate_iomm_address(addr, &dsa, &bar_offset, "read_long");
665 HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
667 } while (check_return_code("RDL", dn, &retry, ret.rc) != 0);
673 * Write MM I/O Instructions for the iSeries
676 static void iseries_writeb(u8 data, volatile void __iomem *addr)
682 struct device_node *dn =
683 xlate_iomm_address(addr, &dsa, &bar_offset, "write_byte");
688 rc = HvCall4(HvCallPciBarStore8, dsa, bar_offset, data, 0);
689 } while (check_return_code("WWB", dn, &retry, rc) != 0);
692 static void iseries_writew_be(u16 data, volatile void __iomem *addr)
698 struct device_node *dn =
699 xlate_iomm_address(addr, &dsa, &bar_offset, "write_word");
704 rc = HvCall4(HvCallPciBarStore16, dsa, bar_offset, data, 0);
705 } while (check_return_code("WWW", dn, &retry, rc) != 0);
708 static void iseries_writel_be(u32 data, volatile void __iomem *addr)
714 struct device_node *dn =
715 xlate_iomm_address(addr, &dsa, &bar_offset, "write_long");
720 rc = HvCall4(HvCallPciBarStore32, dsa, bar_offset, data, 0);
721 } while (check_return_code("WWL", dn, &retry, rc) != 0);
724 static u16 iseries_readw(const volatile void __iomem *addr)
726 return le16_to_cpu(iseries_readw_be(addr));
729 static u32 iseries_readl(const volatile void __iomem *addr)
731 return le32_to_cpu(iseries_readl_be(addr));
734 static void iseries_writew(u16 data, volatile void __iomem *addr)
736 iseries_writew_be(cpu_to_le16(data), addr);
739 static void iseries_writel(u32 data, volatile void __iomem *addr)
741 iseries_writel(cpu_to_le32(data), addr);
744 static void iseries_readsb(const volatile void __iomem *addr, void *buf,
749 *(dst++) = iseries_readb(addr);
752 static void iseries_readsw(const volatile void __iomem *addr, void *buf,
757 *(dst++) = iseries_readw_be(addr);
760 static void iseries_readsl(const volatile void __iomem *addr, void *buf,
765 *(dst++) = iseries_readl_be(addr);
768 static void iseries_writesb(volatile void __iomem *addr, const void *buf,
773 iseries_writeb(*(src++), addr);
776 static void iseries_writesw(volatile void __iomem *addr, const void *buf,
779 const u16 *src = buf;
781 iseries_writew_be(*(src++), addr);
784 static void iseries_writesl(volatile void __iomem *addr, const void *buf,
787 const u32 *src = buf;
789 iseries_writel_be(*(src++), addr);
792 static void iseries_memset_io(volatile void __iomem *addr, int c,
795 volatile char __iomem *d = addr;
798 iseries_writeb(c, d++);
801 static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
805 const volatile char __iomem *s = src;
808 *d++ = iseries_readb(s++);
811 static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
815 volatile char __iomem *d = dest;
818 iseries_writeb(*s++, d++);
821 /* We only set MMIO ops. The default PIO ops will be default
822 * to the MMIO ops + pci_io_base which is 0 on iSeries as
823 * expected so both should work.
825 * Note that we don't implement the readq/writeq versions as
826 * I don't know of an HV call for doing so. Thus, the default
827 * operation will be used instead, which will fault a the value
828 * return by iSeries for MMIO addresses always hits a non mapped
829 * area. This is as good as the BUG() we used to have there.
831 static struct ppc_pci_io __initdata iseries_pci_io = {
832 .readb = iseries_readb,
833 .readw = iseries_readw,
834 .readl = iseries_readl,
835 .readw_be = iseries_readw_be,
836 .readl_be = iseries_readl_be,
837 .writeb = iseries_writeb,
838 .writew = iseries_writew,
839 .writel = iseries_writel,
840 .writew_be = iseries_writew_be,
841 .writel_be = iseries_writel_be,
842 .readsb = iseries_readsb,
843 .readsw = iseries_readsw,
844 .readsl = iseries_readsl,
845 .writesb = iseries_writesb,
846 .writesw = iseries_writesw,
847 .writesl = iseries_writesl,
848 .memset_io = iseries_memset_io,
849 .memcpy_fromio = iseries_memcpy_fromio,
850 .memcpy_toio = iseries_memcpy_toio,
854 * iSeries_pcibios_init
857 * This function checks for all possible system PCI host bridges that connect
858 * PCI buses. The system hypervisor is queried as to the guest partition
859 * ownership status. A pci_controller is built for any bus which is partially
860 * owned or fully owned by this guest partition.
862 void __init iSeries_pcibios_init(void)
864 struct pci_controller *phb;
865 struct device_node *root = of_find_node_by_path("/");
866 struct device_node *node = NULL;
868 /* Install IO hooks */
869 ppc_pci_io = iseries_pci_io;
873 /* iSeries has no IO space in the common sense, it needs to set
879 printk(KERN_CRIT "iSeries_pcibios_init: can't find root "
883 while ((node = of_get_next_child(root, node)) != NULL) {
887 if ((node->type == NULL) || (strcmp(node->type, "pci") != 0))
890 busp = of_get_property(node, "bus-range", NULL);
894 printk("bus %d appears to exist\n", bus);
895 phb = pcibios_alloc_controller(node);
898 /* All legacy iSeries PHBs are in domain zero */
899 phb->global_number = 0;
901 phb->first_busno = bus;
902 phb->last_busno = bus;
903 phb->ops = &iSeries_pci_ops;
904 phb->io_base_virt = (void __iomem *)_IO_BASE;
905 phb->io_resource.flags = IORESOURCE_IO;
906 phb->io_resource.start = BASE_IO_MEMORY;
907 phb->io_resource.end = END_IO_MEMORY;
908 phb->io_resource.name = "iSeries PCI IO";
909 phb->mem_resources[0].flags = IORESOURCE_MEM;
910 phb->mem_resources[0].start = BASE_IO_MEMORY;
911 phb->mem_resources[0].end = END_IO_MEMORY;
912 phb->mem_resources[0].name = "Series PCI MEM";