2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/wait.h>
33 #include <linux/mutex.h>
34 #include <linux/linux_logo.h>
36 #include <asm/spu_priv1.h>
37 #include <asm/spu_csa.h>
41 const struct spu_management_ops *spu_management_ops;
42 EXPORT_SYMBOL_GPL(spu_management_ops);
44 const struct spu_priv1_ops *spu_priv1_ops;
45 EXPORT_SYMBOL_GPL(spu_priv1_ops);
47 struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
48 EXPORT_SYMBOL_GPL(cbe_spu_info);
51 * The spufs fault-handling code needs to call force_sig_info to raise signals
52 * on DMA errors. Export it here to avoid general kernel-wide access to this
55 EXPORT_SYMBOL_GPL(force_sig_info);
58 * Protects cbe_spu_info and spu->number.
60 static DEFINE_SPINLOCK(spu_lock);
63 * List of all spus in the system.
65 * This list is iterated by callers from irq context and callers that
66 * want to sleep. Thus modifications need to be done with both
67 * spu_full_list_lock and spu_full_list_mutex held, while iterating
68 * through it requires either of these locks.
70 * In addition spu_full_list_lock protects all assignmens to
73 static LIST_HEAD(spu_full_list);
74 static DEFINE_SPINLOCK(spu_full_list_lock);
75 static DEFINE_MUTEX(spu_full_list_mutex);
81 void spu_invalidate_slbs(struct spu *spu)
83 struct spu_priv2 __iomem *priv2 = spu->priv2;
86 spin_lock_irqsave(&spu->register_lock, flags);
87 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
88 out_be64(&priv2->slb_invalidate_all_W, 0UL);
89 spin_unlock_irqrestore(&spu->register_lock, flags);
91 EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
93 /* This is called by the MM core when a segment size is changed, to
94 * request a flush of all the SPEs using a given mm
96 void spu_flush_all_slbs(struct mm_struct *mm)
101 spin_lock_irqsave(&spu_full_list_lock, flags);
102 list_for_each_entry(spu, &spu_full_list, full_list) {
104 spu_invalidate_slbs(spu);
106 spin_unlock_irqrestore(&spu_full_list_lock, flags);
109 /* The hack below stinks... try to do something better one of
110 * these days... Does it even work properly with NR_CPUS == 1 ?
112 static inline void mm_needs_global_tlbie(struct mm_struct *mm)
114 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
116 /* Global TLBIE broadcast required with SPEs. */
117 bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr);
120 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
124 spin_lock_irqsave(&spu_full_list_lock, flags);
126 spin_unlock_irqrestore(&spu_full_list_lock, flags);
128 mm_needs_global_tlbie(mm);
130 EXPORT_SYMBOL_GPL(spu_associate_mm);
132 int spu_64k_pages_available(void)
134 return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
136 EXPORT_SYMBOL_GPL(spu_64k_pages_available);
138 static void spu_restart_dma(struct spu *spu)
140 struct spu_priv2 __iomem *priv2 = spu->priv2;
142 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
143 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
145 set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
150 static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
152 struct spu_priv2 __iomem *priv2 = spu->priv2;
154 pr_debug("%s: adding SLB[%d] 0x%016llx 0x%016llx\n",
155 __func__, slbe, slb->vsid, slb->esid);
157 out_be64(&priv2->slb_index_W, slbe);
158 /* set invalid before writing vsid */
159 out_be64(&priv2->slb_esid_RW, 0);
160 /* now it's safe to write the vsid */
161 out_be64(&priv2->slb_vsid_RW, slb->vsid);
162 /* setting the new esid makes the entry valid again */
163 out_be64(&priv2->slb_esid_RW, slb->esid);
166 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
168 struct mm_struct *mm = spu->mm;
172 pr_debug("%s\n", __func__);
174 slb.esid = (ea & ESID_MASK) | SLB_ESID_V;
176 switch(REGION_ID(ea)) {
178 #ifdef CONFIG_PPC_MM_SLICES
179 psize = get_slice_psize(mm, ea);
181 psize = mm->context.user_psize;
183 slb.vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M)
184 << SLB_VSID_SHIFT) | SLB_VSID_USER;
186 case VMALLOC_REGION_ID:
187 if (ea < VMALLOC_END)
188 psize = mmu_vmalloc_psize;
190 psize = mmu_io_psize;
191 slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
192 << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
194 case KERNEL_REGION_ID:
195 psize = mmu_linear_psize;
196 slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
197 << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
200 /* Future: support kernel segments so that drivers
203 pr_debug("invalid region access at %016lx\n", ea);
206 slb.vsid |= mmu_psize_defs[psize].sllp;
208 spu_load_slb(spu, spu->slb_replace, &slb);
211 if (spu->slb_replace >= 8)
212 spu->slb_replace = 0;
214 spu_restart_dma(spu);
215 spu->stats.slb_flt++;
219 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
220 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
224 pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea);
227 * Handle kernel space hash faults immediately. User hash
228 * faults need to be deferred to process context.
230 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) &&
231 (REGION_ID(ea) != USER_REGION_ID)) {
233 spin_unlock(&spu->register_lock);
234 ret = hash_page(ea, _PAGE_PRESENT, 0x300);
235 spin_lock(&spu->register_lock);
238 spu_restart_dma(spu);
243 spu->class_1_dar = ea;
244 spu->class_1_dsisr = dsisr;
246 spu->stop_callback(spu, 1);
248 spu->class_1_dar = 0;
249 spu->class_1_dsisr = 0;
254 static void __spu_kernel_slb(void *addr, struct spu_slb *slb)
256 unsigned long ea = (unsigned long)addr;
259 if (REGION_ID(ea) == KERNEL_REGION_ID)
260 llp = mmu_psize_defs[mmu_linear_psize].sllp;
262 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
264 slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
265 SLB_VSID_KERNEL | llp;
266 slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
270 * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
271 * address @new_addr is present.
273 static inline int __slb_present(struct spu_slb *slbs, int nr_slbs,
276 unsigned long ea = (unsigned long)new_addr;
279 for (i = 0; i < nr_slbs; i++)
280 if (!((slbs[i].esid ^ ea) & ESID_MASK))
287 * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
288 * need to map both the context save area, and the save/restore code.
290 * Because the lscsa and code may cross segment boundaires, we check to see
291 * if mappings are required for the start and end of each range. We currently
292 * assume that the mappings are smaller that one segment - if not, something
293 * is seriously wrong.
295 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
296 void *code, int code_size)
298 struct spu_slb slbs[4];
300 /* start and end addresses of both mappings */
302 lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
303 code, code + code_size - 1
306 /* check the set of addresses, and create a new entry in the slbs array
307 * if there isn't already a SLB for that address */
308 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
309 if (__slb_present(slbs, nr_slbs, addrs[i]))
312 __spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
316 spin_lock_irq(&spu->register_lock);
317 /* Add the set of SLBs */
318 for (i = 0; i < nr_slbs; i++)
319 spu_load_slb(spu, i, &slbs[i]);
320 spin_unlock_irq(&spu->register_lock);
322 EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
325 spu_irq_class_0(int irq, void *data)
328 unsigned long stat, mask;
332 spin_lock(&spu->register_lock);
333 mask = spu_int_mask_get(spu, 0);
334 stat = spu_int_stat_get(spu, 0) & mask;
336 spu->class_0_pending |= stat;
337 spu->class_0_dar = spu_mfc_dar_get(spu);
338 spu->stop_callback(spu, 0);
339 spu->class_0_pending = 0;
340 spu->class_0_dar = 0;
342 spu_int_stat_clear(spu, 0, stat);
343 spin_unlock(&spu->register_lock);
349 spu_irq_class_1(int irq, void *data)
352 unsigned long stat, mask, dar, dsisr;
356 /* atomically read & clear class1 status. */
357 spin_lock(&spu->register_lock);
358 mask = spu_int_mask_get(spu, 1);
359 stat = spu_int_stat_get(spu, 1) & mask;
360 dar = spu_mfc_dar_get(spu);
361 dsisr = spu_mfc_dsisr_get(spu);
362 if (stat & CLASS1_STORAGE_FAULT_INTR)
363 spu_mfc_dsisr_set(spu, 0ul);
364 spu_int_stat_clear(spu, 1, stat);
366 pr_debug("%s: %lx %lx %lx %lx\n", __func__, mask, stat,
369 if (stat & CLASS1_SEGMENT_FAULT_INTR)
370 __spu_trap_data_seg(spu, dar);
372 if (stat & CLASS1_STORAGE_FAULT_INTR)
373 __spu_trap_data_map(spu, dar, dsisr);
375 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR)
378 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
381 spu->class_1_dsisr = 0;
382 spu->class_1_dar = 0;
384 spin_unlock(&spu->register_lock);
386 return stat ? IRQ_HANDLED : IRQ_NONE;
390 spu_irq_class_2(int irq, void *data)
395 const int mailbox_intrs =
396 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR;
399 spin_lock(&spu->register_lock);
400 stat = spu_int_stat_get(spu, 2);
401 mask = spu_int_mask_get(spu, 2);
402 /* ignore interrupts we're not waiting for */
404 /* mailbox interrupts are level triggered. mask them now before
406 if (stat & mailbox_intrs)
407 spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
408 /* acknowledge all interrupts before the callbacks */
409 spu_int_stat_clear(spu, 2, stat);
411 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
413 if (stat & CLASS2_MAILBOX_INTR)
414 spu->ibox_callback(spu);
416 if (stat & CLASS2_SPU_STOP_INTR)
417 spu->stop_callback(spu, 2);
419 if (stat & CLASS2_SPU_HALT_INTR)
420 spu->stop_callback(spu, 2);
422 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
423 spu->mfc_callback(spu);
425 if (stat & CLASS2_MAILBOX_THRESHOLD_INTR)
426 spu->wbox_callback(spu);
428 spu->stats.class2_intr++;
430 spin_unlock(&spu->register_lock);
432 return stat ? IRQ_HANDLED : IRQ_NONE;
435 static int spu_request_irqs(struct spu *spu)
439 if (spu->irqs[0] != NO_IRQ) {
440 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
442 ret = request_irq(spu->irqs[0], spu_irq_class_0,
448 if (spu->irqs[1] != NO_IRQ) {
449 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
451 ret = request_irq(spu->irqs[1], spu_irq_class_1,
457 if (spu->irqs[2] != NO_IRQ) {
458 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
460 ret = request_irq(spu->irqs[2], spu_irq_class_2,
469 if (spu->irqs[1] != NO_IRQ)
470 free_irq(spu->irqs[1], spu);
472 if (spu->irqs[0] != NO_IRQ)
473 free_irq(spu->irqs[0], spu);
478 static void spu_free_irqs(struct spu *spu)
480 if (spu->irqs[0] != NO_IRQ)
481 free_irq(spu->irqs[0], spu);
482 if (spu->irqs[1] != NO_IRQ)
483 free_irq(spu->irqs[1], spu);
484 if (spu->irqs[2] != NO_IRQ)
485 free_irq(spu->irqs[2], spu);
488 void spu_init_channels(struct spu *spu)
490 static const struct {
494 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
495 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
497 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
498 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
499 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
501 struct spu_priv2 __iomem *priv2;
506 /* initialize all channel data to zero */
507 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
510 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
511 for (count = 0; count < zero_list[i].count; count++)
512 out_be64(&priv2->spu_chnldata_RW, 0);
515 /* initialize channel counts to meaningful values */
516 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
517 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
518 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
521 EXPORT_SYMBOL_GPL(spu_init_channels);
523 static int spu_shutdown(struct sys_device *sysdev)
525 struct spu *spu = container_of(sysdev, struct spu, sysdev);
528 spu_destroy_spu(spu);
532 static struct sysdev_class spu_sysdev_class = {
534 .shutdown = spu_shutdown,
537 int spu_add_sysdev_attr(struct sysdev_attribute *attr)
541 mutex_lock(&spu_full_list_mutex);
542 list_for_each_entry(spu, &spu_full_list, full_list)
543 sysdev_create_file(&spu->sysdev, attr);
544 mutex_unlock(&spu_full_list_mutex);
548 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
550 int spu_add_sysdev_attr_group(struct attribute_group *attrs)
555 mutex_lock(&spu_full_list_mutex);
556 list_for_each_entry(spu, &spu_full_list, full_list) {
557 rc = sysfs_create_group(&spu->sysdev.kobj, attrs);
559 /* we're in trouble here, but try unwinding anyway */
561 printk(KERN_ERR "%s: can't create sysfs group '%s'\n",
562 __func__, attrs->name);
564 list_for_each_entry_continue_reverse(spu,
565 &spu_full_list, full_list)
566 sysfs_remove_group(&spu->sysdev.kobj, attrs);
571 mutex_unlock(&spu_full_list_mutex);
575 EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
578 void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
582 mutex_lock(&spu_full_list_mutex);
583 list_for_each_entry(spu, &spu_full_list, full_list)
584 sysdev_remove_file(&spu->sysdev, attr);
585 mutex_unlock(&spu_full_list_mutex);
587 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
589 void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
593 mutex_lock(&spu_full_list_mutex);
594 list_for_each_entry(spu, &spu_full_list, full_list)
595 sysfs_remove_group(&spu->sysdev.kobj, attrs);
596 mutex_unlock(&spu_full_list_mutex);
598 EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
600 static int spu_create_sysdev(struct spu *spu)
604 spu->sysdev.id = spu->number;
605 spu->sysdev.cls = &spu_sysdev_class;
606 ret = sysdev_register(&spu->sysdev);
608 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
613 sysfs_add_device_to_node(&spu->sysdev, spu->node);
618 static int __init create_spu(void *data)
627 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
631 spu->alloc_state = SPU_FREE;
633 spin_lock_init(&spu->register_lock);
634 spin_lock(&spu_lock);
635 spu->number = number++;
636 spin_unlock(&spu_lock);
638 ret = spu_create_spu(spu, data);
643 spu_mfc_sdr_setup(spu);
644 spu_mfc_sr1_set(spu, 0x33);
645 ret = spu_request_irqs(spu);
649 ret = spu_create_sysdev(spu);
653 mutex_lock(&cbe_spu_info[spu->node].list_mutex);
654 list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
655 cbe_spu_info[spu->node].n_spus++;
656 mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
658 mutex_lock(&spu_full_list_mutex);
659 spin_lock_irqsave(&spu_full_list_lock, flags);
660 list_add(&spu->full_list, &spu_full_list);
661 spin_unlock_irqrestore(&spu_full_list_lock, flags);
662 mutex_unlock(&spu_full_list_mutex);
664 spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
666 spu->stats.tstamp = timespec_to_ns(&ts);
668 INIT_LIST_HEAD(&spu->aff_list);
675 spu_destroy_spu(spu);
682 static const char *spu_state_names[] = {
683 "user", "system", "iowait", "idle"
686 static unsigned long long spu_acct_time(struct spu *spu,
687 enum spu_utilization_state state)
690 unsigned long long time = spu->stats.times[state];
693 * If the spu is idle or the context is stopped, utilization
694 * statistics are not updated. Apply the time delta from the
695 * last recorded state of the spu.
697 if (spu->stats.util_state == state) {
699 time += timespec_to_ns(&ts) - spu->stats.tstamp;
702 return time / NSEC_PER_MSEC;
706 static ssize_t spu_stat_show(struct sys_device *sysdev,
707 struct sysdev_attribute *attr, char *buf)
709 struct spu *spu = container_of(sysdev, struct spu, sysdev);
711 return sprintf(buf, "%s %llu %llu %llu %llu "
712 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
713 spu_state_names[spu->stats.util_state],
714 spu_acct_time(spu, SPU_UTIL_USER),
715 spu_acct_time(spu, SPU_UTIL_SYSTEM),
716 spu_acct_time(spu, SPU_UTIL_IOWAIT),
717 spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
718 spu->stats.vol_ctx_switch,
719 spu->stats.invol_ctx_switch,
724 spu->stats.class2_intr,
725 spu->stats.libassist);
728 static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
730 static int __init init_spu_base(void)
734 for (i = 0; i < MAX_NUMNODES; i++) {
735 mutex_init(&cbe_spu_info[i].list_mutex);
736 INIT_LIST_HEAD(&cbe_spu_info[i].spus);
739 if (!spu_management_ops)
742 /* create sysdev class for spus */
743 ret = sysdev_class_register(&spu_sysdev_class);
747 ret = spu_enumerate_spus(create_spu);
750 printk(KERN_WARNING "%s: Error initializing spus\n",
752 goto out_unregister_sysdev_class;
756 fb_append_extra_logo(&logo_spe_clut224, ret);
758 mutex_lock(&spu_full_list_mutex);
759 xmon_register_spus(&spu_full_list);
760 crash_register_spus(&spu_full_list);
761 mutex_unlock(&spu_full_list_mutex);
762 spu_add_sysdev_attr(&attr_stat);
768 out_unregister_sysdev_class:
769 sysdev_class_unregister(&spu_sysdev_class);
773 module_init(init_spu_base);
775 MODULE_LICENSE("GPL");
776 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");