5 This option selects whether a 32-bit or a 64-bit kernel
8 menu "Processor support"
10 prompt "Processor Type"
13 There are five families of 32 bit PowerPC chips supported.
14 The most common ones are the desktop and server CPUs (601, 603,
15 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
16 embedded 512x/52xx/82xx/83xx/86xx counterparts.
17 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
18 (85xx) each form a family of their own that is not compatible
21 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
24 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
45 bool "AMCC 44x, 46x or 47x"
58 prompt "Processor Type"
61 There are two families of 64 bit PowerPC chips supported.
62 The most common ones are the desktop and server CPUs
63 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
65 The other are the "embedded" processors compliant with the
66 "Book 3E" variant of the architecture
69 bool "Server processors"
71 select PPC_HAVE_PMU_SUPPORT
72 select SYS_SUPPORTS_HUGETLBFS
75 bool "Embedded processors"
76 select PPC_FPU # Make it a choice ?
77 select PPC_SMP_MUXED_IPI
82 prompt "CPU selection"
86 This will create a kernel which is optimised for a particular CPU.
87 The resulting kernel may not run on other CPUs, so use this with care.
89 If unsure, select Generic.
95 bool "Cell Broadband Engine"
113 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
117 depends on PPC_BOOK3E_64
121 depends on PPC32 && PPC_BOOK3S
122 select PPC_HAVE_PMU_SUPPORT
126 depends on PPC64 && PPC_BOOK3S
127 default y if !POWER4_ONLY
130 depends on PPC64 && PPC_BOOK3S
135 depends on PPC_BOOK3E_64
138 bool "Optimize for Cell Broadband Engine"
139 depends on PPC64 && PPC_BOOK3S
141 Cause the compiler to optimize for the PPE of the Cell Broadband
142 Engine. This will make the code run considerably faster on Cell
143 but somewhat slower on other machines. This option only changes
144 the scheduling of instructions, not the selection of instructions
145 itself, so the resulting kernel will keep running on all other
146 machines. When building a kernel that is supposed to run only
147 on Cell, you should also select the POWER4_ONLY option.
149 # this is temp to handle compat with arch=ppc
154 select FSL_EMB_PERFMON
155 select PPC_FSL_BOOK3E
159 bool "e500mc Support"
163 This must be enabled for running on e500mc (and derivatives
164 such as e5500/e6500), and must be disabled for running on
171 config FSL_EMB_PERFMON
172 bool "Freescale Embedded Perfmon"
173 depends on E500 || PPC_83xx
175 This is the Performance Monitor support found on the e500 core
176 and some e300 cores (c3 and c4). Select this only if your
177 core supports the Embedded Performance Monitor APU
179 config FSL_EMB_PERF_EVENT
181 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
184 config FSL_EMB_PERF_EVENT_E500
186 depends on FSL_EMB_PERF_EVENT && E500
191 depends on 40x || 44x
196 depends on E200 || E500 || 44x || PPC_BOOK3E
201 depends on (E200 || E500) && PPC32
204 # this is for common code between PPC32 & PPC64 FSL BOOKE
205 config PPC_FSL_BOOK3E
207 select FSL_EMB_PERFMON
208 select PPC_SMP_MUXED_IPI
209 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
210 default y if FSL_BOOKE
214 depends on 44x || E500 || PPC_86xx
215 default y if PHYS_64BIT
218 bool 'Large physical address support' if E500 || PPC_86xx
219 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
221 This option enables kernel support for larger than 32-bit physical
222 addresses. This feature may not be available on all cores.
224 If you have more than 3.5GB of RAM or so, you also need to enable
225 SWIOTLB under Kernel Options for this to work. The actual number
226 is platform-dependent.
228 If in doubt, say N here.
231 bool "AltiVec Support"
232 depends on 6xx || POWER4
234 This option enables kernel support for the Altivec extensions to the
235 PowerPC processor. The kernel currently supports saving and restoring
236 altivec registers, and turning on the 'altivec enable' bit so user
237 processes can execute altivec instructions.
239 This option is only usefully if you have a processor that supports
240 altivec (G4, otherwise known as 74xx series), but does not have
241 any affect on a non-altivec cpu (it does, however add code to the
244 If in doubt, say Y here.
248 depends on POWER4 && ALTIVEC && PPC_FPU
251 This option enables kernel support for the Vector Scaler extensions
252 to the PowerPC processor. The kernel currently supports saving and
253 restoring VSX registers, and turning on the 'VSX enable' bit so user
254 processes can execute VSX instructions.
256 This option is only useful if you have a processor that supports
257 VSX (P7 and above), but does not have any affect on a non-VSX
258 CPUs (it does, however add code to the kernel).
260 If in doubt, say Y here.
263 bool "Support for PowerPC icswx coprocessor instruction"
264 depends on POWER4 || PPC_A2
268 This option enables kernel support for the PowerPC Initiate
269 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
272 This option is only useful if you have a processor that supports
273 the icswx coprocessor instruction. It does not have any effect
274 on processors without the icswx coprocessor instruction.
276 This option slightly increases kernel memory usage.
278 If in doubt, say N here.
281 bool "icswx requires direct PID management"
282 depends on PPC_ICSWX && POWER4
285 The PID register in server is used explicitly for ICSWX. In
286 embedded systems PID management is done by the system.
288 config PPC_ICSWX_USE_SIGILL
289 bool "Should a bad CT cause a SIGILL?"
293 Should a bad CT used for "non-record form ICSWX" cause an
294 illegal instruction signal or should it be silent as
297 If in doubt, say N here.
301 depends on E200 || (E500 && !PPC_E500MC)
304 This option enables kernel support for the Signal Processing
305 Extensions (SPE) to the PowerPC processor. The kernel currently
306 supports saving and restoring SPE registers, and turning on the
307 'spe enable' bit so user processes can execute SPE instructions.
309 This option is only useful if you have a processor that supports
310 SPE (e500, otherwise known as 85xx series), but does not have any
311 effect on a non-spe cpu (it does, however add code to the kernel).
313 If in doubt, say Y here.
317 depends on PPC_BOOK3S
319 config PPC_STD_MMU_32
321 depends on PPC_STD_MMU && PPC32
323 config PPC_STD_MMU_64
325 depends on PPC_STD_MMU && PPC64
327 config PPC_MMU_NOHASH
329 depends on !PPC_STD_MMU
331 config PPC_BOOK3E_MMU
333 depends on FSL_BOOKE || PPC_BOOK3E
337 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
340 config VIRT_CPU_ACCOUNTING
341 bool "Deterministic task and CPU time accounting"
345 Select this option to enable more accurate task and CPU time
346 accounting. This is done by reading a CPU counter on each
347 kernel entry and exit and on transitions within the kernel
348 between system, softirq and hardirq state, so there is a
349 small performance impact. This also enables accounting of
350 stolen time on logically-partitioned systems running on
351 IBM POWER5-based machines.
353 If in doubt, say Y here.
355 config PPC_HAVE_PMU_SUPPORT
360 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
362 This enables the powerpc-specific perf_event back-end.
365 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
366 bool "Symmetric multi-processing support"
368 This enables support for systems with more than one CPU. If you have
369 a system with only one CPU, say N. If you have a system with more
370 than one CPU, say Y. Note that the kernel does not currently
371 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
372 since they have inadequate hardware support for multiprocessor
375 If you say N here, the kernel will run on single and multiprocessor
376 machines, but will use only one CPU of a multiprocessor machine. If
377 you say Y here, the kernel will run on single-processor machines.
378 On a single-processor machine, the kernel will run faster if you say
381 If you don't know what to do here, say N.
384 int "Maximum number of CPUs (2-8192)"
387 default "32" if PPC64
390 config NOT_COHERENT_CACHE
392 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
396 config CHECK_CACHE_COHERENCY