4 #include <linux/init.h>
5 #include <linux/device.h>
6 #include <asm/pci-bridge.h>
8 /* System Clock Control Register */
9 #define MPC83XX_SCCR_OFFS 0xA08
10 #define MPC83XX_SCCR_USB_MASK 0x00f00000
11 #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
12 #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
13 #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
14 #define MPC83XX_SCCR_USB_DRCM_11 0x00300000
15 #define MPC83XX_SCCR_USB_DRCM_01 0x00100000
16 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000
18 /* system i/o configuration register low */
19 #define MPC83XX_SICRL_OFFS 0x114
20 #define MPC834X_SICRL_USB_MASK 0x60000000
21 #define MPC834X_SICRL_USB0 0x40000000
22 #define MPC834X_SICRL_USB1 0x20000000
23 #define MPC831X_SICRL_USB_MASK 0x00000c00
24 #define MPC831X_SICRL_USB_ULPI 0x00000800
26 /* system i/o configuration register high */
27 #define MPC83XX_SICRH_OFFS 0x118
28 #define MPC834X_SICRH_USB_UTMI 0x00020000
29 #define MPC831X_SICRH_USB_MASK 0x000000e0
30 #define MPC831X_SICRH_USB_ULPI 0x000000a0
32 /* USB Control Register */
33 #define FSL_USB2_CONTROL_OFFS 0x500
34 #define CONTROL_UTMI_PHY_EN 0x00000200
35 #define CONTROL_REFSEL_48MHZ 0x00000080
36 #define CONTROL_PHY_CLK_SEL_ULPI 0x00000400
37 #define CONTROL_OTG_PORT 0x00000020
39 /* USB PORTSC Registers */
40 #define FSL_USB2_PORTSC1_OFFS 0x184
41 #define FSL_USB2_PORTSC2_OFFS 0x188
42 #define PORTSCX_PTW_16BIT 0x10000000
43 #define PORTSCX_PTS_UTMI 0x00000000
44 #define PORTSCX_PTS_ULPI 0x80000000
47 * Declaration for the various functions exported by the
48 * mpc83xx_* files. Mostly for use by mpc83xx_setup
51 extern int mpc83xx_add_bridge(struct device_node *dev);
52 extern int mpc83xx_exclude_device(struct pci_controller *hose,
53 u_char bus, u_char devfn);
54 extern void mpc83xx_restart(char *cmd);
55 extern long mpc83xx_time_init(void);
56 extern int mpc834x_usb_cfg(void);
57 extern int mpc831x_usb_cfg(void);
59 #endif /* __MPC83XX_H__ */