2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
14 * This file handles the architecture-dependent parts of hardware exceptions
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/user.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/module.h>
28 #include <linux/prctl.h>
29 #include <linux/delay.h>
30 #include <linux/kprobes.h>
31 #include <linux/kexec.h>
32 #include <linux/backlight.h>
33 #include <linux/bug.h>
34 #include <linux/kdebug.h>
35 #include <linux/debugfs.h>
37 #include <asm/emulated_ops.h>
38 #include <asm/pgtable.h>
39 #include <asm/uaccess.h>
40 #include <asm/system.h>
42 #include <asm/machdep.h>
48 #ifdef CONFIG_PMAC_BACKLIGHT
49 #include <asm/backlight.h>
52 #include <asm/firmware.h>
53 #include <asm/processor.h>
55 #include <asm/kexec.h>
56 #include <asm/ppc-opcode.h>
57 #ifdef CONFIG_FSL_BOOKE
58 #include <asm/dbell.h>
61 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
62 int (*__debugger)(struct pt_regs *regs) __read_mostly;
63 int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly;
64 int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly;
65 int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly;
66 int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly;
67 int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly;
68 int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly;
70 EXPORT_SYMBOL(__debugger);
71 EXPORT_SYMBOL(__debugger_ipi);
72 EXPORT_SYMBOL(__debugger_bpt);
73 EXPORT_SYMBOL(__debugger_sstep);
74 EXPORT_SYMBOL(__debugger_iabr_match);
75 EXPORT_SYMBOL(__debugger_dabr_match);
76 EXPORT_SYMBOL(__debugger_fault_handler);
80 * Trap & Exception support
83 #ifdef CONFIG_PMAC_BACKLIGHT
84 static void pmac_backlight_unblank(void)
86 mutex_lock(&pmac_backlight_mutex);
88 struct backlight_properties *props;
90 props = &pmac_backlight->props;
91 props->brightness = props->max_brightness;
92 props->power = FB_BLANK_UNBLANK;
93 backlight_update_status(pmac_backlight);
95 mutex_unlock(&pmac_backlight_mutex);
98 static inline void pmac_backlight_unblank(void) { }
101 int die(const char *str, struct pt_regs *regs, long err)
106 int lock_owner_depth;
108 .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock),
110 .lock_owner_depth = 0
112 static int die_counter;
120 if (die.lock_owner != raw_smp_processor_id()) {
122 raw_spin_lock_irqsave(&die.lock, flags);
123 die.lock_owner = smp_processor_id();
124 die.lock_owner_depth = 0;
126 if (machine_is(powermac))
127 pmac_backlight_unblank();
129 local_save_flags(flags);
132 if (++die.lock_owner_depth < 3) {
133 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
134 #ifdef CONFIG_PREEMPT
138 printk("SMP NR_CPUS=%d ", NR_CPUS);
140 #ifdef CONFIG_DEBUG_PAGEALLOC
141 printk("DEBUG_PAGEALLOC ");
146 printk("%s\n", ppc_md.name ? ppc_md.name : "");
148 sysfs_printk_last_file();
149 if (notify_die(DIE_OOPS, str, regs, err, 255,
150 SIGSEGV) == NOTIFY_STOP)
156 printk("Recursive die() failure, output suppressed\n");
161 add_taint(TAINT_DIE);
162 raw_spin_unlock_irqrestore(&die.lock, flags);
164 if (kexec_should_crash(current) ||
165 kexec_sr_activated(smp_processor_id()))
167 crash_kexec_secondary(regs);
170 panic("Fatal exception in interrupt");
173 panic("Fatal exception");
181 void user_single_step_siginfo(struct task_struct *tsk,
182 struct pt_regs *regs, siginfo_t *info)
184 memset(info, 0, sizeof(*info));
185 info->si_signo = SIGTRAP;
186 info->si_code = TRAP_TRACE;
187 info->si_addr = (void __user *)regs->nip;
190 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
193 const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \
194 "at %08lx nip %08lx lr %08lx code %x\n";
195 const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \
196 "at %016lx nip %016lx lr %016lx code %x\n";
198 if (!user_mode(regs)) {
199 if (die("Exception in kernel mode", regs, signr))
201 } else if (show_unhandled_signals &&
202 unhandled_signal(current, signr) &&
203 printk_ratelimit()) {
204 printk(regs->msr & MSR_SF ? fmt64 : fmt32,
205 current->comm, current->pid, signr,
206 addr, regs->nip, regs->link, code);
209 memset(&info, 0, sizeof(info));
210 info.si_signo = signr;
212 info.si_addr = (void __user *) addr;
213 force_sig_info(signr, &info, current);
217 void system_reset_exception(struct pt_regs *regs)
219 /* See if any machine dependent calls */
220 if (ppc_md.system_reset_exception) {
221 if (ppc_md.system_reset_exception(regs))
226 cpu_set(smp_processor_id(), cpus_in_sr);
229 die("System Reset", regs, SIGABRT);
232 * Some CPUs when released from the debugger will execute this path.
233 * These CPUs entered the debugger via a soft-reset. If the CPU was
234 * hung before entering the debugger it will return to the hung
235 * state when exiting this function. This causes a problem in
236 * kdump since the hung CPU(s) will not respond to the IPI sent
237 * from kdump. To prevent the problem we call crash_kexec_secondary()
238 * here. If a kdump had not been initiated or we exit the debugger
239 * with the "exit and recover" command (x) crash_kexec_secondary()
240 * will return after 5ms and the CPU returns to its previous state.
242 crash_kexec_secondary(regs);
244 /* Must die if the interrupt is not recoverable */
245 if (!(regs->msr & MSR_RI))
246 panic("Unrecoverable System Reset");
248 /* What should we do here? We could issue a shutdown or hard reset. */
253 * I/O accesses can cause machine checks on powermacs.
254 * Check if the NIP corresponds to the address of a sync
255 * instruction for which there is an entry in the exception
257 * Note that the 601 only takes a machine check on TEA
258 * (transfer error ack) signal assertion, and does not
259 * set any of the top 16 bits of SRR1.
262 static inline int check_io_access(struct pt_regs *regs)
265 unsigned long msr = regs->msr;
266 const struct exception_table_entry *entry;
267 unsigned int *nip = (unsigned int *)regs->nip;
269 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
270 && (entry = search_exception_tables(regs->nip)) != NULL) {
272 * Check that it's a sync instruction, or somewhere
273 * in the twi; isync; nop sequence that inb/inw/inl uses.
274 * As the address is in the exception table
275 * we should be able to read the instr there.
276 * For the debug message, we look at the preceding
279 if (*nip == 0x60000000) /* nop */
281 else if (*nip == 0x4c00012c) /* isync */
283 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
288 rb = (*nip >> 11) & 0x1f;
289 printk(KERN_DEBUG "%s bad port %lx at %p\n",
290 (*nip & 0x100)? "OUT to": "IN from",
291 regs->gpr[rb] - _IO_BASE, nip);
293 regs->nip = entry->fixup;
297 #endif /* CONFIG_PPC32 */
301 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
302 /* On 4xx, the reason for the machine check or program exception
304 #define get_reason(regs) ((regs)->dsisr)
305 #ifndef CONFIG_FSL_BOOKE
306 #define get_mc_reason(regs) ((regs)->dsisr)
308 #define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK)
310 #define REASON_FP ESR_FP
311 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
312 #define REASON_PRIVILEGED ESR_PPR
313 #define REASON_TRAP ESR_PTR
315 /* single-step stuff */
316 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
317 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
320 /* On non-4xx, the reason for the machine check or program
321 exception is in the MSR. */
322 #define get_reason(regs) ((regs)->msr)
323 #define get_mc_reason(regs) ((regs)->msr)
324 #define REASON_FP 0x100000
325 #define REASON_ILLEGAL 0x80000
326 #define REASON_PRIVILEGED 0x40000
327 #define REASON_TRAP 0x20000
329 #define single_stepping(regs) ((regs)->msr & MSR_SE)
330 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
333 #if defined(CONFIG_4xx)
334 int machine_check_4xx(struct pt_regs *regs)
336 unsigned long reason = get_mc_reason(regs);
338 if (reason & ESR_IMCP) {
339 printk("Instruction");
340 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
343 printk(" machine check in kernel mode.\n");
348 int machine_check_440A(struct pt_regs *regs)
350 unsigned long reason = get_mc_reason(regs);
352 printk("Machine check in kernel mode.\n");
353 if (reason & ESR_IMCP){
354 printk("Instruction Synchronous Machine Check exception\n");
355 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
358 u32 mcsr = mfspr(SPRN_MCSR);
360 printk("Instruction Read PLB Error\n");
362 printk("Data Read PLB Error\n");
364 printk("Data Write PLB Error\n");
365 if (mcsr & MCSR_TLBP)
366 printk("TLB Parity Error\n");
367 if (mcsr & MCSR_ICP){
368 flush_instruction_cache();
369 printk("I-Cache Parity Error\n");
371 if (mcsr & MCSR_DCSP)
372 printk("D-Cache Search Parity Error\n");
373 if (mcsr & MCSR_DCFP)
374 printk("D-Cache Flush Parity Error\n");
375 if (mcsr & MCSR_IMPE)
376 printk("Machine Check exception is imprecise\n");
379 mtspr(SPRN_MCSR, mcsr);
383 #elif defined(CONFIG_E500)
384 int machine_check_e500(struct pt_regs *regs)
386 unsigned long reason = get_mc_reason(regs);
388 printk("Machine check in kernel mode.\n");
389 printk("Caused by (from MCSR=%lx): ", reason);
391 if (reason & MCSR_MCP)
392 printk("Machine Check Signal\n");
393 if (reason & MCSR_ICPERR)
394 printk("Instruction Cache Parity Error\n");
395 if (reason & MCSR_DCP_PERR)
396 printk("Data Cache Push Parity Error\n");
397 if (reason & MCSR_DCPERR)
398 printk("Data Cache Parity Error\n");
399 if (reason & MCSR_BUS_IAERR)
400 printk("Bus - Instruction Address Error\n");
401 if (reason & MCSR_BUS_RAERR)
402 printk("Bus - Read Address Error\n");
403 if (reason & MCSR_BUS_WAERR)
404 printk("Bus - Write Address Error\n");
405 if (reason & MCSR_BUS_IBERR)
406 printk("Bus - Instruction Data Error\n");
407 if (reason & MCSR_BUS_RBERR)
408 printk("Bus - Read Data Bus Error\n");
409 if (reason & MCSR_BUS_WBERR)
410 printk("Bus - Read Data Bus Error\n");
411 if (reason & MCSR_BUS_IPERR)
412 printk("Bus - Instruction Parity Error\n");
413 if (reason & MCSR_BUS_RPERR)
414 printk("Bus - Read Parity Error\n");
418 #elif defined(CONFIG_E200)
419 int machine_check_e200(struct pt_regs *regs)
421 unsigned long reason = get_mc_reason(regs);
423 printk("Machine check in kernel mode.\n");
424 printk("Caused by (from MCSR=%lx): ", reason);
426 if (reason & MCSR_MCP)
427 printk("Machine Check Signal\n");
428 if (reason & MCSR_CP_PERR)
429 printk("Cache Push Parity Error\n");
430 if (reason & MCSR_CPERR)
431 printk("Cache Parity Error\n");
432 if (reason & MCSR_EXCP_ERR)
433 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
434 if (reason & MCSR_BUS_IRERR)
435 printk("Bus - Read Bus Error on instruction fetch\n");
436 if (reason & MCSR_BUS_DRERR)
437 printk("Bus - Read Bus Error on data load\n");
438 if (reason & MCSR_BUS_WRERR)
439 printk("Bus - Write Bus Error on buffered store or cache line push\n");
444 int machine_check_generic(struct pt_regs *regs)
446 unsigned long reason = get_mc_reason(regs);
448 printk("Machine check in kernel mode.\n");
449 printk("Caused by (from SRR1=%lx): ", reason);
450 switch (reason & 0x601F0000) {
452 printk("Machine check signal\n");
454 case 0: /* for 601 */
456 case 0x140000: /* 7450 MSS error and TEA */
457 printk("Transfer error ack signal\n");
460 printk("Data parity error signal\n");
463 printk("Address parity error signal\n");
466 printk("L1 Data Cache error\n");
469 printk("L1 Instruction Cache error\n");
472 printk("L2 data cache parity error\n");
475 printk("Unknown values in msr\n");
479 #endif /* everything else */
481 void machine_check_exception(struct pt_regs *regs)
485 __get_cpu_var(irq_stat).mce_exceptions++;
487 /* See if any machine dependent calls. In theory, we would want
488 * to call the CPU first, and call the ppc_md. one if the CPU
489 * one returns a positive number. However there is existing code
490 * that assumes the board gets a first chance, so let's keep it
491 * that way for now and fix things later. --BenH.
493 if (ppc_md.machine_check_exception)
494 recover = ppc_md.machine_check_exception(regs);
495 else if (cur_cpu_spec->machine_check)
496 recover = cur_cpu_spec->machine_check(regs);
501 if (user_mode(regs)) {
503 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
507 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
508 /* the qspan pci read routines can cause machine checks -- Cort
510 * yuck !!! that totally needs to go away ! There are better ways
511 * to deal with that than having a wart in the mcheck handler.
514 bad_page_fault(regs, regs->dar, SIGBUS);
518 if (debugger_fault_handler(regs)) {
523 if (check_io_access(regs))
526 if (debugger_fault_handler(regs))
528 die("Machine check", regs, SIGBUS);
530 /* Must die if the interrupt is not recoverable */
531 if (!(regs->msr & MSR_RI))
532 panic("Unrecoverable Machine check");
535 void SMIException(struct pt_regs *regs)
537 die("System Management Interrupt", regs, SIGABRT);
540 void unknown_exception(struct pt_regs *regs)
542 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
543 regs->nip, regs->msr, regs->trap);
545 _exception(SIGTRAP, regs, 0, 0);
548 void instruction_breakpoint_exception(struct pt_regs *regs)
550 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
551 5, SIGTRAP) == NOTIFY_STOP)
553 if (debugger_iabr_match(regs))
555 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
558 void RunModeException(struct pt_regs *regs)
560 _exception(SIGTRAP, regs, 0, 0);
563 void __kprobes single_step_exception(struct pt_regs *regs)
565 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
567 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
568 5, SIGTRAP) == NOTIFY_STOP)
570 if (debugger_sstep(regs))
573 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
577 * After we have successfully emulated an instruction, we have to
578 * check if the instruction was being single-stepped, and if so,
579 * pretend we got a single-step exception. This was pointed out
580 * by Kumar Gala. -- paulus
582 static void emulate_single_step(struct pt_regs *regs)
584 if (single_stepping(regs)) {
585 clear_single_step(regs);
586 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
590 static inline int __parse_fpscr(unsigned long fpscr)
594 /* Invalid operation */
595 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
599 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
603 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
607 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
611 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
617 static void parse_fpe(struct pt_regs *regs)
621 flush_fp_to_thread(current);
623 code = __parse_fpscr(current->thread.fpscr.val);
625 _exception(SIGFPE, regs, code, regs->nip);
629 * Illegal instruction emulation support. Originally written to
630 * provide the PVR to user applications using the mfspr rd, PVR.
631 * Return non-zero if we can't emulate, or -EFAULT if the associated
632 * memory access caused an access fault. Return zero on success.
634 * There are a couple of ways to do this, either "decode" the instruction
635 * or directly match lots of bits. In this case, matching lots of
636 * bits is faster and easier.
639 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
641 u8 rT = (instword >> 21) & 0x1f;
642 u8 rA = (instword >> 16) & 0x1f;
643 u8 NB_RB = (instword >> 11) & 0x1f;
648 /* Early out if we are an invalid form of lswx */
649 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX)
650 if ((rT == rA) || (rT == NB_RB))
653 EA = (rA == 0) ? 0 : regs->gpr[rA];
655 switch (instword & PPC_INST_STRING_MASK) {
659 num_bytes = regs->xer & 0x7f;
663 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
669 while (num_bytes != 0)
672 u32 shift = 8 * (3 - (pos & 0x3));
674 switch ((instword & PPC_INST_STRING_MASK)) {
677 if (get_user(val, (u8 __user *)EA))
679 /* first time updating this reg,
683 regs->gpr[rT] |= val << shift;
687 val = regs->gpr[rT] >> shift;
688 if (put_user(val, (u8 __user *)EA))
692 /* move EA to next address */
696 /* manage our position within the register */
707 static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword)
712 ra = (instword >> 16) & 0x1f;
713 rs = (instword >> 21) & 0x1f;
716 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL);
717 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL);
718 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL;
724 static int emulate_isel(struct pt_regs *regs, u32 instword)
726 u8 rT = (instword >> 21) & 0x1f;
727 u8 rA = (instword >> 16) & 0x1f;
728 u8 rB = (instword >> 11) & 0x1f;
729 u8 BC = (instword >> 6) & 0x1f;
733 tmp = (rA == 0) ? 0 : regs->gpr[rA];
734 bit = (regs->ccr >> (31 - BC)) & 0x1;
736 regs->gpr[rT] = bit ? tmp : regs->gpr[rB];
741 static int emulate_instruction(struct pt_regs *regs)
746 if (!user_mode(regs) || (regs->msr & MSR_LE))
748 CHECK_FULL_REGS(regs);
750 if (get_user(instword, (u32 __user *)(regs->nip)))
753 /* Emulate the mfspr rD, PVR. */
754 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
755 PPC_WARN_EMULATED(mfpvr, regs);
756 rd = (instword >> 21) & 0x1f;
757 regs->gpr[rd] = mfspr(SPRN_PVR);
761 /* Emulating the dcba insn is just a no-op. */
762 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) {
763 PPC_WARN_EMULATED(dcba, regs);
767 /* Emulate the mcrxr insn. */
768 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
769 int shift = (instword >> 21) & 0x1c;
770 unsigned long msk = 0xf0000000UL >> shift;
772 PPC_WARN_EMULATED(mcrxr, regs);
773 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
774 regs->xer &= ~0xf0000000UL;
778 /* Emulate load/store string insn. */
779 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) {
780 PPC_WARN_EMULATED(string, regs);
781 return emulate_string_inst(regs, instword);
784 /* Emulate the popcntb (Population Count Bytes) instruction. */
785 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
786 PPC_WARN_EMULATED(popcntb, regs);
787 return emulate_popcntb_inst(regs, instword);
790 /* Emulate isel (Integer Select) instruction */
791 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
792 PPC_WARN_EMULATED(isel, regs);
793 return emulate_isel(regs, instword);
799 int is_valid_bugaddr(unsigned long addr)
801 return is_kernel_addr(addr);
804 void __kprobes program_check_exception(struct pt_regs *regs)
806 unsigned int reason = get_reason(regs);
807 extern int do_mathemu(struct pt_regs *regs);
809 /* We can now get here via a FP Unavailable exception if the core
810 * has no FPU, in that case the reason flags will be 0 */
812 if (reason & REASON_FP) {
813 /* IEEE FP exception */
817 if (reason & REASON_TRAP) {
818 /* Debugger is first in line to stop recursive faults in
819 * rcu_lock, notify_die, or atomic_notifier_call_chain */
820 if (debugger_bpt(regs))
824 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
828 if (!(regs->msr & MSR_PR) && /* not user-mode */
829 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
833 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
839 #ifdef CONFIG_MATH_EMULATION
840 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
841 * but there seems to be a hardware bug on the 405GP (RevD)
842 * that means ESR is sometimes set incorrectly - either to
843 * ESR_DST (!?) or 0. In the process of chasing this with the
844 * hardware people - not sure if it can happen on any illegal
845 * instruction or only on FP instructions, whether there is a
846 * pattern to occurences etc. -dgibson 31/Mar/2003 */
847 switch (do_mathemu(regs)) {
849 emulate_single_step(regs);
853 code = __parse_fpscr(current->thread.fpscr.val);
854 _exception(SIGFPE, regs, code, regs->nip);
858 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
861 /* fall through on any other errors */
862 #endif /* CONFIG_MATH_EMULATION */
864 /* Try to emulate it if we should. */
865 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
866 switch (emulate_instruction(regs)) {
869 emulate_single_step(regs);
872 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
877 if (reason & REASON_PRIVILEGED)
878 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
880 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
883 void alignment_exception(struct pt_regs *regs)
885 int sig, code, fixed = 0;
887 /* we don't implement logging of alignment exceptions */
888 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
889 fixed = fix_alignment(regs);
892 regs->nip += 4; /* skip over emulated instruction */
893 emulate_single_step(regs);
897 /* Operand address was bad */
898 if (fixed == -EFAULT) {
906 _exception(sig, regs, code, regs->dar);
908 bad_page_fault(regs, regs->dar, sig);
911 void StackOverflow(struct pt_regs *regs)
913 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
914 current, regs->gpr[1]);
917 panic("kernel stack overflow");
920 void nonrecoverable_exception(struct pt_regs *regs)
922 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
923 regs->nip, regs->msr);
925 die("nonrecoverable exception", regs, SIGKILL);
928 void trace_syscall(struct pt_regs *regs)
930 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
931 current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0],
932 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
935 void kernel_fp_unavailable_exception(struct pt_regs *regs)
937 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
938 "%lx at %lx\n", regs->trap, regs->nip);
939 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
942 void altivec_unavailable_exception(struct pt_regs *regs)
944 if (user_mode(regs)) {
945 /* A user program has executed an altivec instruction,
946 but this kernel doesn't support altivec. */
947 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
951 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
952 "%lx at %lx\n", regs->trap, regs->nip);
953 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
956 void vsx_unavailable_exception(struct pt_regs *regs)
958 if (user_mode(regs)) {
959 /* A user program has executed an vsx instruction,
960 but this kernel doesn't support vsx. */
961 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
965 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception "
966 "%lx at %lx\n", regs->trap, regs->nip);
967 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
970 void performance_monitor_exception(struct pt_regs *regs)
972 __get_cpu_var(irq_stat).pmu_irqs++;
978 void SoftwareEmulation(struct pt_regs *regs)
980 extern int do_mathemu(struct pt_regs *);
981 extern int Soft_emulate_8xx(struct pt_regs *);
982 #if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU)
986 CHECK_FULL_REGS(regs);
988 if (!user_mode(regs)) {
990 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
993 #ifdef CONFIG_MATH_EMULATION
994 errcode = do_mathemu(regs);
996 PPC_WARN_EMULATED(math, regs);
1000 emulate_single_step(regs);
1004 code = __parse_fpscr(current->thread.fpscr.val);
1005 _exception(SIGFPE, regs, code, regs->nip);
1009 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1012 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1016 #elif defined(CONFIG_8XX_MINIMAL_FPEMU)
1017 errcode = Soft_emulate_8xx(regs);
1019 PPC_WARN_EMULATED(8xx, regs);
1023 emulate_single_step(regs);
1026 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1029 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1033 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1036 #endif /* CONFIG_8xx */
1038 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1039 static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1043 * Determine the cause of the debug event, clear the
1044 * event flags and send a trap to the handler. Torez
1046 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1047 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1048 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1049 current->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1051 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT,
1054 } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) {
1055 dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1056 do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT,
1059 } else if (debug_status & DBSR_IAC1) {
1060 current->thread.dbcr0 &= ~DBCR0_IAC1;
1061 dbcr_iac_range(current) &= ~DBCR_IAC12MODE;
1062 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT,
1065 } else if (debug_status & DBSR_IAC2) {
1066 current->thread.dbcr0 &= ~DBCR0_IAC2;
1067 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT,
1070 } else if (debug_status & DBSR_IAC3) {
1071 current->thread.dbcr0 &= ~DBCR0_IAC3;
1072 dbcr_iac_range(current) &= ~DBCR_IAC34MODE;
1073 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT,
1076 } else if (debug_status & DBSR_IAC4) {
1077 current->thread.dbcr0 &= ~DBCR0_IAC4;
1078 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT,
1083 * At the point this routine was called, the MSR(DE) was turned off.
1084 * Check all other debug flags and see if that bit needs to be turned
1087 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1))
1088 regs->msr |= MSR_DE;
1090 /* Make sure the IDM flag is off */
1091 current->thread.dbcr0 &= ~DBCR0_IDM;
1094 mtspr(SPRN_DBCR0, current->thread.dbcr0);
1097 void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1099 current->thread.dbsr = debug_status;
1101 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while
1102 * on server, it stops on the target of the branch. In order to simulate
1103 * the server behaviour, we thus restart right away with a single step
1104 * instead of stopping here when hitting a BT
1106 if (debug_status & DBSR_BT) {
1107 regs->msr &= ~MSR_DE;
1110 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT);
1111 /* Clear the BT event */
1112 mtspr(SPRN_DBSR, DBSR_BT);
1114 /* Do the single step trick only when coming from userspace */
1115 if (user_mode(regs)) {
1116 current->thread.dbcr0 &= ~DBCR0_BT;
1117 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1118 regs->msr |= MSR_DE;
1122 if (notify_die(DIE_SSTEP, "block_step", regs, 5,
1123 5, SIGTRAP) == NOTIFY_STOP) {
1126 if (debugger_sstep(regs))
1128 } else if (debug_status & DBSR_IC) { /* Instruction complete */
1129 regs->msr &= ~MSR_DE;
1131 /* Disable instruction completion */
1132 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
1133 /* Clear the instruction completion event */
1134 mtspr(SPRN_DBSR, DBSR_IC);
1136 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
1137 5, SIGTRAP) == NOTIFY_STOP) {
1141 if (debugger_sstep(regs))
1144 if (user_mode(regs)) {
1145 current->thread.dbcr0 &= ~DBCR0_IC;
1146 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1147 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0,
1148 current->thread.dbcr1))
1149 regs->msr |= MSR_DE;
1151 /* Make sure the IDM bit is off */
1152 current->thread.dbcr0 &= ~DBCR0_IDM;
1156 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
1158 handle_debug(regs, debug_status);
1160 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1162 #if !defined(CONFIG_TAU_INT)
1163 void TAUException(struct pt_regs *regs)
1165 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
1166 regs->nip, regs->msr, regs->trap, print_tainted());
1168 #endif /* CONFIG_INT_TAU */
1170 #ifdef CONFIG_ALTIVEC
1171 void altivec_assist_exception(struct pt_regs *regs)
1175 if (!user_mode(regs)) {
1176 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
1177 " at %lx\n", regs->nip);
1178 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
1181 flush_altivec_to_thread(current);
1183 PPC_WARN_EMULATED(altivec, regs);
1184 err = emulate_altivec(regs);
1186 regs->nip += 4; /* skip emulated instruction */
1187 emulate_single_step(regs);
1191 if (err == -EFAULT) {
1192 /* got an error reading the instruction */
1193 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1195 /* didn't recognize the instruction */
1196 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1197 if (printk_ratelimit())
1198 printk(KERN_ERR "Unrecognized altivec instruction "
1199 "in %s at %lx\n", current->comm, regs->nip);
1200 current->thread.vscr.u[3] |= 0x10000;
1203 #endif /* CONFIG_ALTIVEC */
1206 void vsx_assist_exception(struct pt_regs *regs)
1208 if (!user_mode(regs)) {
1209 printk(KERN_EMERG "VSX assist exception in kernel mode"
1210 " at %lx\n", regs->nip);
1211 die("Kernel VSX assist exception", regs, SIGILL);
1214 flush_vsx_to_thread(current);
1215 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip);
1216 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1218 #endif /* CONFIG_VSX */
1220 #ifdef CONFIG_FSL_BOOKE
1222 void doorbell_exception(struct pt_regs *regs)
1225 int cpu = smp_processor_id();
1228 if (num_online_cpus() < 2)
1231 for (msg = 0; msg < 4; msg++)
1232 if (test_and_clear_bit(msg, &dbell_smp_message[cpu]))
1233 smp_message_recv(msg);
1235 printk(KERN_WARNING "Received doorbell on non-smp system\n");
1239 void CacheLockingException(struct pt_regs *regs, unsigned long address,
1240 unsigned long error_code)
1242 /* We treat cache locking instructions from the user
1243 * as priv ops, in the future we could try to do
1246 if (error_code & (ESR_DLK|ESR_ILK))
1247 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1250 #endif /* CONFIG_FSL_BOOKE */
1253 void SPEFloatingPointException(struct pt_regs *regs)
1255 extern int do_spe_mathemu(struct pt_regs *regs);
1256 unsigned long spefscr;
1262 if (regs->msr & MSR_SPE)
1263 giveup_spe(current);
1266 spefscr = current->thread.spefscr;
1267 fpexc_mode = current->thread.fpexc_mode;
1269 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1272 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1275 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1277 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1280 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1283 err = do_spe_mathemu(regs);
1285 regs->nip += 4; /* skip emulated instruction */
1286 emulate_single_step(regs);
1290 if (err == -EFAULT) {
1291 /* got an error reading the instruction */
1292 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1293 } else if (err == -EINVAL) {
1294 /* didn't recognize the instruction */
1295 printk(KERN_ERR "unrecognized spe instruction "
1296 "in %s at %lx\n", current->comm, regs->nip);
1298 _exception(SIGFPE, regs, code, regs->nip);
1304 void SPEFloatingPointRoundException(struct pt_regs *regs)
1306 extern int speround_handler(struct pt_regs *regs);
1310 if (regs->msr & MSR_SPE)
1311 giveup_spe(current);
1315 err = speround_handler(regs);
1317 regs->nip += 4; /* skip emulated instruction */
1318 emulate_single_step(regs);
1322 if (err == -EFAULT) {
1323 /* got an error reading the instruction */
1324 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1325 } else if (err == -EINVAL) {
1326 /* didn't recognize the instruction */
1327 printk(KERN_ERR "unrecognized spe instruction "
1328 "in %s at %lx\n", current->comm, regs->nip);
1330 _exception(SIGFPE, regs, 0, regs->nip);
1337 * We enter here if we get an unrecoverable exception, that is, one
1338 * that happened at a point where the RI (recoverable interrupt) bit
1339 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1340 * we therefore lost state by taking this exception.
1342 void unrecoverable_exception(struct pt_regs *regs)
1344 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1345 regs->trap, regs->nip);
1346 die("Unrecoverable exception", regs, SIGABRT);
1349 #ifdef CONFIG_BOOKE_WDT
1351 * Default handler for a Watchdog exception,
1352 * spins until a reboot occurs
1354 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1356 /* Generic WatchdogHandler, implement your own */
1357 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1361 void WatchdogException(struct pt_regs *regs)
1363 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1364 WatchdogHandler(regs);
1369 * We enter here if we discover during exception entry that we are
1370 * running in supervisor mode with a userspace value in the stack pointer.
1372 void kernel_bad_stack(struct pt_regs *regs)
1374 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1375 regs->gpr[1], regs->nip);
1376 die("Bad kernel stack pointer", regs, SIGABRT);
1379 void __init trap_init(void)
1384 #ifdef CONFIG_PPC_EMULATED_STATS
1386 #define WARN_EMULATED_SETUP(type) .type = { .name = #type }
1388 struct ppc_emulated ppc_emulated = {
1389 #ifdef CONFIG_ALTIVEC
1390 WARN_EMULATED_SETUP(altivec),
1392 WARN_EMULATED_SETUP(dcba),
1393 WARN_EMULATED_SETUP(dcbz),
1394 WARN_EMULATED_SETUP(fp_pair),
1395 WARN_EMULATED_SETUP(isel),
1396 WARN_EMULATED_SETUP(mcrxr),
1397 WARN_EMULATED_SETUP(mfpvr),
1398 WARN_EMULATED_SETUP(multiple),
1399 WARN_EMULATED_SETUP(popcntb),
1400 WARN_EMULATED_SETUP(spe),
1401 WARN_EMULATED_SETUP(string),
1402 WARN_EMULATED_SETUP(unaligned),
1403 #ifdef CONFIG_MATH_EMULATION
1404 WARN_EMULATED_SETUP(math),
1405 #elif defined(CONFIG_8XX_MINIMAL_FPEMU)
1406 WARN_EMULATED_SETUP(8xx),
1409 WARN_EMULATED_SETUP(vsx),
1413 u32 ppc_warn_emulated;
1415 void ppc_warn_emulated_print(const char *type)
1417 if (printk_ratelimit())
1418 pr_warning("%s used emulated %s instruction\n", current->comm,
1422 static int __init ppc_warn_emulated_init(void)
1424 struct dentry *dir, *d;
1426 struct ppc_emulated_entry *entries = (void *)&ppc_emulated;
1428 if (!powerpc_debugfs_root)
1431 dir = debugfs_create_dir("emulated_instructions",
1432 powerpc_debugfs_root);
1436 d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir,
1437 &ppc_warn_emulated);
1441 for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) {
1442 d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir,
1443 (u32 *)&entries[i].val.counter);
1451 debugfs_remove_recursive(dir);
1455 device_initcall(ppc_warn_emulated_init);
1457 #endif /* CONFIG_PPC_EMULATED_STATS */