arch/powerpc/kernel/ptrace.c

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Derived from "arch/m68k/kernel/ptrace.c"
   6  *  Copyright (C) 1994 by Hamish Macdonald
   7  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
   8  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
   9  *
  10  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
  11  * and Paul Mackerras (paulus@samba.org).
  12  *
  13  * This file is subject to the terms and conditions of the GNU General
  14  * Public License.  See the file README.legal in the main directory of
  15  * this archive for more details.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/sched.h>
  20 #include <linux/mm.h>
  21 #include <linux/smp.h>
  22 #include <linux/errno.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/regset.h>
  25 #include <linux/tracehook.h>
  26 #include <linux/elf.h>
  27 #include <linux/user.h>
  28 #include <linux/security.h>
  29 #include <linux/signal.h>
  30 #include <linux/seccomp.h>
  31 #include <linux/audit.h>
  32 #include <trace/syscall.h>
  33 #include <linux/hw_breakpoint.h>
  34 #include <linux/perf_event.h>
  35
  36 #include <asm/uaccess.h>
  37 #include <asm/page.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/system.h>
  40
  41 #define CREATE_TRACE_POINTS
  42 #include <trace/events/syscalls.h>
  43
  44 /*
  45  * The parameter save area on the stack is used to store arguments being passed
  46  * to callee function and is located at fixed offset from stack pointer.
  47  */
  48 #ifdef CONFIG_PPC32
  49 #define PARAMETER_SAVE_AREA_OFFSET      24  /* bytes */
  50 #else /* CONFIG_PPC32 */
  51 #define PARAMETER_SAVE_AREA_OFFSET      48  /* bytes */
  52 #endif
  53
  54 struct pt_regs_offset {
  55         const char *name;
  56         int offset;
  57 };
  58
  59 #define STR(s)  #s                      /* convert to string */
  60 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  61 #define GPR_OFFSET_NAME(num)    \
  62         {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
  63 #define REG_OFFSET_END {.name = NULL, .offset = 0}
  64
  65 static const struct pt_regs_offset regoffset_table[] = {
  66         GPR_OFFSET_NAME(0),
  67         GPR_OFFSET_NAME(1),
  68         GPR_OFFSET_NAME(2),
  69         GPR_OFFSET_NAME(3),
  70         GPR_OFFSET_NAME(4),
  71         GPR_OFFSET_NAME(5),
  72         GPR_OFFSET_NAME(6),
  73         GPR_OFFSET_NAME(7),
  74         GPR_OFFSET_NAME(8),
  75         GPR_OFFSET_NAME(9),
  76         GPR_OFFSET_NAME(10),
  77         GPR_OFFSET_NAME(11),
  78         GPR_OFFSET_NAME(12),
  79         GPR_OFFSET_NAME(13),
  80         GPR_OFFSET_NAME(14),
  81         GPR_OFFSET_NAME(15),
  82         GPR_OFFSET_NAME(16),
  83         GPR_OFFSET_NAME(17),
  84         GPR_OFFSET_NAME(18),
  85         GPR_OFFSET_NAME(19),
  86         GPR_OFFSET_NAME(20),
  87         GPR_OFFSET_NAME(21),
  88         GPR_OFFSET_NAME(22),
  89         GPR_OFFSET_NAME(23),
  90         GPR_OFFSET_NAME(24),
  91         GPR_OFFSET_NAME(25),
  92         GPR_OFFSET_NAME(26),
  93         GPR_OFFSET_NAME(27),
  94         GPR_OFFSET_NAME(28),
  95         GPR_OFFSET_NAME(29),
  96         GPR_OFFSET_NAME(30),
  97         GPR_OFFSET_NAME(31),
  98         REG_OFFSET_NAME(nip),
  99         REG_OFFSET_NAME(msr),
 100         REG_OFFSET_NAME(ctr),
 101         REG_OFFSET_NAME(link),
 102         REG_OFFSET_NAME(xer),
 103         REG_OFFSET_NAME(ccr),
 104 #ifdef CONFIG_PPC64
 105         REG_OFFSET_NAME(softe),
 106 #else
 107         REG_OFFSET_NAME(mq),
 108 #endif
 109         REG_OFFSET_NAME(trap),
 110         REG_OFFSET_NAME(dar),
 111         REG_OFFSET_NAME(dsisr),
 112         REG_OFFSET_END,
 113 };
 114
 115 /**
 116  * regs_query_register_offset() - query register offset from its name
 117  * @name:       the name of a register
 118  *
 119  * regs_query_register_offset() returns the offset of a register in struct
 120  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 121  */
 122 int regs_query_register_offset(const char *name)
 123 {
 124         const struct pt_regs_offset *roff;
 125         for (roff = regoffset_table; roff->name != NULL; roff++)
 126                 if (!strcmp(roff->name, name))
 127                         return roff->offset;
 128         return -EINVAL;
 129 }
 130
 131 /**
 132  * regs_query_register_name() - query register name from its offset
 133  * @offset:     the offset of a register in struct pt_regs.
 134  *
 135  * regs_query_register_name() returns the name of a register from its
 136  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
 137  */
 138 const char *regs_query_register_name(unsigned int offset)
 139 {
 140         const struct pt_regs_offset *roff;
 141         for (roff = regoffset_table; roff->name != NULL; roff++)
 142                 if (roff->offset == offset)
 143                         return roff->name;
 144         return NULL;
 145 }
 146
 147 /*
 148  * does not yet catch signals sent when the child dies.
 149  * in exit.c or in signal.c.
 150  */
 151
 152 /*
 153  * Set of msr bits that gdb can change on behalf of a process.
 154  */
 155 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 156 #define MSR_DEBUGCHANGE 0
 157 #else
 158 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
 159 #endif
 160
 161 /*
 162  * Max register writeable via put_reg
 163  */
 164 #ifdef CONFIG_PPC32
 165 #define PT_MAX_PUT_REG  PT_MQ
 166 #else
 167 #define PT_MAX_PUT_REG  PT_CCR
 168 #endif
 169
 170 static unsigned long get_user_msr(struct task_struct *task)
 171 {
 172         return task->thread.regs->msr | task->thread.fpexc_mode;
 173 }
 174
 175 static int set_user_msr(struct task_struct *task, unsigned long msr)
 176 {
 177         task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
 178         task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
 179         return 0;
 180 }
 181
 182 /*
 183  * We prevent mucking around with the reserved area of trap
 184  * which are used internally by the kernel.
 185  */
 186 static int set_user_trap(struct task_struct *task, unsigned long trap)
 187 {
 188         task->thread.regs->trap = trap & 0xfff0;
 189         return 0;
 190 }
 191
 192 /*
 193  * Get contents of register REGNO in task TASK.
 194  */
 195 unsigned long ptrace_get_reg(struct task_struct *task, int regno)
 196 {
 197         if (task->thread.regs == NULL)
 198                 return -EIO;
 199
 200         if (regno == PT_MSR)
 201                 return get_user_msr(task);
 202
 203         if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
 204                 return ((unsigned long *)task->thread.regs)[regno];
 205
 206         return -EIO;
 207 }
 208
 209 /*
 210  * Write contents of register REGNO in task TASK.
 211  */
 212 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
 213 {
 214         if (task->thread.regs == NULL)
 215                 return -EIO;
 216
 217         if (regno == PT_MSR)
 218                 return set_user_msr(task, data);
 219         if (regno == PT_TRAP)
 220                 return set_user_trap(task, data);
 221
 222         if (regno <= PT_MAX_PUT_REG) {
 223                 ((unsigned long *)task->thread.regs)[regno] = data;
 224                 return 0;
 225         }
 226         return -EIO;
 227 }
 228
 229 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
 230                    unsigned int pos, unsigned int count,
 231                    void *kbuf, void __user *ubuf)
 232 {
 233         int i, ret;
 234
 235         if (target->thread.regs == NULL)
 236                 return -EIO;
 237
 238         if (!FULL_REGS(target->thread.regs)) {
 239                 /* We have a partial register set.  Fill 14-31 with bogus values */
 240                 for (i = 14; i < 32; i++)
 241                         target->thread.regs->gpr[i] = NV_REG_POISON;
 242         }
 243
 244         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 245                                   target->thread.regs,
 246                                   0, offsetof(struct pt_regs, msr));
 247         if (!ret) {
 248                 unsigned long msr = get_user_msr(target);
 249                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
 250                                           offsetof(struct pt_regs, msr),
 251                                           offsetof(struct pt_regs, msr) +
 252                                           sizeof(msr));
 253         }
 254
 255         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 256                      offsetof(struct pt_regs, msr) + sizeof(long));
 257
 258         if (!ret)
 259                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 260                                           &target->thread.regs->orig_gpr3,
 261                                           offsetof(struct pt_regs, orig_gpr3),
 262                                           sizeof(struct pt_regs));
 263         if (!ret)
 264                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 265                                                sizeof(struct pt_regs), -1);
 266
 267         return ret;
 268 }
 269
 270 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
 271                    unsigned int pos, unsigned int count,
 272                    const void *kbuf, const void __user *ubuf)
 273 {
 274         unsigned long reg;
 275         int ret;
 276
 277         if (target->thread.regs == NULL)
 278                 return -EIO;
 279
 280         CHECK_FULL_REGS(target->thread.regs);
 281
 282         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 283                                  target->thread.regs,
 284                                  0, PT_MSR * sizeof(reg));
 285
 286         if (!ret && count > 0) {
 287                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 288                                          PT_MSR * sizeof(reg),
 289                                          (PT_MSR + 1) * sizeof(reg));
 290                 if (!ret)
 291                         ret = set_user_msr(target, reg);
 292         }
 293
 294         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 295                      offsetof(struct pt_regs, msr) + sizeof(long));
 296
 297         if (!ret)
 298                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 299                                          &target->thread.regs->orig_gpr3,
 300                                          PT_ORIG_R3 * sizeof(reg),
 301                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
 302
 303         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
 304                 ret = user_regset_copyin_ignore(
 305                         &pos, &count, &kbuf, &ubuf,
 306                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
 307                         PT_TRAP * sizeof(reg));
 308
 309         if (!ret && count > 0) {
 310                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 311                                          PT_TRAP * sizeof(reg),
 312                                          (PT_TRAP + 1) * sizeof(reg));
 313                 if (!ret)
 314                         ret = set_user_trap(target, reg);
 315         }
 316
 317         if (!ret)
 318                 ret = user_regset_copyin_ignore(
 319                         &pos, &count, &kbuf, &ubuf,
 320                         (PT_TRAP + 1) * sizeof(reg), -1);
 321
 322         return ret;
 323 }
 324
 325 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
 326                    unsigned int pos, unsigned int count,
 327                    void *kbuf, void __user *ubuf)
 328 {
 329 #ifdef CONFIG_VSX
 330         double buf[33];
 331         int i;
 332 #endif
 333         flush_fp_to_thread(target);
 334
 335 #ifdef CONFIG_VSX
 336         /* copy to local buffer then write that out */
 337         for (i = 0; i < 32 ; i++)
 338                 buf[i] = target->thread.TS_FPR(i);
 339         memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
 340         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 341
 342 #else
 343         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 344                      offsetof(struct thread_struct, TS_FPR(32)));
 345
 346         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 347                                    &target->thread.fpr, 0, -1);
 348 #endif
 349 }
 350
 351 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
 352                    unsigned int pos, unsigned int count,
 353                    const void *kbuf, const void __user *ubuf)
 354 {
 355 #ifdef CONFIG_VSX
 356         double buf[33];
 357         int i;
 358 #endif
 359         flush_fp_to_thread(target);
 360
 361 #ifdef CONFIG_VSX
 362         for (i = 0; i < 32 ; i++)
 363                 buf[i] = target->thread.TS_FPR(i);
 364         memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
 365
 366         /* copy to local buffer then write that out */
 367         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 368         if (i)
 369                 return i;
 370         for (i = 0; i < 32 ; i++)
 371                 target->thread.TS_FPR(i) = buf[i];
 372         memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
 373         return 0;
 374 #else
 375         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 376                      offsetof(struct thread_struct, TS_FPR(32)));
 377
 378         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 379                                   &target->thread.fpr, 0, -1);
 380 #endif
 381 }
 382
 383 #ifdef CONFIG_ALTIVEC
 384 /*
 385  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 386  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 387  * corresponding vector registers.  Quadword 32 contains the vscr as the
 388  * last word (offset 12) within that quadword.  Quadword 33 contains the
 389  * vrsave as the first word (offset 0) within the quadword.
 390  *
 391  * This definition of the VMX state is compatible with the current PPC32
 392  * ptrace interface.  This allows signal handling and ptrace to use the
 393  * same structures.  This also simplifies the implementation of a bi-arch
 394  * (combined (32- and 64-bit) gdb.
 395  */
 396
 397 static int vr_active(struct task_struct *target,
 398                      const struct user_regset *regset)
 399 {
 400         flush_altivec_to_thread(target);
 401         return target->thread.used_vr ? regset->n : 0;
 402 }
 403
 404 static int vr_get(struct task_struct *target, const struct user_regset *regset,
 405                   unsigned int pos, unsigned int count,
 406                   void *kbuf, void __user *ubuf)
 407 {
 408         int ret;
 409
 410         flush_altivec_to_thread(target);
 411
 412         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 413                      offsetof(struct thread_struct, vr[32]));
 414
 415         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 416                                   &target->thread.vr, 0,
 417                                   33 * sizeof(vector128));
 418         if (!ret) {
 419                 /*
 420                  * Copy out only the low-order word of vrsave.
 421                  */
 422                 union {
 423                         elf_vrreg_t reg;
 424                         u32 word;
 425                 } vrsave;
 426                 memset(&vrsave, 0, sizeof(vrsave));
 427                 vrsave.word = target->thread.vrsave;
 428                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
 429                                           33 * sizeof(vector128), -1);
 430         }
 431
 432         return ret;
 433 }
 434
 435 static int vr_set(struct task_struct *target, const struct user_regset *regset,
 436                   unsigned int pos, unsigned int count,
 437                   const void *kbuf, const void __user *ubuf)
 438 {
 439         int ret;
 440
 441         flush_altivec_to_thread(target);
 442
 443         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 444                      offsetof(struct thread_struct, vr[32]));
 445
 446         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 447                                  &target->thread.vr, 0, 33 * sizeof(vector128));
 448         if (!ret && count > 0) {
 449                 /*
 450                  * We use only the first word of vrsave.
 451                  */
 452                 union {
 453                         elf_vrreg_t reg;
 454                         u32 word;
 455                 } vrsave;
 456                 memset(&vrsave, 0, sizeof(vrsave));
 457                 vrsave.word = target->thread.vrsave;
 458                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
 459                                          33 * sizeof(vector128), -1);
 460                 if (!ret)
 461                         target->thread.vrsave = vrsave.word;
 462         }
 463
 464         return ret;
 465 }
 466 #endif /* CONFIG_ALTIVEC */
 467
 468 #ifdef CONFIG_VSX
 469 /*
 470  * Currently to set and and get all the vsx state, you need to call
 471  * the fp and VMX calls as well.  This only get/sets the lower 32
 472  * 128bit VSX registers.
 473  */
 474
 475 static int vsr_active(struct task_struct *target,
 476                       const struct user_regset *regset)
 477 {
 478         flush_vsx_to_thread(target);
 479         return target->thread.used_vsr ? regset->n : 0;
 480 }
 481
 482 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
 483                    unsigned int pos, unsigned int count,
 484                    void *kbuf, void __user *ubuf)
 485 {
 486         double buf[32];
 487         int ret, i;
 488
 489         flush_vsx_to_thread(target);
 490
 491         for (i = 0; i < 32 ; i++)
 492                 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
 493         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 494                                   buf, 0, 32 * sizeof(double));
 495
 496         return ret;
 497 }
 498
 499 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
 500                    unsigned int pos, unsigned int count,
 501                    const void *kbuf, const void __user *ubuf)
 502 {
 503         double buf[32];
 504         int ret,i;
 505
 506         flush_vsx_to_thread(target);
 507
 508         for (i = 0; i < 32 ; i++)
 509                 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
 510
 511         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 512                                  buf, 0, 32 * sizeof(double));
 513         for (i = 0; i < 32 ; i++)
 514                 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
 515
 516
 517         return ret;
 518 }
 519 #endif /* CONFIG_VSX */
 520
 521 #ifdef CONFIG_SPE
 522
 523 /*
 524  * For get_evrregs/set_evrregs functions 'data' has the following layout:
 525  *
 526  * struct {
 527  *   u32 evr[32];
 528  *   u64 acc;
 529  *   u32 spefscr;
 530  * }
 531  */
 532
 533 static int evr_active(struct task_struct *target,
 534                       const struct user_regset *regset)
 535 {
 536         flush_spe_to_thread(target);
 537         return target->thread.used_spe ? regset->n : 0;
 538 }
 539
 540 static int evr_get(struct task_struct *target, const struct user_regset *regset,
 541                    unsigned int pos, unsigned int count,
 542                    void *kbuf, void __user *ubuf)
 543 {
 544         int ret;
 545
 546         flush_spe_to_thread(target);
 547
 548         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 549                                   &target->thread.evr,
 550                                   0, sizeof(target->thread.evr));
 551
 552         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 553                      offsetof(struct thread_struct, spefscr));
 554
 555         if (!ret)
 556                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 557                                           &target->thread.acc,
 558                                           sizeof(target->thread.evr), -1);
 559
 560         return ret;
 561 }
 562
 563 static int evr_set(struct task_struct *target, const struct user_regset *regset,
 564                    unsigned int pos, unsigned int count,
 565                    const void *kbuf, const void __user *ubuf)
 566 {
 567         int ret;
 568
 569         flush_spe_to_thread(target);
 570
 571         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 572                                  &target->thread.evr,
 573                                  0, sizeof(target->thread.evr));
 574
 575         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 576                      offsetof(struct thread_struct, spefscr));
 577
 578         if (!ret)
 579                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 580                                          &target->thread.acc,
 581                                          sizeof(target->thread.evr), -1);
 582
 583         return ret;
 584 }
 585 #endif /* CONFIG_SPE */
 586
 587
 588 /*
 589  * These are our native regset flavors.
 590  */
 591 enum powerpc_regset {
 592         REGSET_GPR,
 593         REGSET_FPR,
 594 #ifdef CONFIG_ALTIVEC
 595         REGSET_VMX,
 596 #endif
 597 #ifdef CONFIG_VSX
 598         REGSET_VSX,
 599 #endif
 600 #ifdef CONFIG_SPE
 601         REGSET_SPE,
 602 #endif
 603 };
 604
 605 static const struct user_regset native_regsets[] = {
 606         [REGSET_GPR] = {
 607                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 608                 .size = sizeof(long), .align = sizeof(long),
 609                 .get = gpr_get, .set = gpr_set
 610         },
 611         [REGSET_FPR] = {
 612                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 613                 .size = sizeof(double), .align = sizeof(double),
 614                 .get = fpr_get, .set = fpr_set
 615         },
 616 #ifdef CONFIG_ALTIVEC
 617         [REGSET_VMX] = {
 618                 .core_note_type = NT_PPC_VMX, .n = 34,
 619                 .size = sizeof(vector128), .align = sizeof(vector128),
 620                 .active = vr_active, .get = vr_get, .set = vr_set
 621         },
 622 #endif
 623 #ifdef CONFIG_VSX
 624         [REGSET_VSX] = {
 625                 .core_note_type = NT_PPC_VSX, .n = 32,
 626                 .size = sizeof(double), .align = sizeof(double),
 627                 .active = vsr_active, .get = vsr_get, .set = vsr_set
 628         },
 629 #endif
 630 #ifdef CONFIG_SPE
 631         [REGSET_SPE] = {
 632                 .n = 35,
 633                 .size = sizeof(u32), .align = sizeof(u32),
 634                 .active = evr_active, .get = evr_get, .set = evr_set
 635         },
 636 #endif
 637 };
 638
 639 static const struct user_regset_view user_ppc_native_view = {
 640         .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
 641         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
 642 };
 643
 644 #ifdef CONFIG_PPC64
 645 #include <linux/compat.h>
 646
 647 static int gpr32_get(struct task_struct *target,
 648                      const struct user_regset *regset,
 649                      unsigned int pos, unsigned int count,
 650                      void *kbuf, void __user *ubuf)
 651 {
 652         const unsigned long *regs = &target->thread.regs->gpr[0];
 653         compat_ulong_t *k = kbuf;
 654         compat_ulong_t __user *u = ubuf;
 655         compat_ulong_t reg;
 656         int i;
 657
 658         if (target->thread.regs == NULL)
 659                 return -EIO;
 660
 661         if (!FULL_REGS(target->thread.regs)) {
 662                 /* We have a partial register set.  Fill 14-31 with bogus values */
 663                 for (i = 14; i < 32; i++)
 664                         target->thread.regs->gpr[i] = NV_REG_POISON;
 665         }
 666
 667         pos /= sizeof(reg);
 668         count /= sizeof(reg);
 669
 670         if (kbuf)
 671                 for (; count > 0 && pos < PT_MSR; --count)
 672                         *k++ = regs[pos++];
 673         else
 674                 for (; count > 0 && pos < PT_MSR; --count)
 675                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 676                                 return -EFAULT;
 677
 678         if (count > 0 && pos == PT_MSR) {
 679                 reg = get_user_msr(target);
 680                 if (kbuf)
 681                         *k++ = reg;
 682                 else if (__put_user(reg, u++))
 683                         return -EFAULT;
 684                 ++pos;
 685                 --count;
 686         }
 687
 688         if (kbuf)
 689                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 690                         *k++ = regs[pos++];
 691         else
 692                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 693                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 694                                 return -EFAULT;
 695
 696         kbuf = k;
 697         ubuf = u;
 698         pos *= sizeof(reg);
 699         count *= sizeof(reg);
 700         return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 701                                         PT_REGS_COUNT * sizeof(reg), -1);
 702 }
 703
 704 static int gpr32_set(struct task_struct *target,
 705                      const struct user_regset *regset,
 706                      unsigned int pos, unsigned int count,
 707                      const void *kbuf, const void __user *ubuf)
 708 {
 709         unsigned long *regs = &target->thread.regs->gpr[0];
 710         const compat_ulong_t *k = kbuf;
 711         const compat_ulong_t __user *u = ubuf;
 712         compat_ulong_t reg;
 713
 714         if (target->thread.regs == NULL)
 715                 return -EIO;
 716
 717         CHECK_FULL_REGS(target->thread.regs);
 718
 719         pos /= sizeof(reg);
 720         count /= sizeof(reg);
 721
 722         if (kbuf)
 723                 for (; count > 0 && pos < PT_MSR; --count)
 724                         regs[pos++] = *k++;
 725         else
 726                 for (; count > 0 && pos < PT_MSR; --count) {
 727                         if (__get_user(reg, u++))
 728                                 return -EFAULT;
 729                         regs[pos++] = reg;
 730                 }
 731
 732
 733         if (count > 0 && pos == PT_MSR) {
 734                 if (kbuf)
 735                         reg = *k++;
 736                 else if (__get_user(reg, u++))
 737                         return -EFAULT;
 738                 set_user_msr(target, reg);
 739                 ++pos;
 740                 --count;
 741         }
 742
 743         if (kbuf) {
 744                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
 745                         regs[pos++] = *k++;
 746                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 747                         ++k;
 748         } else {
 749                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
 750                         if (__get_user(reg, u++))
 751                                 return -EFAULT;
 752                         regs[pos++] = reg;
 753                 }
 754                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 755                         if (__get_user(reg, u++))
 756                                 return -EFAULT;
 757         }
 758
 759         if (count > 0 && pos == PT_TRAP) {
 760                 if (kbuf)
 761                         reg = *k++;
 762                 else if (__get_user(reg, u++))
 763                         return -EFAULT;
 764                 set_user_trap(target, reg);
 765                 ++pos;
 766                 --count;
 767         }
 768
 769         kbuf = k;
 770         ubuf = u;
 771         pos *= sizeof(reg);
 772         count *= sizeof(reg);
 773         return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 774                                          (PT_TRAP + 1) * sizeof(reg), -1);
 775 }
 776
 777 /*
 778  * These are the regset flavors matching the CONFIG_PPC32 native set.
 779  */
 780 static const struct user_regset compat_regsets[] = {
 781         [REGSET_GPR] = {
 782                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 783                 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
 784                 .get = gpr32_get, .set = gpr32_set
 785         },
 786         [REGSET_FPR] = {
 787                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 788                 .size = sizeof(double), .align = sizeof(double),
 789                 .get = fpr_get, .set = fpr_set
 790         },
 791 #ifdef CONFIG_ALTIVEC
 792         [REGSET_VMX] = {
 793                 .core_note_type = NT_PPC_VMX, .n = 34,
 794                 .size = sizeof(vector128), .align = sizeof(vector128),
 795                 .active = vr_active, .get = vr_get, .set = vr_set
 796         },
 797 #endif
 798 #ifdef CONFIG_SPE
 799         [REGSET_SPE] = {
 800                 .core_note_type = NT_PPC_SPE, .n = 35,
 801                 .size = sizeof(u32), .align = sizeof(u32),
 802                 .active = evr_active, .get = evr_get, .set = evr_set
 803         },
 804 #endif
 805 };
 806
 807 static const struct user_regset_view user_ppc_compat_view = {
 808         .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
 809         .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
 810 };
 811 #endif  /* CONFIG_PPC64 */
 812
 813 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 814 {
 815 #ifdef CONFIG_PPC64
 816         if (test_tsk_thread_flag(task, TIF_32BIT))
 817                 return &user_ppc_compat_view;
 818 #endif
 819         return &user_ppc_native_view;
 820 }
 821
 822
 823 void user_enable_single_step(struct task_struct *task)
 824 {
 825         struct pt_regs *regs = task->thread.regs;
 826
 827         if (regs != NULL) {
 828 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 829                 task->thread.dbcr0 &= ~DBCR0_BT;
 830                 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
 831                 regs->msr |= MSR_DE;
 832 #else
 833                 regs->msr &= ~MSR_BE;
 834                 regs->msr |= MSR_SE;
 835 #endif
 836         }
 837         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 838 }
 839
 840 void user_enable_block_step(struct task_struct *task)
 841 {
 842         struct pt_regs *regs = task->thread.regs;
 843
 844         if (regs != NULL) {
 845 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 846                 task->thread.dbcr0 &= ~DBCR0_IC;
 847                 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
 848                 regs->msr |= MSR_DE;
 849 #else
 850                 regs->msr &= ~MSR_SE;
 851                 regs->msr |= MSR_BE;
 852 #endif
 853         }
 854         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 855 }
 856
 857 void user_disable_single_step(struct task_struct *task)
 858 {
 859         struct pt_regs *regs = task->thread.regs;
 860
 861         if (regs != NULL) {
 862 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 863                 /*
 864                  * The logic to disable single stepping should be as
 865                  * simple as turning off the Instruction Complete flag.
 866                  * And, after doing so, if all debug flags are off, turn
 867                  * off DBCR0(IDM) and MSR(DE) .... Torez
 868                  */
 869                 task->thread.dbcr0 &= ~DBCR0_IC;
 870                 /*
 871                  * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
 872                  */
 873                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
 874                                         task->thread.dbcr1)) {
 875                         /*
 876                          * All debug events were off.....
 877                          */
 878                         task->thread.dbcr0 &= ~DBCR0_IDM;
 879                         regs->msr &= ~MSR_DE;
 880                 }
 881 #else
 882                 regs->msr &= ~(MSR_SE | MSR_BE);
 883 #endif
 884         }
 885         clear_tsk_thread_flag(task, TIF_SINGLESTEP);
 886 }
 887
 888 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 889 void ptrace_triggered(struct perf_event *bp,
 890                       struct perf_sample_data *data, struct pt_regs *regs)
 891 {
 892         struct perf_event_attr attr;
 893
 894         /*
 895          * Disable the breakpoint request here since ptrace has defined a
 896          * one-shot behaviour for breakpoint exceptions in PPC64.
 897          * The SIGTRAP signal is generated automatically for us in do_dabr().
 898          * We don't have to do anything about that here
 899          */
 900         attr = bp->attr;
 901         attr.disabled = true;
 902         modify_user_hw_breakpoint(bp, &attr);
 903 }
 904 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 905
 906 int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
 907                                unsigned long data)
 908 {
 909 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 910         int ret;
 911         struct thread_struct *thread = &(task->thread);
 912         struct perf_event *bp;
 913         struct perf_event_attr attr;
 914 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 915
 916         /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
 917          *  For embedded processors we support one DAC and no IAC's at the
 918          *  moment.
 919          */
 920         if (addr > 0)
 921                 return -EINVAL;
 922
 923         /* The bottom 3 bits in dabr are flags */
 924         if ((data & ~0x7UL) >= TASK_SIZE)
 925                 return -EIO;
 926
 927 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
 928         /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
 929          *  It was assumed, on previous implementations, that 3 bits were
 930          *  passed together with the data address, fitting the design of the
 931          *  DABR register, as follows:
 932          *
 933          *  bit 0: Read flag
 934          *  bit 1: Write flag
 935          *  bit 2: Breakpoint translation
 936          *
 937          *  Thus, we use them here as so.
 938          */
 939
 940         /* Ensure breakpoint translation bit is set */
 941         if (data && !(data & DABR_TRANSLATION))
 942                 return -EIO;
 943 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 944         if (ptrace_get_breakpoints(task) < 0)
 945                 return -ESRCH;
 946
 947         bp = thread->ptrace_bps[0];
 948         if ((!data) || !(data & (DABR_DATA_WRITE | DABR_DATA_READ))) {
 949                 if (bp) {
 950                         unregister_hw_breakpoint(bp);
 951                         thread->ptrace_bps[0] = NULL;
 952                 }
 953                 ptrace_put_breakpoints(task);
 954                 return 0;
 955         }
 956         if (bp) {
 957                 attr = bp->attr;
 958                 attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
 959                 arch_bp_generic_fields(data &
 960                                         (DABR_DATA_WRITE | DABR_DATA_READ),
 961                                                         &attr.bp_type);
 962                 ret =  modify_user_hw_breakpoint(bp, &attr);
 963                 if (ret) {
 964                         ptrace_put_breakpoints(task);
 965                         return ret;
 966                 }
 967                 thread->ptrace_bps[0] = bp;
 968                 ptrace_put_breakpoints(task);
 969                 thread->dabr = data;
 970                 return 0;
 971         }
 972
 973         /* Create a new breakpoint request if one doesn't exist already */
 974         hw_breakpoint_init(&attr);
 975         attr.bp_addr = data & ~HW_BREAKPOINT_ALIGN;
 976         arch_bp_generic_fields(data & (DABR_DATA_WRITE | DABR_DATA_READ),
 977                                                                 &attr.bp_type);
 978
 979         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
 980                                                ptrace_triggered, NULL, task);
 981         if (IS_ERR(bp)) {
 982                 thread->ptrace_bps[0] = NULL;
 983                 ptrace_put_breakpoints(task);
 984                 return PTR_ERR(bp);
 985         }
 986
 987         ptrace_put_breakpoints(task);
 988
 989 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 990
 991         /* Move contents to the DABR register */
 992         task->thread.dabr = data;
 993 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
 994         /* As described above, it was assumed 3 bits were passed with the data
 995          *  address, but we will assume only the mode bits will be passed
 996          *  as to not cause alignment restrictions for DAC-based processors.
 997          */
 998
 999         /* DAC's hold the whole address without any mode flags */
1000         task->thread.dac1 = data & ~0x3UL;
1001
1002         if (task->thread.dac1 == 0) {
1003                 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1004                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
1005                                         task->thread.dbcr1)) {
1006                         task->thread.regs->msr &= ~MSR_DE;
1007                         task->thread.dbcr0 &= ~DBCR0_IDM;
1008                 }
1009                 return 0;
1010         }
1011
1012         /* Read or Write bits must be set */
1013
1014         if (!(data & 0x3UL))
1015                 return -EINVAL;
1016
1017         /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
1018            register */
1019         task->thread.dbcr0 |= DBCR0_IDM;
1020
1021         /* Check for write and read flags and set DBCR0
1022            accordingly */
1023         dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
1024         if (data & 0x1UL)
1025                 dbcr_dac(task) |= DBCR_DAC1R;
1026         if (data & 0x2UL)
1027                 dbcr_dac(task) |= DBCR_DAC1W;
1028         task->thread.regs->msr |= MSR_DE;
1029 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1030         return 0;
1031 }
1032
1033 /*
1034  * Called by kernel/ptrace.c when detaching..
1035  *
1036  * Make sure single step bits etc are not set.
1037  */
1038 void ptrace_disable(struct task_struct *child)
1039 {
1040         /* make sure the single step bit is not set. */
1041         user_disable_single_step(child);
1042 }
1043
1044 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1045 static long set_intruction_bp(struct task_struct *child,
1046                               struct ppc_hw_breakpoint *bp_info)
1047 {
1048         int slot;
1049         int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
1050         int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
1051         int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
1052         int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
1053
1054         if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1055                 slot2_in_use = 1;
1056         if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1057                 slot4_in_use = 1;
1058
1059         if (bp_info->addr >= TASK_SIZE)
1060                 return -EIO;
1061
1062         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
1063
1064                 /* Make sure range is valid. */
1065                 if (bp_info->addr2 >= TASK_SIZE)
1066                         return -EIO;
1067
1068                 /* We need a pair of IAC regsisters */
1069                 if ((!slot1_in_use) && (!slot2_in_use)) {
1070                         slot = 1;
1071                         child->thread.iac1 = bp_info->addr;
1072                         child->thread.iac2 = bp_info->addr2;
1073                         child->thread.dbcr0 |= DBCR0_IAC1;
1074                         if (bp_info->addr_mode ==
1075                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1076                                 dbcr_iac_range(child) |= DBCR_IAC12X;
1077                         else
1078                                 dbcr_iac_range(child) |= DBCR_IAC12I;
1079 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1080                 } else if ((!slot3_in_use) && (!slot4_in_use)) {
1081                         slot = 3;
1082                         child->thread.iac3 = bp_info->addr;
1083                         child->thread.iac4 = bp_info->addr2;
1084                         child->thread.dbcr0 |= DBCR0_IAC3;
1085                         if (bp_info->addr_mode ==
1086                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1087                                 dbcr_iac_range(child) |= DBCR_IAC34X;
1088                         else
1089                                 dbcr_iac_range(child) |= DBCR_IAC34I;
1090 #endif
1091                 } else
1092                         return -ENOSPC;
1093         } else {
1094                 /* We only need one.  If possible leave a pair free in
1095                  * case a range is needed later
1096                  */
1097                 if (!slot1_in_use) {
1098                         /*
1099                          * Don't use iac1 if iac1-iac2 are free and either
1100                          * iac3 or iac4 (but not both) are free
1101                          */
1102                         if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1103                                 slot = 1;
1104                                 child->thread.iac1 = bp_info->addr;
1105                                 child->thread.dbcr0 |= DBCR0_IAC1;
1106                                 goto out;
1107                         }
1108                 }
1109                 if (!slot2_in_use) {
1110                         slot = 2;
1111                         child->thread.iac2 = bp_info->addr;
1112                         child->thread.dbcr0 |= DBCR0_IAC2;
1113 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1114                 } else if (!slot3_in_use) {
1115                         slot = 3;
1116                         child->thread.iac3 = bp_info->addr;
1117                         child->thread.dbcr0 |= DBCR0_IAC3;
1118                 } else if (!slot4_in_use) {
1119                         slot = 4;
1120                         child->thread.iac4 = bp_info->addr;
1121                         child->thread.dbcr0 |= DBCR0_IAC4;
1122 #endif
1123                 } else
1124                         return -ENOSPC;
1125         }
1126 out:
1127         child->thread.dbcr0 |= DBCR0_IDM;
1128         child->thread.regs->msr |= MSR_DE;
1129
1130         return slot;
1131 }
1132
1133 static int del_instruction_bp(struct task_struct *child, int slot)
1134 {
1135         switch (slot) {
1136         case 1:
1137                 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
1138                         return -ENOENT;
1139
1140                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1141                         /* address range - clear slots 1 & 2 */
1142                         child->thread.iac2 = 0;
1143                         dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1144                 }
1145                 child->thread.iac1 = 0;
1146                 child->thread.dbcr0 &= ~DBCR0_IAC1;
1147                 break;
1148         case 2:
1149                 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
1150                         return -ENOENT;
1151
1152                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1153                         /* used in a range */
1154                         return -EINVAL;
1155                 child->thread.iac2 = 0;
1156                 child->thread.dbcr0 &= ~DBCR0_IAC2;
1157                 break;
1158 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1159         case 3:
1160                 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
1161                         return -ENOENT;
1162
1163                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1164                         /* address range - clear slots 3 & 4 */
1165                         child->thread.iac4 = 0;
1166                         dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1167                 }
1168                 child->thread.iac3 = 0;
1169                 child->thread.dbcr0 &= ~DBCR0_IAC3;
1170                 break;
1171         case 4:
1172                 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
1173                         return -ENOENT;
1174
1175                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1176                         /* Used in a range */
1177                         return -EINVAL;
1178                 child->thread.iac4 = 0;
1179                 child->thread.dbcr0 &= ~DBCR0_IAC4;
1180                 break;
1181 #endif
1182         default:
1183                 return -EINVAL;
1184         }
1185         return 0;
1186 }
1187
1188 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1189 {
1190         int byte_enable =
1191                 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
1192                 & 0xf;
1193         int condition_mode =
1194                 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1195         int slot;
1196
1197         if (byte_enable && (condition_mode == 0))
1198                 return -EINVAL;
1199
1200         if (bp_info->addr >= TASK_SIZE)
1201                 return -EIO;
1202
1203         if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1204                 slot = 1;
1205                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1206                         dbcr_dac(child) |= DBCR_DAC1R;
1207                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1208                         dbcr_dac(child) |= DBCR_DAC1W;
1209                 child->thread.dac1 = (unsigned long)bp_info->addr;
1210 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1211                 if (byte_enable) {
1212                         child->thread.dvc1 =
1213                                 (unsigned long)bp_info->condition_value;
1214                         child->thread.dbcr2 |=
1215                                 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1216                                  (condition_mode << DBCR2_DVC1M_SHIFT));
1217                 }
1218 #endif
1219 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1220         } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1221                 /* Both dac1 and dac2 are part of a range */
1222                 return -ENOSPC;
1223 #endif
1224         } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1225                 slot = 2;
1226                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1227                         dbcr_dac(child) |= DBCR_DAC2R;
1228                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1229                         dbcr_dac(child) |= DBCR_DAC2W;
1230                 child->thread.dac2 = (unsigned long)bp_info->addr;
1231 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1232                 if (byte_enable) {
1233                         child->thread.dvc2 =
1234                                 (unsigned long)bp_info->condition_value;
1235                         child->thread.dbcr2 |=
1236                                 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1237                                  (condition_mode << DBCR2_DVC2M_SHIFT));
1238                 }
1239 #endif
1240         } else
1241                 return -ENOSPC;
1242         child->thread.dbcr0 |= DBCR0_IDM;
1243         child->thread.regs->msr |= MSR_DE;
1244
1245         return slot + 4;
1246 }
1247
1248 static int del_dac(struct task_struct *child, int slot)
1249 {
1250         if (slot == 1) {
1251                 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1252                         return -ENOENT;
1253
1254                 child->thread.dac1 = 0;
1255                 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1256 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1257                 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1258                         child->thread.dac2 = 0;
1259                         child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1260                 }
1261                 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1262 #endif
1263 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1264                 child->thread.dvc1 = 0;
1265 #endif
1266         } else if (slot == 2) {
1267                 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1268                         return -ENOENT;
1269
1270 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1271                 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1272                         /* Part of a range */
1273                         return -EINVAL;
1274                 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1275 #endif
1276 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1277                 child->thread.dvc2 = 0;
1278 #endif
1279                 child->thread.dac2 = 0;
1280                 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1281         } else
1282                 return -EINVAL;
1283
1284         return 0;
1285 }
1286 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1287
1288 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1289 static int set_dac_range(struct task_struct *child,
1290                          struct ppc_hw_breakpoint *bp_info)
1291 {
1292         int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1293
1294         /* We don't allow range watchpoints to be used with DVC */
1295         if (bp_info->condition_mode)
1296                 return -EINVAL;
1297
1298         /*
1299          * Best effort to verify the address range.  The user/supervisor bits
1300          * prevent trapping in kernel space, but let's fail on an obvious bad
1301          * range.  The simple test on the mask is not fool-proof, and any
1302          * exclusive range will spill over into kernel space.
1303          */
1304         if (bp_info->addr >= TASK_SIZE)
1305                 return -EIO;
1306         if (mode == PPC_BREAKPOINT_MODE_MASK) {
1307                 /*
1308                  * dac2 is a bitmask.  Don't allow a mask that makes a
1309                  * kernel space address from a valid dac1 value
1310                  */
1311                 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1312                         return -EIO;
1313         } else {
1314                 /*
1315                  * For range breakpoints, addr2 must also be a valid address
1316                  */
1317                 if (bp_info->addr2 >= TASK_SIZE)
1318                         return -EIO;
1319         }
1320
1321         if (child->thread.dbcr0 &
1322             (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1323                 return -ENOSPC;
1324
1325         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1326                 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1327         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1328                 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1329         child->thread.dac1 = bp_info->addr;
1330         child->thread.dac2 = bp_info->addr2;
1331         if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1332                 child->thread.dbcr2  |= DBCR2_DAC12M;
1333         else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1334                 child->thread.dbcr2  |= DBCR2_DAC12MX;
1335         else    /* PPC_BREAKPOINT_MODE_MASK */
1336                 child->thread.dbcr2  |= DBCR2_DAC12MM;
1337         child->thread.regs->msr |= MSR_DE;
1338
1339         return 5;
1340 }
1341 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1342
1343 static long ppc_set_hwdebug(struct task_struct *child,
1344                      struct ppc_hw_breakpoint *bp_info)
1345 {
1346 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
1347         unsigned long dabr;
1348 #endif
1349
1350         if (bp_info->version != 1)
1351                 return -ENOTSUPP;
1352 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1353         /*
1354          * Check for invalid flags and combinations
1355          */
1356         if ((bp_info->trigger_type == 0) ||
1357             (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1358                                        PPC_BREAKPOINT_TRIGGER_RW)) ||
1359             (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1360             (bp_info->condition_mode &
1361              ~(PPC_BREAKPOINT_CONDITION_MODE |
1362                PPC_BREAKPOINT_CONDITION_BE_ALL)))
1363                 return -EINVAL;
1364 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1365         if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1366                 return -EINVAL;
1367 #endif
1368
1369         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1370                 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1371                     (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1372                         return -EINVAL;
1373                 return set_intruction_bp(child, bp_info);
1374         }
1375         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1376                 return set_dac(child, bp_info);
1377
1378 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1379         return set_dac_range(child, bp_info);
1380 #else
1381         return -EINVAL;
1382 #endif
1383 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1384         /*
1385          * We only support one data breakpoint
1386          */
1387         if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
1388             (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
1389             bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT ||
1390             bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1391                 return -EINVAL;
1392
1393         if (child->thread.dabr)
1394                 return -ENOSPC;
1395
1396         if ((unsigned long)bp_info->addr >= TASK_SIZE)
1397                 return -EIO;
1398
1399         dabr = (unsigned long)bp_info->addr & ~7UL;
1400         dabr |= DABR_TRANSLATION;
1401         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1402                 dabr |= DABR_DATA_READ;
1403         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1404                 dabr |= DABR_DATA_WRITE;
1405
1406         child->thread.dabr = dabr;
1407
1408         return 1;
1409 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1410 }
1411
1412 static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
1413 {
1414 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1415         int rc;
1416
1417         if (data <= 4)
1418                 rc = del_instruction_bp(child, (int)data);
1419         else
1420                 rc = del_dac(child, (int)data - 4);
1421
1422         if (!rc) {
1423                 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1424                                         child->thread.dbcr1)) {
1425                         child->thread.dbcr0 &= ~DBCR0_IDM;
1426                         child->thread.regs->msr &= ~MSR_DE;
1427                 }
1428         }
1429         return rc;
1430 #else
1431         if (data != 1)
1432                 return -EINVAL;
1433         if (child->thread.dabr == 0)
1434                 return -ENOENT;
1435
1436         child->thread.dabr = 0;
1437
1438         return 0;
1439 #endif
1440 }
1441
1442 /*
1443  * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
1444  * we mark them as obsolete now, they will be removed in a future version
1445  */
1446 static long arch_ptrace_old(struct task_struct *child, long request,
1447                             unsigned long addr, unsigned long data)
1448 {
1449         void __user *datavp = (void __user *) data;
1450
1451         switch (request) {
1452         case PPC_PTRACE_GETREGS:        /* Get GPRs 0 - 31. */
1453                 return copy_regset_to_user(child, &user_ppc_native_view,
1454                                            REGSET_GPR, 0, 32 * sizeof(long),
1455                                            datavp);
1456
1457         case PPC_PTRACE_SETREGS:        /* Set GPRs 0 - 31. */
1458                 return copy_regset_from_user(child, &user_ppc_native_view,
1459                                              REGSET_GPR, 0, 32 * sizeof(long),
1460                                              datavp);
1461
1462         case PPC_PTRACE_GETFPREGS:      /* Get FPRs 0 - 31. */
1463                 return copy_regset_to_user(child, &user_ppc_native_view,
1464                                            REGSET_FPR, 0, 32 * sizeof(double),
1465                                            datavp);
1466
1467         case PPC_PTRACE_SETFPREGS:      /* Set FPRs 0 - 31. */
1468                 return copy_regset_from_user(child, &user_ppc_native_view,
1469                                              REGSET_FPR, 0, 32 * sizeof(double),
1470                                              datavp);
1471         }
1472
1473         return -EPERM;
1474 }
1475
1476 long arch_ptrace(struct task_struct *child, long request,
1477                  unsigned long addr, unsigned long data)
1478 {
1479         int ret = -EPERM;
1480         void __user *datavp = (void __user *) data;
1481         unsigned long __user *datalp = datavp;
1482
1483         switch (request) {
1484         /* read the word at location addr in the USER area. */
1485         case PTRACE_PEEKUSR: {
1486                 unsigned long index, tmp;
1487
1488                 ret = -EIO;
1489                 /* convert to index and check */
1490 #ifdef CONFIG_PPC32
1491                 index = addr >> 2;
1492                 if ((addr & 3) || (index > PT_FPSCR)
1493                     || (child->thread.regs == NULL))
1494 #else
1495                 index = addr >> 3;
1496                 if ((addr & 7) || (index > PT_FPSCR))
1497 #endif
1498                         break;
1499
1500                 CHECK_FULL_REGS(child->thread.regs);
1501                 if (index < PT_FPR0) {
1502                         tmp = ptrace_get_reg(child, (int) index);
1503                 } else {
1504                         unsigned int fpidx = index - PT_FPR0;
1505
1506                         flush_fp_to_thread(child);
1507                         if (fpidx < (PT_FPSCR - PT_FPR0))
1508                                 tmp = ((unsigned long *)child->thread.fpr)
1509                                         [fpidx * TS_FPRWIDTH];
1510                         else
1511                                 tmp = child->thread.fpscr.val;
1512                 }
1513                 ret = put_user(tmp, datalp);
1514                 break;
1515         }
1516
1517         /* write the word at location addr in the USER area */
1518         case PTRACE_POKEUSR: {
1519                 unsigned long index;
1520
1521                 ret = -EIO;
1522                 /* convert to index and check */
1523 #ifdef CONFIG_PPC32
1524                 index = addr >> 2;
1525                 if ((addr & 3) || (index > PT_FPSCR)
1526                     || (child->thread.regs == NULL))
1527 #else
1528                 index = addr >> 3;
1529                 if ((addr & 7) || (index > PT_FPSCR))
1530 #endif
1531                         break;
1532
1533                 CHECK_FULL_REGS(child->thread.regs);
1534                 if (index < PT_FPR0) {
1535                         ret = ptrace_put_reg(child, index, data);
1536                 } else {
1537                         unsigned int fpidx = index - PT_FPR0;
1538
1539                         flush_fp_to_thread(child);
1540                         if (fpidx < (PT_FPSCR - PT_FPR0))
1541                                 ((unsigned long *)child->thread.fpr)
1542                                         [fpidx * TS_FPRWIDTH] = data;
1543                         else
1544                                 child->thread.fpscr.val = data;
1545                         ret = 0;
1546                 }
1547                 break;
1548         }
1549
1550         case PPC_PTRACE_GETHWDBGINFO: {
1551                 struct ppc_debug_info dbginfo;
1552
1553                 dbginfo.version = 1;
1554 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1555                 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1556                 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1557                 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1558                 dbginfo.data_bp_alignment = 4;
1559                 dbginfo.sizeof_condition = 4;
1560                 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1561                                    PPC_DEBUG_FEATURE_INSN_BP_MASK;
1562 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1563                 dbginfo.features |=
1564                                    PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1565                                    PPC_DEBUG_FEATURE_DATA_BP_MASK;
1566 #endif
1567 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1568                 dbginfo.num_instruction_bps = 0;
1569                 dbginfo.num_data_bps = 1;
1570                 dbginfo.num_condition_regs = 0;
1571 #ifdef CONFIG_PPC64
1572                 dbginfo.data_bp_alignment = 8;
1573 #else
1574                 dbginfo.data_bp_alignment = 4;
1575 #endif
1576                 dbginfo.sizeof_condition = 0;
1577                 dbginfo.features = 0;
1578 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1579
1580                 if (!access_ok(VERIFY_WRITE, datavp,
1581                                sizeof(struct ppc_debug_info)))
1582                         return -EFAULT;
1583                 ret = __copy_to_user(datavp, &dbginfo,
1584                                      sizeof(struct ppc_debug_info)) ?
1585                       -EFAULT : 0;
1586                 break;
1587         }
1588
1589         case PPC_PTRACE_SETHWDEBUG: {
1590                 struct ppc_hw_breakpoint bp_info;
1591
1592                 if (!access_ok(VERIFY_READ, datavp,
1593                                sizeof(struct ppc_hw_breakpoint)))
1594                         return -EFAULT;
1595                 ret = __copy_from_user(&bp_info, datavp,
1596                                        sizeof(struct ppc_hw_breakpoint)) ?
1597                       -EFAULT : 0;
1598                 if (!ret)
1599                         ret = ppc_set_hwdebug(child, &bp_info);
1600                 break;
1601         }
1602
1603         case PPC_PTRACE_DELHWDEBUG: {
1604                 ret = ppc_del_hwdebug(child, addr, data);
1605                 break;
1606         }
1607
1608         case PTRACE_GET_DEBUGREG: {
1609                 ret = -EINVAL;
1610                 /* We only support one DABR and no IABRS at the moment */
1611                 if (addr > 0)
1612                         break;
1613 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1614                 ret = put_user(child->thread.dac1, datalp);
1615 #else
1616                 ret = put_user(child->thread.dabr, datalp);
1617 #endif
1618                 break;
1619         }
1620
1621         case PTRACE_SET_DEBUGREG:
1622                 ret = ptrace_set_debugreg(child, addr, data);
1623                 break;
1624
1625 #ifdef CONFIG_PPC64
1626         case PTRACE_GETREGS64:
1627 #endif
1628         case PTRACE_GETREGS:    /* Get all pt_regs from the child. */
1629                 return copy_regset_to_user(child, &user_ppc_native_view,
1630                                            REGSET_GPR,
1631                                            0, sizeof(struct pt_regs),
1632                                            datavp);
1633
1634 #ifdef CONFIG_PPC64
1635         case PTRACE_SETREGS64:
1636 #endif
1637         case PTRACE_SETREGS:    /* Set all gp regs in the child. */
1638                 return copy_regset_from_user(child, &user_ppc_native_view,
1639                                              REGSET_GPR,
1640                                              0, sizeof(struct pt_regs),
1641                                              datavp);
1642
1643         case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
1644                 return copy_regset_to_user(child, &user_ppc_native_view,
1645                                            REGSET_FPR,
1646                                            0, sizeof(elf_fpregset_t),
1647                                            datavp);
1648
1649         case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
1650                 return copy_regset_from_user(child, &user_ppc_native_view,
1651                                              REGSET_FPR,
1652                                              0, sizeof(elf_fpregset_t),
1653                                              datavp);
1654
1655 #ifdef CONFIG_ALTIVEC
1656         case PTRACE_GETVRREGS:
1657                 return copy_regset_to_user(child, &user_ppc_native_view,
1658                                            REGSET_VMX,
1659                                            0, (33 * sizeof(vector128) +
1660                                                sizeof(u32)),
1661                                            datavp);
1662
1663         case PTRACE_SETVRREGS:
1664                 return copy_regset_from_user(child, &user_ppc_native_view,
1665                                              REGSET_VMX,
1666                                              0, (33 * sizeof(vector128) +
1667                                                  sizeof(u32)),
1668                                              datavp);
1669 #endif
1670 #ifdef CONFIG_VSX
1671         case PTRACE_GETVSRREGS:
1672                 return copy_regset_to_user(child, &user_ppc_native_view,
1673                                            REGSET_VSX,
1674                                            0, 32 * sizeof(double),
1675                                            datavp);
1676
1677         case PTRACE_SETVSRREGS:
1678                 return copy_regset_from_user(child, &user_ppc_native_view,
1679                                              REGSET_VSX,
1680                                              0, 32 * sizeof(double),
1681                                              datavp);
1682 #endif
1683 #ifdef CONFIG_SPE
1684         case PTRACE_GETEVRREGS:
1685                 /* Get the child spe register state. */
1686                 return copy_regset_to_user(child, &user_ppc_native_view,
1687                                            REGSET_SPE, 0, 35 * sizeof(u32),
1688                                            datavp);
1689
1690         case PTRACE_SETEVRREGS:
1691                 /* Set the child spe register state. */
1692                 return copy_regset_from_user(child, &user_ppc_native_view,
1693                                              REGSET_SPE, 0, 35 * sizeof(u32),
1694                                              datavp);
1695 #endif
1696
1697         /* Old reverse args ptrace callss */
1698         case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
1699         case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
1700         case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
1701         case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
1702                 ret = arch_ptrace_old(child, request, addr, data);
1703                 break;
1704
1705         default:
1706                 ret = ptrace_request(child, request, addr, data);
1707                 break;
1708         }
1709         return ret;
1710 }
1711
1712 /*
1713  * We must return the syscall number to actually look up in the table.
1714  * This can be -1L to skip running any syscall at all.
1715  */
1716 long do_syscall_trace_enter(struct pt_regs *regs)
1717 {
1718         long ret = 0;
1719
1720         secure_computing(regs->gpr[0]);
1721
1722         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1723             tracehook_report_syscall_entry(regs))
1724                 /*
1725                  * Tracing decided this syscall should not happen.
1726                  * We'll return a bogus call number to get an ENOSYS
1727                  * error, but leave the original number in regs->gpr[0].
1728                  */
1729                 ret = -1L;
1730
1731         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1732                 trace_sys_enter(regs, regs->gpr[0]);
1733
1734         if (unlikely(current->audit_context)) {
1735 #ifdef CONFIG_PPC64
1736                 if (!is_32bit_task())
1737                         audit_syscall_entry(AUDIT_ARCH_PPC64,
1738                                             regs->gpr[0],
1739                                             regs->gpr[3], regs->gpr[4],
1740                                             regs->gpr[5], regs->gpr[6]);
1741                 else
1742 #endif
1743                         audit_syscall_entry(AUDIT_ARCH_PPC,
1744                                             regs->gpr[0],
1745                                             regs->gpr[3] & 0xffffffff,
1746                                             regs->gpr[4] & 0xffffffff,
1747                                             regs->gpr[5] & 0xffffffff,
1748                                             regs->gpr[6] & 0xffffffff);
1749         }
1750
1751         return ret ?: regs->gpr[0];
1752 }
1753
1754 void do_syscall_trace_leave(struct pt_regs *regs)
1755 {
1756         int step;
1757
1758         if (unlikely(current->audit_context))
1759                 audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
1760                                    regs->result);
1761
1762         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1763                 trace_sys_exit(regs, regs->result);
1764
1765         step = test_thread_flag(TIF_SINGLESTEP);
1766         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1767                 tracehook_report_syscall_exit(regs, step);
1768 }