arch/powerpc/kernel/ptrace.c

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Derived from "arch/m68k/kernel/ptrace.c"
   6  *  Copyright (C) 1994 by Hamish Macdonald
   7  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
   8  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
   9  *
  10  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
  11  * and Paul Mackerras (paulus@samba.org).
  12  *
  13  * This file is subject to the terms and conditions of the GNU General
  14  * Public License.  See the file README.legal in the main directory of
  15  * this archive for more details.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/sched.h>
  20 #include <linux/mm.h>
  21 #include <linux/smp.h>
  22 #include <linux/errno.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/regset.h>
  25 #include <linux/tracehook.h>
  26 #include <linux/elf.h>
  27 #include <linux/user.h>
  28 #include <linux/security.h>
  29 #include <linux/signal.h>
  30 #include <linux/seccomp.h>
  31 #include <linux/audit.h>
  32 #include <trace/syscall.h>
  33 #include <linux/hw_breakpoint.h>
  34 #include <linux/perf_event.h>
  35
  36 #include <asm/uaccess.h>
  37 #include <asm/page.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/switch_to.h>
  40
  41 #define CREATE_TRACE_POINTS
  42 #include <trace/events/syscalls.h>
  43
  44 /*
  45  * The parameter save area on the stack is used to store arguments being passed
  46  * to callee function and is located at fixed offset from stack pointer.
  47  */
  48 #ifdef CONFIG_PPC32
  49 #define PARAMETER_SAVE_AREA_OFFSET      24  /* bytes */
  50 #else /* CONFIG_PPC32 */
  51 #define PARAMETER_SAVE_AREA_OFFSET      48  /* bytes */
  52 #endif
  53
  54 struct pt_regs_offset {
  55         const char *name;
  56         int offset;
  57 };
  58
  59 #define STR(s)  #s                      /* convert to string */
  60 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  61 #define GPR_OFFSET_NAME(num)    \
  62         {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
  63 #define REG_OFFSET_END {.name = NULL, .offset = 0}
  64
  65 static const struct pt_regs_offset regoffset_table[] = {
  66         GPR_OFFSET_NAME(0),
  67         GPR_OFFSET_NAME(1),
  68         GPR_OFFSET_NAME(2),
  69         GPR_OFFSET_NAME(3),
  70         GPR_OFFSET_NAME(4),
  71         GPR_OFFSET_NAME(5),
  72         GPR_OFFSET_NAME(6),
  73         GPR_OFFSET_NAME(7),
  74         GPR_OFFSET_NAME(8),
  75         GPR_OFFSET_NAME(9),
  76         GPR_OFFSET_NAME(10),
  77         GPR_OFFSET_NAME(11),
  78         GPR_OFFSET_NAME(12),
  79         GPR_OFFSET_NAME(13),
  80         GPR_OFFSET_NAME(14),
  81         GPR_OFFSET_NAME(15),
  82         GPR_OFFSET_NAME(16),
  83         GPR_OFFSET_NAME(17),
  84         GPR_OFFSET_NAME(18),
  85         GPR_OFFSET_NAME(19),
  86         GPR_OFFSET_NAME(20),
  87         GPR_OFFSET_NAME(21),
  88         GPR_OFFSET_NAME(22),
  89         GPR_OFFSET_NAME(23),
  90         GPR_OFFSET_NAME(24),
  91         GPR_OFFSET_NAME(25),
  92         GPR_OFFSET_NAME(26),
  93         GPR_OFFSET_NAME(27),
  94         GPR_OFFSET_NAME(28),
  95         GPR_OFFSET_NAME(29),
  96         GPR_OFFSET_NAME(30),
  97         GPR_OFFSET_NAME(31),
  98         REG_OFFSET_NAME(nip),
  99         REG_OFFSET_NAME(msr),
 100         REG_OFFSET_NAME(ctr),
 101         REG_OFFSET_NAME(link),
 102         REG_OFFSET_NAME(xer),
 103         REG_OFFSET_NAME(ccr),
 104 #ifdef CONFIG_PPC64
 105         REG_OFFSET_NAME(softe),
 106 #else
 107         REG_OFFSET_NAME(mq),
 108 #endif
 109         REG_OFFSET_NAME(trap),
 110         REG_OFFSET_NAME(dar),
 111         REG_OFFSET_NAME(dsisr),
 112         REG_OFFSET_END,
 113 };
 114
 115 /**
 116  * regs_query_register_offset() - query register offset from its name
 117  * @name:       the name of a register
 118  *
 119  * regs_query_register_offset() returns the offset of a register in struct
 120  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 121  */
 122 int regs_query_register_offset(const char *name)
 123 {
 124         const struct pt_regs_offset *roff;
 125         for (roff = regoffset_table; roff->name != NULL; roff++)
 126                 if (!strcmp(roff->name, name))
 127                         return roff->offset;
 128         return -EINVAL;
 129 }
 130
 131 /**
 132  * regs_query_register_name() - query register name from its offset
 133  * @offset:     the offset of a register in struct pt_regs.
 134  *
 135  * regs_query_register_name() returns the name of a register from its
 136  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
 137  */
 138 const char *regs_query_register_name(unsigned int offset)
 139 {
 140         const struct pt_regs_offset *roff;
 141         for (roff = regoffset_table; roff->name != NULL; roff++)
 142                 if (roff->offset == offset)
 143                         return roff->name;
 144         return NULL;
 145 }
 146
 147 /*
 148  * does not yet catch signals sent when the child dies.
 149  * in exit.c or in signal.c.
 150  */
 151
 152 /*
 153  * Set of msr bits that gdb can change on behalf of a process.
 154  */
 155 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 156 #define MSR_DEBUGCHANGE 0
 157 #else
 158 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
 159 #endif
 160
 161 /*
 162  * Max register writeable via put_reg
 163  */
 164 #ifdef CONFIG_PPC32
 165 #define PT_MAX_PUT_REG  PT_MQ
 166 #else
 167 #define PT_MAX_PUT_REG  PT_CCR
 168 #endif
 169
 170 static unsigned long get_user_msr(struct task_struct *task)
 171 {
 172         return task->thread.regs->msr | task->thread.fpexc_mode;
 173 }
 174
 175 static int set_user_msr(struct task_struct *task, unsigned long msr)
 176 {
 177         task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
 178         task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
 179         return 0;
 180 }
 181
 182 #ifdef CONFIG_PPC64
 183 static int get_user_dscr(struct task_struct *task, unsigned long *data)
 184 {
 185         *data = task->thread.dscr;
 186         return 0;
 187 }
 188
 189 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
 190 {
 191         task->thread.dscr = dscr;
 192         task->thread.dscr_inherit = 1;
 193         return 0;
 194 }
 195 #else
 196 static int get_user_dscr(struct task_struct *task, unsigned long *data)
 197 {
 198         return -EIO;
 199 }
 200
 201 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
 202 {
 203         return -EIO;
 204 }
 205 #endif
 206
 207 /*
 208  * We prevent mucking around with the reserved area of trap
 209  * which are used internally by the kernel.
 210  */
 211 static int set_user_trap(struct task_struct *task, unsigned long trap)
 212 {
 213         task->thread.regs->trap = trap & 0xfff0;
 214         return 0;
 215 }
 216
 217 /*
 218  * Get contents of register REGNO in task TASK.
 219  */
 220 int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data)
 221 {
 222         if ((task->thread.regs == NULL) || !data)
 223                 return -EIO;
 224
 225         if (regno == PT_MSR) {
 226                 *data = get_user_msr(task);
 227                 return 0;
 228         }
 229
 230         if (regno == PT_DSCR)
 231                 return get_user_dscr(task, data);
 232
 233         if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
 234                 *data = ((unsigned long *)task->thread.regs)[regno];
 235                 return 0;
 236         }
 237
 238         return -EIO;
 239 }
 240
 241 /*
 242  * Write contents of register REGNO in task TASK.
 243  */
 244 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
 245 {
 246         if (task->thread.regs == NULL)
 247                 return -EIO;
 248
 249         if (regno == PT_MSR)
 250                 return set_user_msr(task, data);
 251         if (regno == PT_TRAP)
 252                 return set_user_trap(task, data);
 253         if (regno == PT_DSCR)
 254                 return set_user_dscr(task, data);
 255
 256         if (regno <= PT_MAX_PUT_REG) {
 257                 ((unsigned long *)task->thread.regs)[regno] = data;
 258                 return 0;
 259         }
 260         return -EIO;
 261 }
 262
 263 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
 264                    unsigned int pos, unsigned int count,
 265                    void *kbuf, void __user *ubuf)
 266 {
 267         int i, ret;
 268
 269         if (target->thread.regs == NULL)
 270                 return -EIO;
 271
 272         if (!FULL_REGS(target->thread.regs)) {
 273                 /* We have a partial register set.  Fill 14-31 with bogus values */
 274                 for (i = 14; i < 32; i++)
 275                         target->thread.regs->gpr[i] = NV_REG_POISON;
 276         }
 277
 278         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 279                                   target->thread.regs,
 280                                   0, offsetof(struct pt_regs, msr));
 281         if (!ret) {
 282                 unsigned long msr = get_user_msr(target);
 283                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
 284                                           offsetof(struct pt_regs, msr),
 285                                           offsetof(struct pt_regs, msr) +
 286                                           sizeof(msr));
 287         }
 288
 289         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 290                      offsetof(struct pt_regs, msr) + sizeof(long));
 291
 292         if (!ret)
 293                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 294                                           &target->thread.regs->orig_gpr3,
 295                                           offsetof(struct pt_regs, orig_gpr3),
 296                                           sizeof(struct pt_regs));
 297         if (!ret)
 298                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 299                                                sizeof(struct pt_regs), -1);
 300
 301         return ret;
 302 }
 303
 304 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
 305                    unsigned int pos, unsigned int count,
 306                    const void *kbuf, const void __user *ubuf)
 307 {
 308         unsigned long reg;
 309         int ret;
 310
 311         if (target->thread.regs == NULL)
 312                 return -EIO;
 313
 314         CHECK_FULL_REGS(target->thread.regs);
 315
 316         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 317                                  target->thread.regs,
 318                                  0, PT_MSR * sizeof(reg));
 319
 320         if (!ret && count > 0) {
 321                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 322                                          PT_MSR * sizeof(reg),
 323                                          (PT_MSR + 1) * sizeof(reg));
 324                 if (!ret)
 325                         ret = set_user_msr(target, reg);
 326         }
 327
 328         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 329                      offsetof(struct pt_regs, msr) + sizeof(long));
 330
 331         if (!ret)
 332                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 333                                          &target->thread.regs->orig_gpr3,
 334                                          PT_ORIG_R3 * sizeof(reg),
 335                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
 336
 337         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
 338                 ret = user_regset_copyin_ignore(
 339                         &pos, &count, &kbuf, &ubuf,
 340                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
 341                         PT_TRAP * sizeof(reg));
 342
 343         if (!ret && count > 0) {
 344                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 345                                          PT_TRAP * sizeof(reg),
 346                                          (PT_TRAP + 1) * sizeof(reg));
 347                 if (!ret)
 348                         ret = set_user_trap(target, reg);
 349         }
 350
 351         if (!ret)
 352                 ret = user_regset_copyin_ignore(
 353                         &pos, &count, &kbuf, &ubuf,
 354                         (PT_TRAP + 1) * sizeof(reg), -1);
 355
 356         return ret;
 357 }
 358
 359 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
 360                    unsigned int pos, unsigned int count,
 361                    void *kbuf, void __user *ubuf)
 362 {
 363 #ifdef CONFIG_VSX
 364         double buf[33];
 365         int i;
 366 #endif
 367         flush_fp_to_thread(target);
 368
 369 #ifdef CONFIG_VSX
 370         /* copy to local buffer then write that out */
 371         for (i = 0; i < 32 ; i++)
 372                 buf[i] = target->thread.TS_FPR(i);
 373         memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
 374         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 375
 376 #else
 377         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 378                      offsetof(struct thread_struct, TS_FPR(32)));
 379
 380         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 381                                    &target->thread.fpr, 0, -1);
 382 #endif
 383 }
 384
 385 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
 386                    unsigned int pos, unsigned int count,
 387                    const void *kbuf, const void __user *ubuf)
 388 {
 389 #ifdef CONFIG_VSX
 390         double buf[33];
 391         int i;
 392 #endif
 393         flush_fp_to_thread(target);
 394
 395 #ifdef CONFIG_VSX
 396         /* copy to local buffer then write that out */
 397         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 398         if (i)
 399                 return i;
 400         for (i = 0; i < 32 ; i++)
 401                 target->thread.TS_FPR(i) = buf[i];
 402         memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
 403         return 0;
 404 #else
 405         BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
 406                      offsetof(struct thread_struct, TS_FPR(32)));
 407
 408         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 409                                   &target->thread.fpr, 0, -1);
 410 #endif
 411 }
 412
 413 #ifdef CONFIG_ALTIVEC
 414 /*
 415  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 416  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 417  * corresponding vector registers.  Quadword 32 contains the vscr as the
 418  * last word (offset 12) within that quadword.  Quadword 33 contains the
 419  * vrsave as the first word (offset 0) within the quadword.
 420  *
 421  * This definition of the VMX state is compatible with the current PPC32
 422  * ptrace interface.  This allows signal handling and ptrace to use the
 423  * same structures.  This also simplifies the implementation of a bi-arch
 424  * (combined (32- and 64-bit) gdb.
 425  */
 426
 427 static int vr_active(struct task_struct *target,
 428                      const struct user_regset *regset)
 429 {
 430         flush_altivec_to_thread(target);
 431         return target->thread.used_vr ? regset->n : 0;
 432 }
 433
 434 static int vr_get(struct task_struct *target, const struct user_regset *regset,
 435                   unsigned int pos, unsigned int count,
 436                   void *kbuf, void __user *ubuf)
 437 {
 438         int ret;
 439
 440         flush_altivec_to_thread(target);
 441
 442         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 443                      offsetof(struct thread_struct, vr[32]));
 444
 445         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 446                                   &target->thread.vr, 0,
 447                                   33 * sizeof(vector128));
 448         if (!ret) {
 449                 /*
 450                  * Copy out only the low-order word of vrsave.
 451                  */
 452                 union {
 453                         elf_vrreg_t reg;
 454                         u32 word;
 455                 } vrsave;
 456                 memset(&vrsave, 0, sizeof(vrsave));
 457                 vrsave.word = target->thread.vrsave;
 458                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
 459                                           33 * sizeof(vector128), -1);
 460         }
 461
 462         return ret;
 463 }
 464
 465 static int vr_set(struct task_struct *target, const struct user_regset *regset,
 466                   unsigned int pos, unsigned int count,
 467                   const void *kbuf, const void __user *ubuf)
 468 {
 469         int ret;
 470
 471         flush_altivec_to_thread(target);
 472
 473         BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
 474                      offsetof(struct thread_struct, vr[32]));
 475
 476         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 477                                  &target->thread.vr, 0, 33 * sizeof(vector128));
 478         if (!ret && count > 0) {
 479                 /*
 480                  * We use only the first word of vrsave.
 481                  */
 482                 union {
 483                         elf_vrreg_t reg;
 484                         u32 word;
 485                 } vrsave;
 486                 memset(&vrsave, 0, sizeof(vrsave));
 487                 vrsave.word = target->thread.vrsave;
 488                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
 489                                          33 * sizeof(vector128), -1);
 490                 if (!ret)
 491                         target->thread.vrsave = vrsave.word;
 492         }
 493
 494         return ret;
 495 }
 496 #endif /* CONFIG_ALTIVEC */
 497
 498 #ifdef CONFIG_VSX
 499 /*
 500  * Currently to set and and get all the vsx state, you need to call
 501  * the fp and VMX calls as well.  This only get/sets the lower 32
 502  * 128bit VSX registers.
 503  */
 504
 505 static int vsr_active(struct task_struct *target,
 506                       const struct user_regset *regset)
 507 {
 508         flush_vsx_to_thread(target);
 509         return target->thread.used_vsr ? regset->n : 0;
 510 }
 511
 512 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
 513                    unsigned int pos, unsigned int count,
 514                    void *kbuf, void __user *ubuf)
 515 {
 516         double buf[32];
 517         int ret, i;
 518
 519         flush_vsx_to_thread(target);
 520
 521         for (i = 0; i < 32 ; i++)
 522                 buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
 523         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 524                                   buf, 0, 32 * sizeof(double));
 525
 526         return ret;
 527 }
 528
 529 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
 530                    unsigned int pos, unsigned int count,
 531                    const void *kbuf, const void __user *ubuf)
 532 {
 533         double buf[32];
 534         int ret,i;
 535
 536         flush_vsx_to_thread(target);
 537
 538         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 539                                  buf, 0, 32 * sizeof(double));
 540         for (i = 0; i < 32 ; i++)
 541                 target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
 542
 543
 544         return ret;
 545 }
 546 #endif /* CONFIG_VSX */
 547
 548 #ifdef CONFIG_SPE
 549
 550 /*
 551  * For get_evrregs/set_evrregs functions 'data' has the following layout:
 552  *
 553  * struct {
 554  *   u32 evr[32];
 555  *   u64 acc;
 556  *   u32 spefscr;
 557  * }
 558  */
 559
 560 static int evr_active(struct task_struct *target,
 561                       const struct user_regset *regset)
 562 {
 563         flush_spe_to_thread(target);
 564         return target->thread.used_spe ? regset->n : 0;
 565 }
 566
 567 static int evr_get(struct task_struct *target, const struct user_regset *regset,
 568                    unsigned int pos, unsigned int count,
 569                    void *kbuf, void __user *ubuf)
 570 {
 571         int ret;
 572
 573         flush_spe_to_thread(target);
 574
 575         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 576                                   &target->thread.evr,
 577                                   0, sizeof(target->thread.evr));
 578
 579         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 580                      offsetof(struct thread_struct, spefscr));
 581
 582         if (!ret)
 583                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 584                                           &target->thread.acc,
 585                                           sizeof(target->thread.evr), -1);
 586
 587         return ret;
 588 }
 589
 590 static int evr_set(struct task_struct *target, const struct user_regset *regset,
 591                    unsigned int pos, unsigned int count,
 592                    const void *kbuf, const void __user *ubuf)
 593 {
 594         int ret;
 595
 596         flush_spe_to_thread(target);
 597
 598         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 599                                  &target->thread.evr,
 600                                  0, sizeof(target->thread.evr));
 601
 602         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 603                      offsetof(struct thread_struct, spefscr));
 604
 605         if (!ret)
 606                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 607                                          &target->thread.acc,
 608                                          sizeof(target->thread.evr), -1);
 609
 610         return ret;
 611 }
 612 #endif /* CONFIG_SPE */
 613
 614
 615 /*
 616  * These are our native regset flavors.
 617  */
 618 enum powerpc_regset {
 619         REGSET_GPR,
 620         REGSET_FPR,
 621 #ifdef CONFIG_ALTIVEC
 622         REGSET_VMX,
 623 #endif
 624 #ifdef CONFIG_VSX
 625         REGSET_VSX,
 626 #endif
 627 #ifdef CONFIG_SPE
 628         REGSET_SPE,
 629 #endif
 630 };
 631
 632 static const struct user_regset native_regsets[] = {
 633         [REGSET_GPR] = {
 634                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 635                 .size = sizeof(long), .align = sizeof(long),
 636                 .get = gpr_get, .set = gpr_set
 637         },
 638         [REGSET_FPR] = {
 639                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 640                 .size = sizeof(double), .align = sizeof(double),
 641                 .get = fpr_get, .set = fpr_set
 642         },
 643 #ifdef CONFIG_ALTIVEC
 644         [REGSET_VMX] = {
 645                 .core_note_type = NT_PPC_VMX, .n = 34,
 646                 .size = sizeof(vector128), .align = sizeof(vector128),
 647                 .active = vr_active, .get = vr_get, .set = vr_set
 648         },
 649 #endif
 650 #ifdef CONFIG_VSX
 651         [REGSET_VSX] = {
 652                 .core_note_type = NT_PPC_VSX, .n = 32,
 653                 .size = sizeof(double), .align = sizeof(double),
 654                 .active = vsr_active, .get = vsr_get, .set = vsr_set
 655         },
 656 #endif
 657 #ifdef CONFIG_SPE
 658         [REGSET_SPE] = {
 659                 .n = 35,
 660                 .size = sizeof(u32), .align = sizeof(u32),
 661                 .active = evr_active, .get = evr_get, .set = evr_set
 662         },
 663 #endif
 664 };
 665
 666 static const struct user_regset_view user_ppc_native_view = {
 667         .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
 668         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
 669 };
 670
 671 #ifdef CONFIG_PPC64
 672 #include <linux/compat.h>
 673
 674 static int gpr32_get(struct task_struct *target,
 675                      const struct user_regset *regset,
 676                      unsigned int pos, unsigned int count,
 677                      void *kbuf, void __user *ubuf)
 678 {
 679         const unsigned long *regs = &target->thread.regs->gpr[0];
 680         compat_ulong_t *k = kbuf;
 681         compat_ulong_t __user *u = ubuf;
 682         compat_ulong_t reg;
 683         int i;
 684
 685         if (target->thread.regs == NULL)
 686                 return -EIO;
 687
 688         if (!FULL_REGS(target->thread.regs)) {
 689                 /* We have a partial register set.  Fill 14-31 with bogus values */
 690                 for (i = 14; i < 32; i++)
 691                         target->thread.regs->gpr[i] = NV_REG_POISON;
 692         }
 693
 694         pos /= sizeof(reg);
 695         count /= sizeof(reg);
 696
 697         if (kbuf)
 698                 for (; count > 0 && pos < PT_MSR; --count)
 699                         *k++ = regs[pos++];
 700         else
 701                 for (; count > 0 && pos < PT_MSR; --count)
 702                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 703                                 return -EFAULT;
 704
 705         if (count > 0 && pos == PT_MSR) {
 706                 reg = get_user_msr(target);
 707                 if (kbuf)
 708                         *k++ = reg;
 709                 else if (__put_user(reg, u++))
 710                         return -EFAULT;
 711                 ++pos;
 712                 --count;
 713         }
 714
 715         if (kbuf)
 716                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 717                         *k++ = regs[pos++];
 718         else
 719                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
 720                         if (__put_user((compat_ulong_t) regs[pos++], u++))
 721                                 return -EFAULT;
 722
 723         kbuf = k;
 724         ubuf = u;
 725         pos *= sizeof(reg);
 726         count *= sizeof(reg);
 727         return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 728                                         PT_REGS_COUNT * sizeof(reg), -1);
 729 }
 730
 731 static int gpr32_set(struct task_struct *target,
 732                      const struct user_regset *regset,
 733                      unsigned int pos, unsigned int count,
 734                      const void *kbuf, const void __user *ubuf)
 735 {
 736         unsigned long *regs = &target->thread.regs->gpr[0];
 737         const compat_ulong_t *k = kbuf;
 738         const compat_ulong_t __user *u = ubuf;
 739         compat_ulong_t reg;
 740
 741         if (target->thread.regs == NULL)
 742                 return -EIO;
 743
 744         CHECK_FULL_REGS(target->thread.regs);
 745
 746         pos /= sizeof(reg);
 747         count /= sizeof(reg);
 748
 749         if (kbuf)
 750                 for (; count > 0 && pos < PT_MSR; --count)
 751                         regs[pos++] = *k++;
 752         else
 753                 for (; count > 0 && pos < PT_MSR; --count) {
 754                         if (__get_user(reg, u++))
 755                                 return -EFAULT;
 756                         regs[pos++] = reg;
 757                 }
 758
 759
 760         if (count > 0 && pos == PT_MSR) {
 761                 if (kbuf)
 762                         reg = *k++;
 763                 else if (__get_user(reg, u++))
 764                         return -EFAULT;
 765                 set_user_msr(target, reg);
 766                 ++pos;
 767                 --count;
 768         }
 769
 770         if (kbuf) {
 771                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
 772                         regs[pos++] = *k++;
 773                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 774                         ++k;
 775         } else {
 776                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
 777                         if (__get_user(reg, u++))
 778                                 return -EFAULT;
 779                         regs[pos++] = reg;
 780                 }
 781                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
 782                         if (__get_user(reg, u++))
 783                                 return -EFAULT;
 784         }
 785
 786         if (count > 0 && pos == PT_TRAP) {
 787                 if (kbuf)
 788                         reg = *k++;
 789                 else if (__get_user(reg, u++))
 790                         return -EFAULT;
 791                 set_user_trap(target, reg);
 792                 ++pos;
 793                 --count;
 794         }
 795
 796         kbuf = k;
 797         ubuf = u;
 798         pos *= sizeof(reg);
 799         count *= sizeof(reg);
 800         return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 801                                          (PT_TRAP + 1) * sizeof(reg), -1);
 802 }
 803
 804 /*
 805  * These are the regset flavors matching the CONFIG_PPC32 native set.
 806  */
 807 static const struct user_regset compat_regsets[] = {
 808         [REGSET_GPR] = {
 809                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
 810                 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
 811                 .get = gpr32_get, .set = gpr32_set
 812         },
 813         [REGSET_FPR] = {
 814                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
 815                 .size = sizeof(double), .align = sizeof(double),
 816                 .get = fpr_get, .set = fpr_set
 817         },
 818 #ifdef CONFIG_ALTIVEC
 819         [REGSET_VMX] = {
 820                 .core_note_type = NT_PPC_VMX, .n = 34,
 821                 .size = sizeof(vector128), .align = sizeof(vector128),
 822                 .active = vr_active, .get = vr_get, .set = vr_set
 823         },
 824 #endif
 825 #ifdef CONFIG_SPE
 826         [REGSET_SPE] = {
 827                 .core_note_type = NT_PPC_SPE, .n = 35,
 828                 .size = sizeof(u32), .align = sizeof(u32),
 829                 .active = evr_active, .get = evr_get, .set = evr_set
 830         },
 831 #endif
 832 };
 833
 834 static const struct user_regset_view user_ppc_compat_view = {
 835         .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
 836         .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
 837 };
 838 #endif  /* CONFIG_PPC64 */
 839
 840 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
 841 {
 842 #ifdef CONFIG_PPC64
 843         if (test_tsk_thread_flag(task, TIF_32BIT))
 844                 return &user_ppc_compat_view;
 845 #endif
 846         return &user_ppc_native_view;
 847 }
 848
 849
 850 void user_enable_single_step(struct task_struct *task)
 851 {
 852         struct pt_regs *regs = task->thread.regs;
 853
 854         if (regs != NULL) {
 855 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 856                 task->thread.dbcr0 &= ~DBCR0_BT;
 857                 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
 858                 regs->msr |= MSR_DE;
 859 #else
 860                 regs->msr &= ~MSR_BE;
 861                 regs->msr |= MSR_SE;
 862 #endif
 863         }
 864         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 865 }
 866
 867 void user_enable_block_step(struct task_struct *task)
 868 {
 869         struct pt_regs *regs = task->thread.regs;
 870
 871         if (regs != NULL) {
 872 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 873                 task->thread.dbcr0 &= ~DBCR0_IC;
 874                 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
 875                 regs->msr |= MSR_DE;
 876 #else
 877                 regs->msr &= ~MSR_SE;
 878                 regs->msr |= MSR_BE;
 879 #endif
 880         }
 881         set_tsk_thread_flag(task, TIF_SINGLESTEP);
 882 }
 883
 884 void user_disable_single_step(struct task_struct *task)
 885 {
 886         struct pt_regs *regs = task->thread.regs;
 887
 888         if (regs != NULL) {
 889 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 890                 /*
 891                  * The logic to disable single stepping should be as
 892                  * simple as turning off the Instruction Complete flag.
 893                  * And, after doing so, if all debug flags are off, turn
 894                  * off DBCR0(IDM) and MSR(DE) .... Torez
 895                  */
 896                 task->thread.dbcr0 &= ~DBCR0_IC;
 897                 /*
 898                  * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
 899                  */
 900                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
 901                                         task->thread.dbcr1)) {
 902                         /*
 903                          * All debug events were off.....
 904                          */
 905                         task->thread.dbcr0 &= ~DBCR0_IDM;
 906                         regs->msr &= ~MSR_DE;
 907                 }
 908 #else
 909                 regs->msr &= ~(MSR_SE | MSR_BE);
 910 #endif
 911         }
 912         clear_tsk_thread_flag(task, TIF_SINGLESTEP);
 913 }
 914
 915 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 916 void ptrace_triggered(struct perf_event *bp,
 917                       struct perf_sample_data *data, struct pt_regs *regs)
 918 {
 919         struct perf_event_attr attr;
 920
 921         /*
 922          * Disable the breakpoint request here since ptrace has defined a
 923          * one-shot behaviour for breakpoint exceptions in PPC64.
 924          * The SIGTRAP signal is generated automatically for us in do_dabr().
 925          * We don't have to do anything about that here
 926          */
 927         attr = bp->attr;
 928         attr.disabled = true;
 929         modify_user_hw_breakpoint(bp, &attr);
 930 }
 931 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 932
 933 int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
 934                                unsigned long data)
 935 {
 936 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 937         int ret;
 938         struct thread_struct *thread = &(task->thread);
 939         struct perf_event *bp;
 940         struct perf_event_attr attr;
 941 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
 942 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
 943         struct arch_hw_breakpoint hw_brk;
 944 #endif
 945
 946         /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
 947          *  For embedded processors we support one DAC and no IAC's at the
 948          *  moment.
 949          */
 950         if (addr > 0)
 951                 return -EINVAL;
 952
 953         /* The bottom 3 bits in dabr are flags */
 954         if ((data & ~0x7UL) >= TASK_SIZE)
 955                 return -EIO;
 956
 957 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
 958         /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
 959          *  It was assumed, on previous implementations, that 3 bits were
 960          *  passed together with the data address, fitting the design of the
 961          *  DABR register, as follows:
 962          *
 963          *  bit 0: Read flag
 964          *  bit 1: Write flag
 965          *  bit 2: Breakpoint translation
 966          *
 967          *  Thus, we use them here as so.
 968          */
 969
 970         /* Ensure breakpoint translation bit is set */
 971         if (data && !(data & HW_BRK_TYPE_TRANSLATE))
 972                 return -EIO;
 973         hw_brk.address = data & (~HW_BRK_TYPE_DABR);
 974         hw_brk.type = (data & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
 975         hw_brk.len = 8;
 976 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 977         if (ptrace_get_breakpoints(task) < 0)
 978                 return -ESRCH;
 979
 980         bp = thread->ptrace_bps[0];
 981         if ((!data) || !(hw_brk.type & HW_BRK_TYPE_RDWR)) {
 982                 if (bp) {
 983                         unregister_hw_breakpoint(bp);
 984                         thread->ptrace_bps[0] = NULL;
 985                 }
 986                 ptrace_put_breakpoints(task);
 987                 return 0;
 988         }
 989         if (bp) {
 990                 attr = bp->attr;
 991                 attr.bp_addr = hw_brk.address;
 992                 arch_bp_generic_fields(hw_brk.type, &attr.bp_type);
 993
 994                 /* Enable breakpoint */
 995                 attr.disabled = false;
 996
 997                 ret =  modify_user_hw_breakpoint(bp, &attr);
 998                 if (ret) {
 999                         ptrace_put_breakpoints(task);
1000                         return ret;
1001                 }
1002                 thread->ptrace_bps[0] = bp;
1003                 ptrace_put_breakpoints(task);
1004                 thread->hw_brk = hw_brk;
1005                 return 0;
1006         }
1007
1008         /* Create a new breakpoint request if one doesn't exist already */
1009         hw_breakpoint_init(&attr);
1010         attr.bp_addr = hw_brk.address;
1011         arch_bp_generic_fields(hw_brk.type,
1012                                &attr.bp_type);
1013
1014         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
1015                                                ptrace_triggered, NULL, task);
1016         if (IS_ERR(bp)) {
1017                 thread->ptrace_bps[0] = NULL;
1018                 ptrace_put_breakpoints(task);
1019                 return PTR_ERR(bp);
1020         }
1021
1022         ptrace_put_breakpoints(task);
1023
1024 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1025         task->thread.hw_brk = hw_brk;
1026 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
1027         /* As described above, it was assumed 3 bits were passed with the data
1028          *  address, but we will assume only the mode bits will be passed
1029          *  as to not cause alignment restrictions for DAC-based processors.
1030          */
1031
1032         /* DAC's hold the whole address without any mode flags */
1033         task->thread.dac1 = data & ~0x3UL;
1034
1035         if (task->thread.dac1 == 0) {
1036                 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1037                 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
1038                                         task->thread.dbcr1)) {
1039                         task->thread.regs->msr &= ~MSR_DE;
1040                         task->thread.dbcr0 &= ~DBCR0_IDM;
1041                 }
1042                 return 0;
1043         }
1044
1045         /* Read or Write bits must be set */
1046
1047         if (!(data & 0x3UL))
1048                 return -EINVAL;
1049
1050         /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
1051            register */
1052         task->thread.dbcr0 |= DBCR0_IDM;
1053
1054         /* Check for write and read flags and set DBCR0
1055            accordingly */
1056         dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
1057         if (data & 0x1UL)
1058                 dbcr_dac(task) |= DBCR_DAC1R;
1059         if (data & 0x2UL)
1060                 dbcr_dac(task) |= DBCR_DAC1W;
1061         task->thread.regs->msr |= MSR_DE;
1062 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1063         return 0;
1064 }
1065
1066 /*
1067  * Called by kernel/ptrace.c when detaching..
1068  *
1069  * Make sure single step bits etc are not set.
1070  */
1071 void ptrace_disable(struct task_struct *child)
1072 {
1073         /* make sure the single step bit is not set. */
1074         user_disable_single_step(child);
1075 }
1076
1077 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1078 static long set_instruction_bp(struct task_struct *child,
1079                               struct ppc_hw_breakpoint *bp_info)
1080 {
1081         int slot;
1082         int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
1083         int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
1084         int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
1085         int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
1086
1087         if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1088                 slot2_in_use = 1;
1089         if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1090                 slot4_in_use = 1;
1091
1092         if (bp_info->addr >= TASK_SIZE)
1093                 return -EIO;
1094
1095         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
1096
1097                 /* Make sure range is valid. */
1098                 if (bp_info->addr2 >= TASK_SIZE)
1099                         return -EIO;
1100
1101                 /* We need a pair of IAC regsisters */
1102                 if ((!slot1_in_use) && (!slot2_in_use)) {
1103                         slot = 1;
1104                         child->thread.iac1 = bp_info->addr;
1105                         child->thread.iac2 = bp_info->addr2;
1106                         child->thread.dbcr0 |= DBCR0_IAC1;
1107                         if (bp_info->addr_mode ==
1108                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1109                                 dbcr_iac_range(child) |= DBCR_IAC12X;
1110                         else
1111                                 dbcr_iac_range(child) |= DBCR_IAC12I;
1112 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1113                 } else if ((!slot3_in_use) && (!slot4_in_use)) {
1114                         slot = 3;
1115                         child->thread.iac3 = bp_info->addr;
1116                         child->thread.iac4 = bp_info->addr2;
1117                         child->thread.dbcr0 |= DBCR0_IAC3;
1118                         if (bp_info->addr_mode ==
1119                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1120                                 dbcr_iac_range(child) |= DBCR_IAC34X;
1121                         else
1122                                 dbcr_iac_range(child) |= DBCR_IAC34I;
1123 #endif
1124                 } else
1125                         return -ENOSPC;
1126         } else {
1127                 /* We only need one.  If possible leave a pair free in
1128                  * case a range is needed later
1129                  */
1130                 if (!slot1_in_use) {
1131                         /*
1132                          * Don't use iac1 if iac1-iac2 are free and either
1133                          * iac3 or iac4 (but not both) are free
1134                          */
1135                         if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
1136                                 slot = 1;
1137                                 child->thread.iac1 = bp_info->addr;
1138                                 child->thread.dbcr0 |= DBCR0_IAC1;
1139                                 goto out;
1140                         }
1141                 }
1142                 if (!slot2_in_use) {
1143                         slot = 2;
1144                         child->thread.iac2 = bp_info->addr;
1145                         child->thread.dbcr0 |= DBCR0_IAC2;
1146 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1147                 } else if (!slot3_in_use) {
1148                         slot = 3;
1149                         child->thread.iac3 = bp_info->addr;
1150                         child->thread.dbcr0 |= DBCR0_IAC3;
1151                 } else if (!slot4_in_use) {
1152                         slot = 4;
1153                         child->thread.iac4 = bp_info->addr;
1154                         child->thread.dbcr0 |= DBCR0_IAC4;
1155 #endif
1156                 } else
1157                         return -ENOSPC;
1158         }
1159 out:
1160         child->thread.dbcr0 |= DBCR0_IDM;
1161         child->thread.regs->msr |= MSR_DE;
1162
1163         return slot;
1164 }
1165
1166 static int del_instruction_bp(struct task_struct *child, int slot)
1167 {
1168         switch (slot) {
1169         case 1:
1170                 if ((child->thread.dbcr0 & DBCR0_IAC1) == 0)
1171                         return -ENOENT;
1172
1173                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
1174                         /* address range - clear slots 1 & 2 */
1175                         child->thread.iac2 = 0;
1176                         dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
1177                 }
1178                 child->thread.iac1 = 0;
1179                 child->thread.dbcr0 &= ~DBCR0_IAC1;
1180                 break;
1181         case 2:
1182                 if ((child->thread.dbcr0 & DBCR0_IAC2) == 0)
1183                         return -ENOENT;
1184
1185                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
1186                         /* used in a range */
1187                         return -EINVAL;
1188                 child->thread.iac2 = 0;
1189                 child->thread.dbcr0 &= ~DBCR0_IAC2;
1190                 break;
1191 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1192         case 3:
1193                 if ((child->thread.dbcr0 & DBCR0_IAC3) == 0)
1194                         return -ENOENT;
1195
1196                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
1197                         /* address range - clear slots 3 & 4 */
1198                         child->thread.iac4 = 0;
1199                         dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
1200                 }
1201                 child->thread.iac3 = 0;
1202                 child->thread.dbcr0 &= ~DBCR0_IAC3;
1203                 break;
1204         case 4:
1205                 if ((child->thread.dbcr0 & DBCR0_IAC4) == 0)
1206                         return -ENOENT;
1207
1208                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
1209                         /* Used in a range */
1210                         return -EINVAL;
1211                 child->thread.iac4 = 0;
1212                 child->thread.dbcr0 &= ~DBCR0_IAC4;
1213                 break;
1214 #endif
1215         default:
1216                 return -EINVAL;
1217         }
1218         return 0;
1219 }
1220
1221 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
1222 {
1223         int byte_enable =
1224                 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
1225                 & 0xf;
1226         int condition_mode =
1227                 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1228         int slot;
1229
1230         if (byte_enable && (condition_mode == 0))
1231                 return -EINVAL;
1232
1233         if (bp_info->addr >= TASK_SIZE)
1234                 return -EIO;
1235
1236         if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1237                 slot = 1;
1238                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1239                         dbcr_dac(child) |= DBCR_DAC1R;
1240                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1241                         dbcr_dac(child) |= DBCR_DAC1W;
1242                 child->thread.dac1 = (unsigned long)bp_info->addr;
1243 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1244                 if (byte_enable) {
1245                         child->thread.dvc1 =
1246                                 (unsigned long)bp_info->condition_value;
1247                         child->thread.dbcr2 |=
1248                                 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1249                                  (condition_mode << DBCR2_DVC1M_SHIFT));
1250                 }
1251 #endif
1252 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1253         } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1254                 /* Both dac1 and dac2 are part of a range */
1255                 return -ENOSPC;
1256 #endif
1257         } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1258                 slot = 2;
1259                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1260                         dbcr_dac(child) |= DBCR_DAC2R;
1261                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1262                         dbcr_dac(child) |= DBCR_DAC2W;
1263                 child->thread.dac2 = (unsigned long)bp_info->addr;
1264 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1265                 if (byte_enable) {
1266                         child->thread.dvc2 =
1267                                 (unsigned long)bp_info->condition_value;
1268                         child->thread.dbcr2 |=
1269                                 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1270                                  (condition_mode << DBCR2_DVC2M_SHIFT));
1271                 }
1272 #endif
1273         } else
1274                 return -ENOSPC;
1275         child->thread.dbcr0 |= DBCR0_IDM;
1276         child->thread.regs->msr |= MSR_DE;
1277
1278         return slot + 4;
1279 }
1280
1281 static int del_dac(struct task_struct *child, int slot)
1282 {
1283         if (slot == 1) {
1284                 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
1285                         return -ENOENT;
1286
1287                 child->thread.dac1 = 0;
1288                 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1289 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1290                 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1291                         child->thread.dac2 = 0;
1292                         child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1293                 }
1294                 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1295 #endif
1296 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1297                 child->thread.dvc1 = 0;
1298 #endif
1299         } else if (slot == 2) {
1300                 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
1301                         return -ENOENT;
1302
1303 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1304                 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1305                         /* Part of a range */
1306                         return -EINVAL;
1307                 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1308 #endif
1309 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1310                 child->thread.dvc2 = 0;
1311 #endif
1312                 child->thread.dac2 = 0;
1313                 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1314         } else
1315                 return -EINVAL;
1316
1317         return 0;
1318 }
1319 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1320
1321 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1322 static int set_dac_range(struct task_struct *child,
1323                          struct ppc_hw_breakpoint *bp_info)
1324 {
1325         int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1326
1327         /* We don't allow range watchpoints to be used with DVC */
1328         if (bp_info->condition_mode)
1329                 return -EINVAL;
1330
1331         /*
1332          * Best effort to verify the address range.  The user/supervisor bits
1333          * prevent trapping in kernel space, but let's fail on an obvious bad
1334          * range.  The simple test on the mask is not fool-proof, and any
1335          * exclusive range will spill over into kernel space.
1336          */
1337         if (bp_info->addr >= TASK_SIZE)
1338                 return -EIO;
1339         if (mode == PPC_BREAKPOINT_MODE_MASK) {
1340                 /*
1341                  * dac2 is a bitmask.  Don't allow a mask that makes a
1342                  * kernel space address from a valid dac1 value
1343                  */
1344                 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1345                         return -EIO;
1346         } else {
1347                 /*
1348                  * For range breakpoints, addr2 must also be a valid address
1349                  */
1350                 if (bp_info->addr2 >= TASK_SIZE)
1351                         return -EIO;
1352         }
1353
1354         if (child->thread.dbcr0 &
1355             (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1356                 return -ENOSPC;
1357
1358         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1359                 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1360         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1361                 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1362         child->thread.dac1 = bp_info->addr;
1363         child->thread.dac2 = bp_info->addr2;
1364         if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1365                 child->thread.dbcr2  |= DBCR2_DAC12M;
1366         else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1367                 child->thread.dbcr2  |= DBCR2_DAC12MX;
1368         else    /* PPC_BREAKPOINT_MODE_MASK */
1369                 child->thread.dbcr2  |= DBCR2_DAC12MM;
1370         child->thread.regs->msr |= MSR_DE;
1371
1372         return 5;
1373 }
1374 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1375
1376 static long ppc_set_hwdebug(struct task_struct *child,
1377                      struct ppc_hw_breakpoint *bp_info)
1378 {
1379 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1380         int len = 0;
1381         struct thread_struct *thread = &(child->thread);
1382         struct perf_event *bp;
1383         struct perf_event_attr attr;
1384 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1385 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
1386         struct arch_hw_breakpoint brk;
1387 #endif
1388
1389         if (bp_info->version != 1)
1390                 return -ENOTSUPP;
1391 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1392         /*
1393          * Check for invalid flags and combinations
1394          */
1395         if ((bp_info->trigger_type == 0) ||
1396             (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1397                                        PPC_BREAKPOINT_TRIGGER_RW)) ||
1398             (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1399             (bp_info->condition_mode &
1400              ~(PPC_BREAKPOINT_CONDITION_MODE |
1401                PPC_BREAKPOINT_CONDITION_BE_ALL)))
1402                 return -EINVAL;
1403 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1404         if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1405                 return -EINVAL;
1406 #endif
1407
1408         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1409                 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1410                     (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1411                         return -EINVAL;
1412                 return set_instruction_bp(child, bp_info);
1413         }
1414         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1415                 return set_dac(child, bp_info);
1416
1417 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1418         return set_dac_range(child, bp_info);
1419 #else
1420         return -EINVAL;
1421 #endif
1422 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1423         /*
1424          * We only support one data breakpoint
1425          */
1426         if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
1427             (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
1428             bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1429                 return -EINVAL;
1430
1431         if ((unsigned long)bp_info->addr >= TASK_SIZE)
1432                 return -EIO;
1433
1434         brk.address = bp_info->addr & ~7UL;
1435         brk.type = HW_BRK_TYPE_TRANSLATE;
1436         brk.len = 8;
1437         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1438                 brk.type |= HW_BRK_TYPE_READ;
1439         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1440                 brk.type |= HW_BRK_TYPE_WRITE;
1441 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1442         if (ptrace_get_breakpoints(child) < 0)
1443                 return -ESRCH;
1444
1445         /*
1446          * Check if the request is for 'range' breakpoints. We can
1447          * support it if range < 8 bytes.
1448          */
1449         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE) {
1450                 len = bp_info->addr2 - bp_info->addr;
1451         } else if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
1452                 ptrace_put_breakpoints(child);
1453                 return -EINVAL;
1454         }
1455         bp = thread->ptrace_bps[0];
1456         if (bp) {
1457                 ptrace_put_breakpoints(child);
1458                 return -ENOSPC;
1459         }
1460
1461         /* Create a new breakpoint request if one doesn't exist already */
1462         hw_breakpoint_init(&attr);
1463         attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN;
1464         attr.bp_len = len;
1465         arch_bp_generic_fields(brk.type, &attr.bp_type);
1466
1467         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
1468                                                ptrace_triggered, NULL, child);
1469         if (IS_ERR(bp)) {
1470                 thread->ptrace_bps[0] = NULL;
1471                 ptrace_put_breakpoints(child);
1472                 return PTR_ERR(bp);
1473         }
1474
1475         ptrace_put_breakpoints(child);
1476         return 1;
1477 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1478
1479         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT)
1480                 return -EINVAL;
1481
1482         if (child->thread.hw_brk.address)
1483                 return -ENOSPC;
1484
1485         child->thread.hw_brk = brk;
1486
1487         return 1;
1488 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1489 }
1490
1491 static long ppc_del_hwdebug(struct task_struct *child, long data)
1492 {
1493 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1494         int ret = 0;
1495         struct thread_struct *thread = &(child->thread);
1496         struct perf_event *bp;
1497 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1498 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1499         int rc;
1500
1501         if (data <= 4)
1502                 rc = del_instruction_bp(child, (int)data);
1503         else
1504                 rc = del_dac(child, (int)data - 4);
1505
1506         if (!rc) {
1507                 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1508                                         child->thread.dbcr1)) {
1509                         child->thread.dbcr0 &= ~DBCR0_IDM;
1510                         child->thread.regs->msr &= ~MSR_DE;
1511                 }
1512         }
1513         return rc;
1514 #else
1515         if (data != 1)
1516                 return -EINVAL;
1517
1518 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1519         if (ptrace_get_breakpoints(child) < 0)
1520                 return -ESRCH;
1521
1522         bp = thread->ptrace_bps[0];
1523         if (bp) {
1524                 unregister_hw_breakpoint(bp);
1525                 thread->ptrace_bps[0] = NULL;
1526         } else
1527                 ret = -ENOENT;
1528         ptrace_put_breakpoints(child);
1529         return ret;
1530 #else /* CONFIG_HAVE_HW_BREAKPOINT */
1531         if (child->thread.hw_brk.address == 0)
1532                 return -ENOENT;
1533
1534         child->thread.hw_brk.address = 0;
1535         child->thread.hw_brk.type = 0;
1536 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1537
1538         return 0;
1539 #endif
1540 }
1541
1542 long arch_ptrace(struct task_struct *child, long request,
1543                  unsigned long addr, unsigned long data)
1544 {
1545         int ret = -EPERM;
1546         void __user *datavp = (void __user *) data;
1547         unsigned long __user *datalp = datavp;
1548
1549         switch (request) {
1550         /* read the word at location addr in the USER area. */
1551         case PTRACE_PEEKUSR: {
1552                 unsigned long index, tmp;
1553
1554                 ret = -EIO;
1555                 /* convert to index and check */
1556 #ifdef CONFIG_PPC32
1557                 index = addr >> 2;
1558                 if ((addr & 3) || (index > PT_FPSCR)
1559                     || (child->thread.regs == NULL))
1560 #else
1561                 index = addr >> 3;
1562                 if ((addr & 7) || (index > PT_FPSCR))
1563 #endif
1564                         break;
1565
1566                 CHECK_FULL_REGS(child->thread.regs);
1567                 if (index < PT_FPR0) {
1568                         ret = ptrace_get_reg(child, (int) index, &tmp);
1569                         if (ret)
1570                                 break;
1571                 } else {
1572                         unsigned int fpidx = index - PT_FPR0;
1573
1574                         flush_fp_to_thread(child);
1575                         if (fpidx < (PT_FPSCR - PT_FPR0))
1576                                 tmp = ((unsigned long *)child->thread.fpr)
1577                                         [fpidx * TS_FPRWIDTH];
1578                         else
1579                                 tmp = child->thread.fpscr.val;
1580                 }
1581                 ret = put_user(tmp, datalp);
1582                 break;
1583         }
1584
1585         /* write the word at location addr in the USER area */
1586         case PTRACE_POKEUSR: {
1587                 unsigned long index;
1588
1589                 ret = -EIO;
1590                 /* convert to index and check */
1591 #ifdef CONFIG_PPC32
1592                 index = addr >> 2;
1593                 if ((addr & 3) || (index > PT_FPSCR)
1594                     || (child->thread.regs == NULL))
1595 #else
1596                 index = addr >> 3;
1597                 if ((addr & 7) || (index > PT_FPSCR))
1598 #endif
1599                         break;
1600
1601                 CHECK_FULL_REGS(child->thread.regs);
1602                 if (index < PT_FPR0) {
1603                         ret = ptrace_put_reg(child, index, data);
1604                 } else {
1605                         unsigned int fpidx = index - PT_FPR0;
1606
1607                         flush_fp_to_thread(child);
1608                         if (fpidx < (PT_FPSCR - PT_FPR0))
1609                                 ((unsigned long *)child->thread.fpr)
1610                                         [fpidx * TS_FPRWIDTH] = data;
1611                         else
1612                                 child->thread.fpscr.val = data;
1613                         ret = 0;
1614                 }
1615                 break;
1616         }
1617
1618         case PPC_PTRACE_GETHWDBGINFO: {
1619                 struct ppc_debug_info dbginfo;
1620
1621                 dbginfo.version = 1;
1622 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1623                 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1624                 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1625                 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1626                 dbginfo.data_bp_alignment = 4;
1627                 dbginfo.sizeof_condition = 4;
1628                 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1629                                    PPC_DEBUG_FEATURE_INSN_BP_MASK;
1630 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1631                 dbginfo.features |=
1632                                    PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1633                                    PPC_DEBUG_FEATURE_DATA_BP_MASK;
1634 #endif
1635 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1636                 dbginfo.num_instruction_bps = 0;
1637                 dbginfo.num_data_bps = 1;
1638                 dbginfo.num_condition_regs = 0;
1639 #ifdef CONFIG_PPC64
1640                 dbginfo.data_bp_alignment = 8;
1641 #else
1642                 dbginfo.data_bp_alignment = 4;
1643 #endif
1644                 dbginfo.sizeof_condition = 0;
1645 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1646                 dbginfo.features = PPC_DEBUG_FEATURE_DATA_BP_RANGE;
1647                 if (cpu_has_feature(CPU_FTR_DAWR))
1648                         dbginfo.features |= PPC_DEBUG_FEATURE_DATA_BP_DAWR;
1649 #else
1650                 dbginfo.features = 0;
1651 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1652 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1653
1654                 if (!access_ok(VERIFY_WRITE, datavp,
1655                                sizeof(struct ppc_debug_info)))
1656                         return -EFAULT;
1657                 ret = __copy_to_user(datavp, &dbginfo,
1658                                      sizeof(struct ppc_debug_info)) ?
1659                       -EFAULT : 0;
1660                 break;
1661         }
1662
1663         case PPC_PTRACE_SETHWDEBUG: {
1664                 struct ppc_hw_breakpoint bp_info;
1665
1666                 if (!access_ok(VERIFY_READ, datavp,
1667                                sizeof(struct ppc_hw_breakpoint)))
1668                         return -EFAULT;
1669                 ret = __copy_from_user(&bp_info, datavp,
1670                                        sizeof(struct ppc_hw_breakpoint)) ?
1671                       -EFAULT : 0;
1672                 if (!ret)
1673                         ret = ppc_set_hwdebug(child, &bp_info);
1674                 break;
1675         }
1676
1677         case PPC_PTRACE_DELHWDEBUG: {
1678                 ret = ppc_del_hwdebug(child, data);
1679                 break;
1680         }
1681
1682         case PTRACE_GET_DEBUGREG: {
1683 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
1684                 unsigned long dabr_fake;
1685 #endif
1686                 ret = -EINVAL;
1687                 /* We only support one DABR and no IABRS at the moment */
1688                 if (addr > 0)
1689                         break;
1690 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
1691                 ret = put_user(child->thread.dac1, datalp);
1692 #else
1693                 dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
1694                              (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
1695                 ret = put_user(dabr_fake, datalp);
1696 #endif
1697                 break;
1698         }
1699
1700         case PTRACE_SET_DEBUGREG:
1701                 ret = ptrace_set_debugreg(child, addr, data);
1702                 break;
1703
1704 #ifdef CONFIG_PPC64
1705         case PTRACE_GETREGS64:
1706 #endif
1707         case PTRACE_GETREGS:    /* Get all pt_regs from the child. */
1708                 return copy_regset_to_user(child, &user_ppc_native_view,
1709                                            REGSET_GPR,
1710                                            0, sizeof(struct pt_regs),
1711                                            datavp);
1712
1713 #ifdef CONFIG_PPC64
1714         case PTRACE_SETREGS64:
1715 #endif
1716         case PTRACE_SETREGS:    /* Set all gp regs in the child. */
1717                 return copy_regset_from_user(child, &user_ppc_native_view,
1718                                              REGSET_GPR,
1719                                              0, sizeof(struct pt_regs),
1720                                              datavp);
1721
1722         case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
1723                 return copy_regset_to_user(child, &user_ppc_native_view,
1724                                            REGSET_FPR,
1725                                            0, sizeof(elf_fpregset_t),
1726                                            datavp);
1727
1728         case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
1729                 return copy_regset_from_user(child, &user_ppc_native_view,
1730                                              REGSET_FPR,
1731                                              0, sizeof(elf_fpregset_t),
1732                                              datavp);
1733
1734 #ifdef CONFIG_ALTIVEC
1735         case PTRACE_GETVRREGS:
1736                 return copy_regset_to_user(child, &user_ppc_native_view,
1737                                            REGSET_VMX,
1738                                            0, (33 * sizeof(vector128) +
1739                                                sizeof(u32)),
1740                                            datavp);
1741
1742         case PTRACE_SETVRREGS:
1743                 return copy_regset_from_user(child, &user_ppc_native_view,
1744                                              REGSET_VMX,
1745                                              0, (33 * sizeof(vector128) +
1746                                                  sizeof(u32)),
1747                                              datavp);
1748 #endif
1749 #ifdef CONFIG_VSX
1750         case PTRACE_GETVSRREGS:
1751                 return copy_regset_to_user(child, &user_ppc_native_view,
1752                                            REGSET_VSX,
1753                                            0, 32 * sizeof(double),
1754                                            datavp);
1755
1756         case PTRACE_SETVSRREGS:
1757                 return copy_regset_from_user(child, &user_ppc_native_view,
1758                                              REGSET_VSX,
1759                                              0, 32 * sizeof(double),
1760                                              datavp);
1761 #endif
1762 #ifdef CONFIG_SPE
1763         case PTRACE_GETEVRREGS:
1764                 /* Get the child spe register state. */
1765                 return copy_regset_to_user(child, &user_ppc_native_view,
1766                                            REGSET_SPE, 0, 35 * sizeof(u32),
1767                                            datavp);
1768
1769         case PTRACE_SETEVRREGS:
1770                 /* Set the child spe register state. */
1771                 return copy_regset_from_user(child, &user_ppc_native_view,
1772                                              REGSET_SPE, 0, 35 * sizeof(u32),
1773                                              datavp);
1774 #endif
1775
1776         default:
1777                 ret = ptrace_request(child, request, addr, data);
1778                 break;
1779         }
1780         return ret;
1781 }
1782
1783 /*
1784  * We must return the syscall number to actually look up in the table.
1785  * This can be -1L to skip running any syscall at all.
1786  */
1787 long do_syscall_trace_enter(struct pt_regs *regs)
1788 {
1789         long ret = 0;
1790
1791         secure_computing_strict(regs->gpr[0]);
1792
1793         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
1794             tracehook_report_syscall_entry(regs))
1795                 /*
1796                  * Tracing decided this syscall should not happen.
1797                  * We'll return a bogus call number to get an ENOSYS
1798                  * error, but leave the original number in regs->gpr[0].
1799                  */
1800                 ret = -1L;
1801
1802         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1803                 trace_sys_enter(regs, regs->gpr[0]);
1804
1805 #ifdef CONFIG_PPC64
1806         if (!is_32bit_task())
1807                 audit_syscall_entry(AUDIT_ARCH_PPC64,
1808                                     regs->gpr[0],
1809                                     regs->gpr[3], regs->gpr[4],
1810                                     regs->gpr[5], regs->gpr[6]);
1811         else
1812 #endif
1813                 audit_syscall_entry(AUDIT_ARCH_PPC,
1814                                     regs->gpr[0],
1815                                     regs->gpr[3] & 0xffffffff,
1816                                     regs->gpr[4] & 0xffffffff,
1817                                     regs->gpr[5] & 0xffffffff,
1818                                     regs->gpr[6] & 0xffffffff);
1819
1820         return ret ?: regs->gpr[0];
1821 }
1822
1823 void do_syscall_trace_leave(struct pt_regs *regs)
1824 {
1825         int step;
1826
1827         audit_syscall_exit(regs);
1828
1829         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
1830                 trace_sys_exit(regs, regs->result);
1831
1832         step = test_thread_flag(TIF_SINGLESTEP);
1833         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1834                 tracehook_report_syscall_exit(regs, step);
1835 }