3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
29 #include <asm/ppc_asm.h>
30 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
33 #include <asm/setup.h>
34 #include <asm/hvcall.h>
35 #include <asm/iseries/lpar_map.h>
36 #include <asm/thread_info.h>
37 #include <asm/firmware.h>
38 #include <asm/page_64.h>
39 #include <asm/irqflags.h>
40 #include <asm/kvm_book3s_asm.h>
41 #include <asm/ptrace.h>
43 /* The physical memory is layed out such that the secondary processor
44 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
45 * using the layout described in exceptions-64s.S
49 * Entering into this code we make the following assumptions:
51 * For pSeries or server processors:
52 * 1. The MMU is off & open firmware is running in real mode.
53 * 2. The kernel is entered at __start
56 * 1. The MMU is on (as it always is for iSeries)
57 * 2. The kernel is entered at system_reset_iSeries
59 * For Book3E processors:
60 * 1. The MMU is on running in AS0 in a state defined in ePAPR
61 * 2. The kernel is entered at __start
68 /* NOP this out unconditionally */
70 b .__start_initialization_multiplatform
73 /* Catch branch to 0 in real mode */
76 /* Secondary processors spin on this value until it becomes nonzero.
77 * When it does it contains the real address of the descriptor
78 * of the function that the cpu should jump to to continue
81 .globl __secondary_hold_spinloop
82 __secondary_hold_spinloop:
85 /* Secondary processors write this value with their cpu # */
86 /* after they enter the spin loop immediately below. */
87 .globl __secondary_hold_acknowledge
88 __secondary_hold_acknowledge:
91 #ifdef CONFIG_PPC_ISERIES
93 * At offset 0x20, there is a pointer to iSeries LPAR data.
94 * This is required by the hypervisor
97 .llong hvReleaseData-KERNELBASE
98 #endif /* CONFIG_PPC_ISERIES */
100 #ifdef CONFIG_CRASH_DUMP
101 /* This flag is set to 1 by a loader if the kernel should run
102 * at the loaded address instead of the linked address. This
103 * is used by kexec-tools to keep the the kdump kernel in the
104 * crash_kernel region. The loader is responsible for
105 * observing the alignment requirement.
107 /* Do not move this variable as kexec-tools knows about it. */
111 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
116 * The following code is used to hold secondary processors
117 * in a spin loop after they have entered the kernel, but
118 * before the bulk of the kernel has been relocated. This code
119 * is relocated to physical address 0x60 before prom_init is run.
120 * All of it must fit below the first exception vector at 0x100.
121 * Use .globl here not _GLOBAL because we want __secondary_hold
122 * to be the actual text address, not a descriptor.
124 .globl __secondary_hold
126 #ifndef CONFIG_PPC_BOOK3E
129 mtmsrd r24 /* RI on */
131 /* Grab our physical cpu number */
134 /* Tell the master cpu we're here */
135 /* Relocation is off & we are located at an address less */
136 /* than 0x100, so only need to grab low order offset. */
137 std r24,__secondary_hold_acknowledge-_stext(0)
140 /* All secondary cpus wait here until told to start. */
141 100: ld r4,__secondary_hold_spinloop-_stext(0)
145 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
146 ld r4,0(r4) /* deref function descriptor */
155 /* This value is used to mark exception frames on the stack. */
158 .tc ID_72656773_68657265[TC],0x7265677368657265
162 * On server, we include the exception vectors code here as it
163 * relies on absolute addressing which is only possible within
164 * this compilation unit
166 #ifdef CONFIG_PPC_BOOK3S
167 #include "exceptions-64s.S"
170 _GLOBAL(generic_secondary_thread_init)
173 /* turn on 64-bit mode */
176 /* get a valid TOC pointer, wherever we're mapped at */
179 #ifdef CONFIG_PPC_BOOK3E
180 /* Book3E initialization */
182 bl .book3e_secondary_thread_init
184 b generic_secondary_common_init
187 * On pSeries and most other platforms, secondary processors spin
188 * in the following code.
189 * At entry, r3 = this processor's number (physical cpu id)
191 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
192 * this core already exists (setup via some other mechanism such
193 * as SCOM before entry).
195 _GLOBAL(generic_secondary_smp_init)
199 /* turn on 64-bit mode */
202 /* get a valid TOC pointer, wherever we're mapped at */
205 #ifdef CONFIG_PPC_BOOK3E
206 /* Book3E initialization */
209 bl .book3e_secondary_core_init
212 generic_secondary_common_init:
213 /* Set up a paca value for this processor. Since we have the
214 * physical cpu id in r24, we need to search the pacas to find
215 * which logical id maps to our physical one.
217 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
218 ld r13,0(r13) /* Get base vaddr of paca array */
219 li r5,0 /* logical cpu id */
220 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
221 cmpw r6,r24 /* Compare to our id */
223 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
228 mr r3,r24 /* not found, copy phys to r3 */
229 b .kexec_wait /* next kernel might do better */
231 2: mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG */
232 #ifdef CONFIG_PPC_BOOK3E
233 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
234 mtspr SPRN_SPRG_TLB_EXFRAME,r12
237 /* From now on, r24 is expected to be logical cpuid */
240 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
244 b 3b /* Never go on non-SMP */
247 beq 3b /* Loop until told to go */
249 sync /* order paca.run and cur_cpu_spec */
251 /* See if we need to call a cpu state restore handler */
252 LOAD_REG_ADDR(r23, cur_cpu_spec)
254 ld r23,CPU_SPEC_RESTORE(r23)
261 4: /* Create a temp kernel stack for use before relocation is on. */
262 ld r1,PACAEMERGSP(r13)
263 subi r1,r1,STACK_FRAME_OVERHEAD
270 * Assumes we're mapped EA == RA if the MMU is on.
272 #ifdef CONFIG_PPC_BOOK3S
275 andi. r0,r3,MSR_IR|MSR_DR
283 b . /* prevent speculative execution */
288 * Here is our main kernel entry point. We support currently 2 kind of entries
289 * depending on the value of r5.
291 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
294 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
295 * DT block, r4 is a physical pointer to the kernel itself
298 _GLOBAL(__start_initialization_multiplatform)
299 /* Make sure we are running in 64 bits mode */
302 /* Get TOC pointer (current runtime address) */
305 /* find out where we are now */
307 0: mflr r26 /* r26 = runtime addr here */
308 addis r26,r26,(_stext - 0b)@ha
309 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
312 * Are we booted from a PROM Of-type client-interface ?
316 b .__boot_from_prom /* yes -> prom */
318 /* Save parameters */
322 #ifdef CONFIG_PPC_BOOK3E
323 bl .start_initialization_book3e
324 b .__after_prom_start
326 /* Setup some critical 970 SPRs before switching MMU off */
329 cmpwi r0,0x39 /* 970 */
331 cmpwi r0,0x3c /* 970FX */
333 cmpwi r0,0x44 /* 970MP */
335 cmpwi r0,0x45 /* 970GX */
337 1: bl .__cpu_preinit_ppc970
340 /* Switch off MMU if not already off */
342 b .__after_prom_start
343 #endif /* CONFIG_PPC_BOOK3E */
345 _INIT_STATIC(__boot_from_prom)
346 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
347 /* Save parameters */
355 * Align the stack to 16-byte boundary
356 * Depending on the size and layout of the ELF sections in the initial
357 * boot binary, the stack pointer may be unaligned on PowerMac
361 #ifdef CONFIG_RELOCATABLE
362 /* Relocate code for where we are now */
367 /* Restore parameters */
374 /* Do all of the interaction with OF client interface */
377 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
379 /* We never return. We also hit that trap if trying to boot
380 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
383 _STATIC(__after_prom_start)
384 #ifdef CONFIG_RELOCATABLE
385 /* process relocations for the final address of the kernel */
386 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
388 #ifdef CONFIG_CRASH_DUMP
389 lwz r7,__run_at_load-_stext(r26)
390 cmplwi cr0,r7,1 /* kdump kernel ? - stay where we are */
399 * We need to run with _stext at physical address PHYSICAL_START.
400 * This will leave some code in the first 256B of
401 * real memory, which are reserved for software use.
403 * Note: This process overwrites the OF exception vectors.
405 li r3,0 /* target addr */
406 #ifdef CONFIG_PPC_BOOK3E
407 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
409 mr. r4,r26 /* In some cases the loader may */
410 beq 9f /* have already put us at zero */
411 li r6,0x100 /* Start offset, the first 0x100 */
412 /* bytes were copied earlier. */
413 #ifdef CONFIG_PPC_BOOK3E
414 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */
417 #ifdef CONFIG_CRASH_DUMP
419 * Check if the kernel has to be running as relocatable kernel based on the
420 * variable __run_at_load, if it is set the kernel is treated as relocatable
421 * kernel, otherwise it will be moved to PHYSICAL_START
423 lwz r7,__run_at_load-_stext(r26)
427 li r5,__end_interrupts - _stext /* just copy interrupts */
431 lis r5,(copy_to_here - _stext)@ha
432 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
434 bl .copy_and_flush /* copy the first n bytes */
435 /* this includes the code being */
437 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
438 addi r8,r8,(4f - _stext)@l /* that we just made */
442 p_end: .llong _end - _stext
444 4: /* Now copy the rest of the kernel up to _end */
445 addis r5,r26,(p_end - _stext)@ha
446 ld r5,(p_end - _stext)@l(r5) /* get _end */
447 5: bl .copy_and_flush /* copy the rest */
449 9: b .start_here_multiplatform
452 * Copy routine used to copy the kernel to start at physical address 0
453 * and flush and invalidate the caches as needed.
454 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
455 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
457 * Note: this routine *only* clobbers r0, r6 and lr
459 _GLOBAL(copy_and_flush)
462 4: li r0,8 /* Use the smallest common */
463 /* denominator cache line */
464 /* size. This results in */
465 /* extra cache line flushes */
466 /* but operation is correct. */
467 /* Can't get cache line size */
468 /* from NACA as it is being */
471 mtctr r0 /* put # words/line in ctr */
472 3: addi r6,r6,8 /* copy a cache line */
476 dcbst r6,r3 /* write it to memory */
478 icbi r6,r3 /* flush the icache line */
490 #ifdef CONFIG_PPC_PMAC
492 * On PowerMac, secondary processors starts from the reset vector, which
493 * is temporarily turned into a call to one of the functions below.
498 .globl __secondary_start_pmac_0
499 __secondary_start_pmac_0:
500 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
510 _GLOBAL(pmac_secondary_start)
511 /* turn on 64-bit mode */
516 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
523 /* get TOC pointer (real address) */
526 /* Copy some CPU settings from CPU 0 */
527 bl .__restore_cpu_ppc970
529 /* pSeries do that early though I don't think we really need it */
532 mtmsrd r3 /* RI on */
534 /* Set up a paca value for this processor. */
535 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
536 ld r4,0(r4) /* Get base vaddr of paca array */
537 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
538 add r13,r13,r4 /* for this processor. */
539 mtspr SPRN_SPRG_PACA,r13 /* Save vaddr of paca in an SPRG*/
541 /* Create a temp kernel stack for use before relocation is on. */
542 ld r1,PACAEMERGSP(r13)
543 subi r1,r1,STACK_FRAME_OVERHEAD
547 #endif /* CONFIG_PPC_PMAC */
550 * This function is called after the master CPU has released the
551 * secondary processors. The execution environment is relocation off.
552 * The paca for this processor has the following fields initialized at
554 * 1. Processor number
555 * 2. Segment table pointer (virtual address)
556 * On entry the following are set:
557 * r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries
558 * r24 = cpu# (in Linux terms)
559 * r13 = paca virtual address
560 * SPRG_PACA = paca virtual address
565 .globl __secondary_start
567 /* Set thread priority to MEDIUM */
570 /* Initialize the kernel stack. Just a repeat for iSeries. */
571 LOAD_REG_ADDR(r3, current_set)
572 sldi r28,r24,3 /* get current_set[cpu#] */
574 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
575 std r14,PACAKSAVE(r13)
577 /* Do early setup for that CPU (stab, slb, hash table pointer) */
578 bl .early_setup_secondary
581 * setup the new stack pointer, but *don't* use this until
586 /* Clear backchain so we get nice backtraces */
590 /* enable MMU and jump to start_secondary */
591 LOAD_REG_ADDR(r3, .start_secondary_prolog)
592 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
593 #ifdef CONFIG_PPC_ISERIES
597 stb r8,PACAHARDIRQEN(r13)
598 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
601 stb r7,PACAHARDIRQEN(r13)
602 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
603 stb r7,PACASOFTIRQEN(r13)
608 b . /* prevent speculative execution */
611 * Running with relocation on at this point. All we want to do is
612 * zero the stack back-chain pointer and get the TOC virtual address
613 * before going into C code.
615 _GLOBAL(start_secondary_prolog)
618 std r3,0(r1) /* Zero the stack frame pointer */
622 * Reset stack pointer and call start_secondary
623 * to continue with online operation when woken up
624 * from cede in cpu offline.
626 _GLOBAL(start_secondary_resume)
627 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
629 std r3,0(r1) /* Zero the stack frame pointer */
635 * This subroutine clobbers r11 and r12
637 _GLOBAL(enable_64b_mode)
638 mfmsr r11 /* grab the current MSR */
639 #ifdef CONFIG_PPC_BOOK3E
640 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
642 #else /* CONFIG_PPC_BOOK3E */
643 li r12,(MSR_SF | MSR_ISF)@highest
652 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
653 * by the toolchain). It computes the correct value for wherever we
654 * are running at the moment, using position-independent code.
656 _GLOBAL(relative_toc)
660 ld r2,(p_toc - 0b)(r9)
665 p_toc: .llong __toc_start + 0x8000 - 0b
668 * This is where the main kernel code starts.
670 _INIT_STATIC(start_here_multiplatform)
671 /* set up the TOC (real address) */
674 /* Clear out the BSS. It may have been done in prom_init,
675 * already but that's irrelevant since prom_init will soon
676 * be detached from the kernel completely. Besides, we need
677 * to clear it now for kexec-style entry.
679 LOAD_REG_ADDR(r11,__bss_stop)
680 LOAD_REG_ADDR(r8,__bss_start)
681 sub r11,r11,r8 /* bss size */
682 addi r11,r11,7 /* round up to an even double word */
683 srdi. r11,r11,3 /* shift right by 3 */
687 mtctr r11 /* zero this many doublewords */
692 #ifndef CONFIG_PPC_BOOK3E
695 mtmsrd r6 /* RI on */
698 #ifdef CONFIG_RELOCATABLE
699 /* Save the physical address we're running at in kernstart_addr */
700 LOAD_REG_ADDR(r4, kernstart_addr)
705 /* The following gets the stack set up with the regs */
706 /* pointing to the real addr of the kernel stack. This is */
707 /* all done to support the C function call below which sets */
708 /* up the htab. This is done because we have relocated the */
709 /* kernel but are still running in real mode. */
711 LOAD_REG_ADDR(r3,init_thread_union)
713 /* set up a stack pointer */
714 addi r1,r3,THREAD_SIZE
716 stdu r0,-STACK_FRAME_OVERHEAD(r1)
718 /* Do very early kernel initializations, including initial hash table,
719 * stab and slb setup before we turn on relocation. */
721 /* Restore parameters passed from prom_init/kexec */
723 bl .early_setup /* also sets r13 and SPRG_PACA */
725 LOAD_REG_ADDR(r3, .start_here_common)
730 b . /* prevent speculative execution */
732 /* This is where all platforms converge execution */
733 _INIT_GLOBAL(start_here_common)
734 /* relocation is on at this point */
735 std r1,PACAKSAVE(r13)
737 /* Load the TOC (virtual address) */
742 /* Load up the kernel context */
745 stb r5,PACASOFTIRQEN(r13) /* Soft Disabled */
746 #ifdef CONFIG_PPC_ISERIES
749 ori r5,r5,MSR_EE /* Hard Enabled on iSeries*/
752 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
754 stb r5,PACAHARDIRQEN(r13) /* Hard Disabled on others */
762 * We put a few things here that have to be page-aligned.
763 * This stuff goes at the beginning of the bss, which is page-aligned.
769 .globl empty_zero_page
773 .globl swapper_pg_dir
775 .space PGD_TABLE_SIZE