2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/exception-64s.h>
16 #include <asm/ptrace.h>
19 * We layout physical memory as follows:
20 * 0x0000 - 0x00ff : Secondary processor spin code
21 * 0x0100 - 0x2fff : pSeries Interrupt prologs
22 * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
23 * 0x6000 - 0x6fff : Initial (CPU0) segment table
24 * 0x7000 - 0x7fff : FWNMI data area
25 * 0x8000 - : Early init and support code
29 * This is the start of the interrupt handlers for pSeries
30 * This code runs with relocation off.
31 * Code from here to __end_interrupts gets copied down to real
32 * address 0x100 when we are running a relocatable kernel.
33 * Therefore any relative branches in this section must only
34 * branch to labels in this section.
37 .globl __start_interrupts
40 .globl system_reset_pSeries;
44 #ifdef CONFIG_PPC_P7_NAP
46 /* Running native on arch 2.06 or later, check if we are
47 * waking up from nap. We only handle no state loss and
48 * supervisor state loss. We do -not- handle hypervisor
49 * state loss at this time.
52 rlwinm. r13,r13,47-31,30,31
55 /* waking up from powersave (nap) state */
57 /* Total loss of HV state is fatal, we could try to use the
58 * PIR to locate a PACA, then use an emergency stack etc...
59 * but for now, let's just stay stuck here
64 #ifdef CONFIG_KVM_BOOK3S_64_HV
65 lbz r0,PACAPROCSTART(r13)
69 stb r0,PACAPROCSTART(r13)
75 b .power7_wakeup_noloss
76 2: b .power7_wakeup_loss
78 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
79 #endif /* CONFIG_PPC_P7_NAP */
80 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
84 machine_check_pSeries_1:
85 /* This is moved out of line as it can be patched by FW, but
86 * some code path might still want to branch into the original
89 b machine_check_pSeries
92 .globl data_access_pSeries
96 #ifndef CONFIG_POWER4_ONLY
98 b data_access_check_stab
100 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
102 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
106 .globl data_access_slb_pSeries
107 data_access_slb_pSeries:
110 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
111 std r3,PACA_EXSLB+EX_R3(r13)
114 /* Keep that around for when we re-implement dynamic VSIDs */
116 bge slb_miss_user_pseries
117 #endif /* __DISABLED__ */
119 #ifndef CONFIG_RELOCATABLE
123 * We can't just use a direct branch to .slb_miss_realmode
124 * because the distance from here to there depends on where
125 * the kernel ends up being put.
128 ld r10,PACAKBASE(r13)
129 LOAD_HANDLER(r10, .slb_miss_realmode)
134 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
137 .globl instruction_access_slb_pSeries
138 instruction_access_slb_pSeries:
141 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
142 std r3,PACA_EXSLB+EX_R3(r13)
143 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
145 /* Keep that around for when we re-implement dynamic VSIDs */
147 bge slb_miss_user_pseries
148 #endif /* __DISABLED__ */
150 #ifndef CONFIG_RELOCATABLE
154 ld r10,PACAKBASE(r13)
155 LOAD_HANDLER(r10, .slb_miss_realmode)
160 /* We open code these as we can't have a ". = x" (even with
161 * x = "." within a feature section
164 .globl hardware_interrupt_pSeries;
165 .globl hardware_interrupt_hv;
166 hardware_interrupt_pSeries:
167 hardware_interrupt_hv:
169 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
170 EXC_HV, SOFTEN_TEST_HV)
171 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
173 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
174 EXC_STD, SOFTEN_TEST_HV_201)
175 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
176 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
178 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
179 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
181 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
182 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
184 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
185 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
187 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
188 MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
190 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
191 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
193 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
194 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
197 .globl system_call_pSeries
200 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
203 std r9,PACA_EXGEN+EX_R9(r13)
204 std r10,PACA_EXGEN+EX_R10(r13)
212 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
217 ld r10,PACAKBASE(r13)
218 LOAD_HANDLER(r10, system_call_entry)
223 b . /* prevent speculative execution */
225 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
227 /* Fast LE/BE switch system call */
228 1: mfspr r12,SPRN_SRR1
231 rfid /* return to userspace */
234 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
235 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
237 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
238 * out of line to handle them
245 b emulation_assist_hv
251 /* We need to deal with the Altivec unavailable exception
252 * here which is at 0xf20, thus in the middle of the
253 * prolog code of the PerformanceMonitor one. A little
254 * trickery is thus necessary
256 performance_monitor_pSeries_1:
258 b performance_monitor_pSeries
260 altivec_unavailable_pSeries_1:
262 b altivec_unavailable_pSeries
264 vsx_unavailable_pSeries_1:
266 b vsx_unavailable_pSeries
268 #ifdef CONFIG_CBE_RAS
269 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
270 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
271 #endif /* CONFIG_CBE_RAS */
273 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
274 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
276 #ifdef CONFIG_CBE_RAS
277 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
278 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
279 #endif /* CONFIG_CBE_RAS */
281 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
282 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
284 #ifdef CONFIG_CBE_RAS
285 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
286 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
287 #endif /* CONFIG_CBE_RAS */
291 /*** Out of line interrupts support ***/
293 /* moved from 0x200 */
294 machine_check_pSeries:
295 .globl machine_check_fwnmi
298 SET_SCRATCH0(r13) /* save r13 */
299 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
300 EXC_STD, KVMTEST, 0x200)
301 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
303 #ifndef CONFIG_POWER4_ONLY
304 /* moved from 0x300 */
305 data_access_check_stab:
307 std r9,PACA_EXSLB+EX_R9(r13)
308 std r10,PACA_EXSLB+EX_R10(r13)
312 rlwimi r10,r9,16,0x20
313 #ifdef CONFIG_KVM_BOOK3S_PR
314 lbz r9,HSTATE_IN_GUEST(r13)
315 rlwimi r10,r9,8,0x300
319 beq do_stab_bolted_pSeries
321 ld r9,PACA_EXSLB+EX_R9(r13)
322 ld r10,PACA_EXSLB+EX_R10(r13)
323 b data_access_not_stab
324 do_stab_bolted_pSeries:
325 std r11,PACA_EXSLB+EX_R11(r13)
326 std r12,PACA_EXSLB+EX_R12(r13)
328 std r10,PACA_EXSLB+EX_R13(r13)
329 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
330 #endif /* CONFIG_POWER4_ONLY */
332 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x300)
333 KVM_HANDLER_PR_SKIP(PACA_EXSLB, EXC_STD, 0x380)
334 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
335 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
336 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
337 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
340 /* moved from 0xe00 */
341 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
342 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
343 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
344 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
345 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
346 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
347 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
348 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
350 /* moved from 0xf00 */
351 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
352 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
353 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
354 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
355 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
356 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
359 * An interrupt came in while soft-disabled; clear EE in SRR1,
360 * clear paca->hard_enabled and return.
363 stb r10,PACAHARDIRQEN(r13)
365 ld r9,PACA_EXGEN+EX_R9(r13)
367 rldicl r10,r10,48,1 /* clear MSR_EE */
370 ld r10,PACA_EXGEN+EX_R10(r13)
376 stb r10,PACAHARDIRQEN(r13)
378 ld r9,PACA_EXGEN+EX_R9(r13)
380 rldicl r10,r10,48,1 /* clear MSR_EE */
383 ld r10,PACA_EXGEN+EX_R10(r13)
388 #ifdef CONFIG_PPC_PSERIES
390 * Vectors for the FWNMI option. Share common code.
392 .globl system_reset_fwnmi
396 SET_SCRATCH0(r13) /* save r13 */
397 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
400 #endif /* CONFIG_PPC_PSERIES */
404 * This is used for when the SLB miss handler has to go virtual,
405 * which doesn't happen for now anymore but will once we re-implement
406 * dynamic VSIDs for shared page tables
408 slb_miss_user_pseries:
409 std r10,PACA_EXGEN+EX_R10(r13)
410 std r11,PACA_EXGEN+EX_R11(r13)
411 std r12,PACA_EXGEN+EX_R12(r13)
413 ld r11,PACA_EXSLB+EX_R9(r13)
414 ld r12,PACA_EXSLB+EX_R3(r13)
415 std r10,PACA_EXGEN+EX_R13(r13)
416 std r11,PACA_EXGEN+EX_R9(r13)
417 std r12,PACA_EXGEN+EX_R3(r13)
420 mfspr r11,SRR0 /* save SRR0 */
421 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
422 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
424 mfspr r12,SRR1 /* and SRR1 */
427 b . /* prevent spec. execution */
428 #endif /* __DISABLED__ */
431 .globl __end_interrupts
435 * Code from here down to __end_handlers is invoked from the
436 * exception prologs above. Because the prologs assemble the
437 * addresses of these handlers using the LOAD_HANDLER macro,
438 * which uses an addi instruction, these handlers must be in
439 * the first 32k of the kernel image.
442 /*** Common interrupt handlers ***/
444 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
447 * Machine check is different because we use a different
448 * save area: PACA_EXMC instead of PACA_EXGEN.
451 .globl machine_check_common
452 machine_check_common:
453 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
457 addi r3,r1,STACK_FRAME_OVERHEAD
458 bl .machine_check_exception
461 STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt)
462 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
463 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
464 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
465 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
466 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
467 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
468 STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception)
469 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
470 #ifdef CONFIG_ALTIVEC
471 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
473 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
475 #ifdef CONFIG_CBE_RAS
476 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
477 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
478 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
479 #endif /* CONFIG_CBE_RAS */
486 * Here we have detected that the kernel stack pointer is bad.
487 * R9 contains the saved CR, r13 points to the paca,
488 * r10 contains the (bad) kernel stack pointer,
489 * r11 and r12 contain the saved SRR0 and SRR1.
490 * We switch to using an emergency stack, save the registers there,
491 * and call kernel_bad_stack(), which panics.
494 ld r1,PACAEMERGSP(r13)
495 subi r1,r1,64+INT_FRAME_SIZE
527 std r10,ORIG_GPR3(r1)
528 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
531 lhz r12,PACA_TRAP_SAVE(r13)
533 addi r11,r1,INT_FRAME_SIZE
538 ld r11,exception_marker@toc(r2)
540 std r11,STACK_FRAME_OVERHEAD-16(r1)
541 1: addi r3,r1,STACK_FRAME_OVERHEAD
546 * Here r13 points to the paca, r9 contains the saved CR,
547 * SRR0 and SRR1 are saved in r11 and r12,
548 * r9 - r13 are saved in paca->exgen.
551 .globl data_access_common
554 std r10,PACA_EXGEN+EX_DAR(r13)
556 stw r10,PACA_EXGEN+EX_DSISR(r13)
557 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
558 ld r3,PACA_EXGEN+EX_DAR(r13)
559 lwz r4,PACA_EXGEN+EX_DSISR(r13)
561 b .do_hash_page /* Try to handle as hpte fault */
564 .globl h_data_storage_common
565 h_data_storage_common:
567 std r10,PACA_EXGEN+EX_DAR(r13)
568 mfspr r10,SPRN_HDSISR
569 stw r10,PACA_EXGEN+EX_DSISR(r13)
570 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
572 addi r3,r1,STACK_FRAME_OVERHEAD
573 bl .unknown_exception
577 .globl instruction_access_common
578 instruction_access_common:
579 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
583 b .do_hash_page /* Try to handle as hpte fault */
585 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
588 * Here is the common SLB miss user that is used when going to virtual
589 * mode for SLB misses, that is currently not used
593 .globl slb_miss_user_common
594 slb_miss_user_common:
596 std r3,PACA_EXGEN+EX_DAR(r13)
597 stw r9,PACA_EXGEN+EX_CCR(r13)
598 std r10,PACA_EXGEN+EX_LR(r13)
599 std r11,PACA_EXGEN+EX_SRR0(r13)
600 bl .slb_allocate_user
602 ld r10,PACA_EXGEN+EX_LR(r13)
603 ld r3,PACA_EXGEN+EX_R3(r13)
604 lwz r9,PACA_EXGEN+EX_CCR(r13)
605 ld r11,PACA_EXGEN+EX_SRR0(r13)
609 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
610 beq- unrecov_user_slb
618 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
624 ld r9,PACA_EXGEN+EX_R9(r13)
625 ld r10,PACA_EXGEN+EX_R10(r13)
626 ld r11,PACA_EXGEN+EX_R11(r13)
627 ld r12,PACA_EXGEN+EX_R12(r13)
628 ld r13,PACA_EXGEN+EX_R13(r13)
633 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
634 ld r4,PACA_EXGEN+EX_DAR(r13)
641 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
644 1: addi r3,r1,STACK_FRAME_OVERHEAD
645 bl .unrecoverable_exception
648 #endif /* __DISABLED__ */
652 * r13 points to the PACA, r9 contains the saved CR,
653 * r12 contain the saved SRR1, SRR0 is still ready for return
654 * r3 has the faulting address
655 * r9 - r13 are saved in paca->exslb.
656 * r3 is saved in paca->slb_r3
657 * We assume we aren't going to take any exceptions during this procedure.
659 _GLOBAL(slb_miss_realmode)
661 #ifdef CONFIG_RELOCATABLE
665 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
666 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
668 bl .slb_allocate_realmode
670 /* All done -- return from exception. */
672 ld r10,PACA_EXSLB+EX_LR(r13)
673 ld r3,PACA_EXSLB+EX_R3(r13)
674 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
675 #ifdef CONFIG_PPC_ISERIES
677 ld r11,PACALPPACAPTR(r13)
678 ld r11,LPPACASRR0(r11) /* get SRR0 value */
679 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
680 #endif /* CONFIG_PPC_ISERIES */
684 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
690 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
693 #ifdef CONFIG_PPC_ISERIES
697 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
698 #endif /* CONFIG_PPC_ISERIES */
699 ld r9,PACA_EXSLB+EX_R9(r13)
700 ld r10,PACA_EXSLB+EX_R10(r13)
701 ld r11,PACA_EXSLB+EX_R11(r13)
702 ld r12,PACA_EXSLB+EX_R12(r13)
703 ld r13,PACA_EXSLB+EX_R13(r13)
705 b . /* prevent speculative execution */
708 #ifdef CONFIG_PPC_ISERIES
711 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
712 #endif /* CONFIG_PPC_ISERIES */
714 ld r10,PACAKBASE(r13)
715 LOAD_HANDLER(r10,unrecov_slb)
723 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
726 1: addi r3,r1,STACK_FRAME_OVERHEAD
727 bl .unrecoverable_exception
731 .globl hardware_interrupt_common
732 .globl hardware_interrupt_entry
733 hardware_interrupt_common:
734 EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
736 hardware_interrupt_entry:
739 bl .ppc64_runlatch_on
740 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
741 addi r3,r1,STACK_FRAME_OVERHEAD
743 b .ret_from_except_lite
745 #ifdef CONFIG_PPC_970_NAP
748 std r9,TI_LOCAL_FLAGS(r11)
749 ld r10,_LINK(r1) /* make idle task do the */
750 std r10,_NIP(r1) /* equivalent of a blr */
755 .globl alignment_common
758 std r10,PACA_EXGEN+EX_DAR(r13)
760 stw r10,PACA_EXGEN+EX_DSISR(r13)
761 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
762 ld r3,PACA_EXGEN+EX_DAR(r13)
763 lwz r4,PACA_EXGEN+EX_DSISR(r13)
767 addi r3,r1,STACK_FRAME_OVERHEAD
769 bl .alignment_exception
773 .globl program_check_common
774 program_check_common:
775 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
777 addi r3,r1,STACK_FRAME_OVERHEAD
779 bl .program_check_exception
783 .globl fp_unavailable_common
784 fp_unavailable_common:
785 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
786 bne 1f /* if from user, just load it up */
788 addi r3,r1,STACK_FRAME_OVERHEAD
790 bl .kernel_fp_unavailable_exception
793 b fast_exception_return
796 .globl altivec_unavailable_common
797 altivec_unavailable_common:
798 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
799 #ifdef CONFIG_ALTIVEC
803 b fast_exception_return
805 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
808 addi r3,r1,STACK_FRAME_OVERHEAD
810 bl .altivec_unavailable_exception
814 .globl vsx_unavailable_common
815 vsx_unavailable_common:
816 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
821 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
824 addi r3,r1,STACK_FRAME_OVERHEAD
826 bl .vsx_unavailable_exception
830 .globl __end_handlers
834 * Return from an exception with minimal checks.
835 * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
836 * If interrupts have been enabled, or anything has been
837 * done that might have changed the scheduling status of
838 * any task or sent any task a signal, you should use
839 * ret_from_except or ret_from_except_lite instead of this.
841 fast_exc_return_irq: /* restores irq state too */
843 TRACE_AND_RESTORE_IRQ(r3);
845 rldicl r4,r12,49,63 /* get MSR_EE to LSB */
846 stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
849 .globl fast_exception_return
850 fast_exception_return:
853 andi. r3,r12,MSR_RI /* check if RI is set */
856 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
859 ACCOUNT_CPU_USER_EXIT(r3, r4)
875 rldicl r10,r10,48,1 /* clear EE */
876 rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */
884 b . /* prevent speculative execution */
888 1: addi r3,r1,STACK_FRAME_OVERHEAD
889 bl .unrecoverable_exception
897 _STATIC(do_hash_page)
901 andis. r0,r4,0xa410 /* weird error? */
902 bne- handle_page_fault /* if not, try to insert a HPTE */
903 andis. r0,r4,DSISR_DABRMATCH@h
904 bne- handle_dabr_fault
907 andis. r0,r4,0x0020 /* Is it a segment table fault? */
908 bne- do_ste_alloc /* If so handle it */
909 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
911 clrrdi r11,r1,THREAD_SHIFT
912 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
913 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
914 bne 77f /* then don't call hash_page now */
917 * On iSeries, we soft-disable interrupts here, then
918 * hard-enable interrupts so that the hash_page code can spin on
919 * the hash_table_lock without problems on a shared processor.
924 * Currently, trace_hardirqs_off() will be called by DISABLE_INTS
925 * and will clobber volatile registers when irq tracing is enabled
926 * so we need to reload them. It may be possible to be smarter here
927 * and move the irq tracing elsewhere but let's keep it simple for
930 #ifdef CONFIG_TRACE_IRQFLAGS
936 #endif /* CONFIG_TRACE_IRQFLAGS */
938 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
939 * accessing a userspace segment (even from the kernel). We assume
940 * kernel addresses always have the high bit set.
942 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
943 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
944 orc r0,r12,r0 /* MSR_PR | ~high_bit */
945 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
946 ori r4,r4,1 /* add _PAGE_PRESENT */
947 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
950 * r3 contains the faulting address
951 * r4 contains the required access permissions
952 * r5 contains the trap number
954 * at return r3 = 0 for success
956 bl .hash_page /* build HPTE if possible */
957 cmpdi r3,0 /* see if hash_page succeeded */
961 * If we had interrupts soft-enabled at the point where the
962 * DSI/ISI occurred, and an interrupt came in during hash_page,
964 * We jump to ret_from_except_lite rather than fast_exception_return
965 * because ret_from_except_lite will check for and handle pending
966 * interrupts if necessary.
969 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
973 * Here we have interrupts hard-disabled, so it is sufficient
974 * to restore paca->{soft,hard}_enable and get out.
976 beq fast_exc_return_irq /* Return from exception on success */
977 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
979 /* For a hash failure, we don't bother re-enabling interrupts */
983 * hash_page couldn't handle it, set soft interrupt enable back
984 * to what it was before the trap. Note that .arch_local_irq_restore
985 * handles any interrupts pending at this point.
988 TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f)
989 bl .arch_local_irq_restore
992 /* We have a data breakpoint exception - handle it */
997 addi r3,r1,STACK_FRAME_OVERHEAD
999 b .ret_from_except_lite
1001 /* Here we have a page fault that hash_page can't handle. */
1006 addi r3,r1,STACK_FRAME_OVERHEAD
1012 addi r3,r1,STACK_FRAME_OVERHEAD
1017 13: b .ret_from_except_lite
1019 /* We have a page fault that hash_page could handle but HV refused
1024 addi r3,r1,STACK_FRAME_OVERHEAD
1030 * We come here as a result of a DSI at a point where we don't want
1031 * to call hash_page, such as when we are accessing memory (possibly
1032 * user memory) inside a PMU interrupt that occurred while interrupts
1033 * were soft-disabled. We want to invoke the exception handler for
1034 * the access, or panic if there isn't a handler.
1038 addi r3,r1,STACK_FRAME_OVERHEAD
1043 /* here we have a segment miss */
1045 bl .ste_allocate /* try to insert stab entry */
1047 bne- handle_page_fault
1048 b fast_exception_return
1051 * r13 points to the PACA, r9 contains the saved CR,
1052 * r11 and r12 contain the saved SRR0 and SRR1.
1053 * r9 - r13 are saved in paca->exslb.
1054 * We assume we aren't going to take any exceptions during this procedure.
1055 * We assume (DAR >> 60) == 0xc.
1058 _GLOBAL(do_stab_bolted)
1059 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1060 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1062 /* Hash to the primary group */
1063 ld r10,PACASTABVIRT(r13)
1066 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1068 /* Calculate VSID */
1069 /* This is a kernel address, so protovsid = ESID */
1070 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1071 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1073 /* Search the primary group for a free entry */
1074 1: ld r11,0(r10) /* Test valid bit of the current ste */
1081 /* Stick for only searching the primary group for now. */
1082 /* At least for now, we use a very simple random castout scheme */
1083 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1085 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1088 /* r10 currently points to an ste one past the group of interest */
1089 /* make it point to the randomly selected entry */
1091 or r10,r10,r11 /* r10 is the entry to invalidate */
1093 isync /* mark the entry invalid */
1095 rldicl r11,r11,56,1 /* clear the valid bit */
1100 clrrdi r11,r11,28 /* Get the esid part of the ste */
1103 2: std r9,8(r10) /* Store the vsid part of the ste */
1106 mfspr r11,SPRN_DAR /* Get the new esid */
1107 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1108 ori r11,r11,0x90 /* Turn on valid and kp */
1109 std r11,0(r10) /* Put new entry back into the stab */
1113 /* All done -- return from exception. */
1114 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1115 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1117 andi. r10,r12,MSR_RI
1120 mtcrf 0x80,r9 /* restore CR */
1128 ld r9,PACA_EXSLB+EX_R9(r13)
1129 ld r10,PACA_EXSLB+EX_R10(r13)
1130 ld r11,PACA_EXSLB+EX_R11(r13)
1131 ld r12,PACA_EXSLB+EX_R12(r13)
1132 ld r13,PACA_EXSLB+EX_R13(r13)
1134 b . /* prevent speculative execution */
1136 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1138 * Data area reserved for FWNMI option.
1139 * This address (0x7000) is fixed by the RPA.
1142 .globl fwnmi_data_area
1144 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1146 /* iSeries does not use the FWNMI stuff, so it is safe to put
1147 * this here, even if we later allow kernels that will boot on
1148 * both pSeries and iSeries */
1149 #ifdef CONFIG_PPC_ISERIES
1153 .quad HvEsidsToMap /* xNumberEsids */
1154 .quad HvRangesToMap /* xNumberRanges */
1155 .quad STAB0_PAGE /* xSegmentTableOffs */
1156 .zero 40 /* xRsvd */
1157 /* xEsids (HvEsidsToMap entries of 2 quads) */
1158 .quad PAGE_OFFSET_ESID /* xKernelEsid */
1159 .quad PAGE_OFFSET_VSID /* xKernelVsid */
1160 .quad VMALLOC_START_ESID /* xKernelEsid */
1161 .quad VMALLOC_START_VSID /* xKernelVsid */
1162 /* xRanges (HvRangesToMap entries of 3 quads) */
1163 .quad HvPagesToMap /* xPages */
1164 .quad 0 /* xOffset */
1165 .quad PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */
1167 #endif /* CONFIG_PPC_ISERIES */
1169 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1170 /* pseries and powernv need to keep the whole page from
1171 * 0x7000 to 0x8000 free for use by the firmware
1174 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1177 * Space for CPU0's segment table.
1179 * On iSeries, the hypervisor must fill in at least one entry before
1180 * we get control (with relocate on). The address is given to the hv
1181 * as a page number (see xLparMap above), so this must be at a
1182 * fixed address (the linker can't compute (u64)&initial_stab >>
1185 . = STAB0_OFFSET /* 0x8000 */
1189 #ifdef CONFIG_PPC_POWERNV
1190 _GLOBAL(opal_mc_secondary_handler)
1196 std r3,PACA_OPAL_MC_EVT(r13)
1197 ld r13,OPAL_MC_SRR0(r3)
1199 ld r13,OPAL_MC_SRR1(r3)
1201 ld r3,OPAL_MC_GPR3(r3)
1203 b machine_check_pSeries
1204 #endif /* CONFIG_PPC_POWERNV */