2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/exception-64s.h>
16 #include <asm/ptrace.h>
19 * We layout physical memory as follows:
20 * 0x0000 - 0x00ff : Secondary processor spin code
21 * 0x0100 - 0x2fff : pSeries Interrupt prologs
22 * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
23 * 0x6000 - 0x6fff : Initial (CPU0) segment table
24 * 0x7000 - 0x7fff : FWNMI data area
25 * 0x8000 - : Early init and support code
29 * This is the start of the interrupt handlers for pSeries
30 * This code runs with relocation off.
31 * Code from here to __end_interrupts gets copied down to real
32 * address 0x100 when we are running a relocatable kernel.
33 * Therefore any relative branches in this section must only
34 * branch to labels in this section.
37 .globl __start_interrupts
40 .globl system_reset_pSeries;
45 #ifdef CONFIG_PPC_P7_NAP
47 /* Running native on arch 2.06 or later, check if we are
48 * waking up from nap. We only handle no state loss and
49 * supervisor state loss. We do -not- handle hypervisor
50 * state loss at this time.
53 rlwinm r13,r13,47-31,30,31
56 b .power7_wakeup_noloss
60 /* Total loss of HV state is fatal, we could try to use the
61 * PIR to locate a PACA, then use an emergency stack etc...
62 * but for now, let's just stay stuck here
66 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE_206)
67 #endif /* CONFIG_PPC_P7_NAP */
68 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD)
71 _machine_check_pSeries:
75 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common, EXC_STD)
78 .globl data_access_pSeries
85 std r9,PACA_EXSLB+EX_R9(r13)
86 std r10,PACA_EXSLB+EX_R10(r13)
93 beq do_stab_bolted_pSeries
94 ld r10,PACA_EXSLB+EX_R10(r13)
95 std r11,PACA_EXGEN+EX_R11(r13)
96 ld r11,PACA_EXSLB+EX_R9(r13)
97 std r12,PACA_EXGEN+EX_R12(r13)
99 std r10,PACA_EXGEN+EX_R10(r13)
100 std r11,PACA_EXGEN+EX_R9(r13)
101 std r12,PACA_EXGEN+EX_R13(r13)
102 EXCEPTION_PROLOG_PSERIES_1(data_access_common, EXC_STD)
104 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD)
105 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_SLB)
108 .globl data_access_slb_pSeries
109 data_access_slb_pSeries:
114 std r3,PACA_EXSLB+EX_R3(r13)
116 std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */
119 /* Keep that around for when we re-implement dynamic VSIDs */
121 bge slb_miss_user_pseries
122 #endif /* __DISABLED__ */
123 std r10,PACA_EXSLB+EX_R10(r13)
124 std r11,PACA_EXSLB+EX_R11(r13)
125 std r12,PACA_EXSLB+EX_R12(r13)
127 std r10,PACA_EXSLB+EX_R13(r13)
128 mfspr r12,SPRN_SRR1 /* and SRR1 */
129 #ifndef CONFIG_RELOCATABLE
133 * We can't just use a direct branch to .slb_miss_realmode
134 * because the distance from here to there depends on where
135 * the kernel ends up being put.
138 ld r10,PACAKBASE(r13)
139 LOAD_HANDLER(r10, .slb_miss_realmode)
144 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
147 .globl instruction_access_slb_pSeries
148 instruction_access_slb_pSeries:
153 std r3,PACA_EXSLB+EX_R3(r13)
154 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
155 std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */
158 /* Keep that around for when we re-implement dynamic VSIDs */
160 bge slb_miss_user_pseries
161 #endif /* __DISABLED__ */
162 std r10,PACA_EXSLB+EX_R10(r13)
163 std r11,PACA_EXSLB+EX_R11(r13)
164 std r12,PACA_EXSLB+EX_R12(r13)
166 std r10,PACA_EXSLB+EX_R13(r13)
167 mfspr r12,SPRN_SRR1 /* and SRR1 */
168 #ifndef CONFIG_RELOCATABLE
172 ld r10,PACAKBASE(r13)
173 LOAD_HANDLER(r10, .slb_miss_realmode)
178 /* We open code these as we can't have a ". = x" (even with
179 * x = "." within a feature section
182 .globl hardware_interrupt_pSeries;
183 .globl hardware_interrupt_hv;
184 hardware_interrupt_pSeries:
185 hardware_interrupt_hv:
187 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD)
189 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV)
190 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_HVMODE_206)
192 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
193 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
194 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
196 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
197 MASKABLE_EXCEPTION_HV(0x980, 0x980, decrementer)
199 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
200 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
203 .globl system_call_pSeries
210 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
214 ld r12,PACAKBASE(r13)
216 LOAD_HANDLER(r12, system_call_entry)
221 b . /* prevent speculative execution */
223 /* Fast LE/BE switch system call */
224 1: mfspr r12,SPRN_SRR1
227 rfid /* return to userspace */
230 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
232 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
233 * out of line to handle them
240 b emulation_assist_hv
246 /* We need to deal with the Altivec unavailable exception
247 * here which is at 0xf20, thus in the middle of the
248 * prolog code of the PerformanceMonitor one. A little
249 * trickery is thus necessary
251 performance_monitor_pSeries_1:
253 b performance_monitor_pSeries
255 altivec_unavailable_pSeries_1:
257 b altivec_unavailable_pSeries
259 vsx_unavailable_pSeries_1:
261 b vsx_unavailable_pSeries
263 #ifdef CONFIG_CBE_RAS
264 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
265 #endif /* CONFIG_CBE_RAS */
266 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
267 #ifdef CONFIG_CBE_RAS
268 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
269 #endif /* CONFIG_CBE_RAS */
270 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
271 #ifdef CONFIG_CBE_RAS
272 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
273 #endif /* CONFIG_CBE_RAS */
277 /*** Out of line interrupts support ***/
279 /* moved from 0xe00 */
280 STD_EXCEPTION_HV(., 0xe00, h_data_storage)
281 STD_EXCEPTION_HV(., 0xe20, h_instr_storage)
282 STD_EXCEPTION_HV(., 0xe40, emulation_assist)
283 STD_EXCEPTION_HV(., 0xe60, hmi_exception) /* need to flush cache ? */
285 /* moved from 0xf00 */
286 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
287 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
288 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
291 * An interrupt came in while soft-disabled; clear EE in SRR1,
292 * clear paca->hard_enabled and return.
295 stb r10,PACAHARDIRQEN(r13)
297 ld r9,PACA_EXGEN+EX_R9(r13)
299 rldicl r10,r10,48,1 /* clear MSR_EE */
302 ld r10,PACA_EXGEN+EX_R10(r13)
308 stb r10,PACAHARDIRQEN(r13)
310 ld r9,PACA_EXGEN+EX_R9(r13)
312 rldicl r10,r10,48,1 /* clear MSR_EE */
315 ld r10,PACA_EXGEN+EX_R10(r13)
321 do_stab_bolted_pSeries:
322 std r11,PACA_EXSLB+EX_R11(r13)
323 std r12,PACA_EXSLB+EX_R12(r13)
325 std r10,PACA_EXSLB+EX_R13(r13)
326 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
328 #ifdef CONFIG_PPC_PSERIES
330 * Vectors for the FWNMI option. Share common code.
332 .globl system_reset_fwnmi
336 SET_SCRATCH0(r13) /* save r13 */
337 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD)
339 .globl machine_check_fwnmi
343 SET_SCRATCH0(r13) /* save r13 */
344 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common, EXC_STD)
346 #endif /* CONFIG_PPC_PSERIES */
350 * This is used for when the SLB miss handler has to go virtual,
351 * which doesn't happen for now anymore but will once we re-implement
352 * dynamic VSIDs for shared page tables
354 slb_miss_user_pseries:
355 std r10,PACA_EXGEN+EX_R10(r13)
356 std r11,PACA_EXGEN+EX_R11(r13)
357 std r12,PACA_EXGEN+EX_R12(r13)
359 ld r11,PACA_EXSLB+EX_R9(r13)
360 ld r12,PACA_EXSLB+EX_R3(r13)
361 std r10,PACA_EXGEN+EX_R13(r13)
362 std r11,PACA_EXGEN+EX_R9(r13)
363 std r12,PACA_EXGEN+EX_R3(r13)
366 mfspr r11,SRR0 /* save SRR0 */
367 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
368 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
370 mfspr r12,SRR1 /* and SRR1 */
373 b . /* prevent spec. execution */
374 #endif /* __DISABLED__ */
376 /* KVM's trampoline code needs to be close to the interrupt handlers */
378 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
379 #include "../kvm/book3s_rmhandlers.S"
383 .globl __end_interrupts
387 * Code from here down to __end_handlers is invoked from the
388 * exception prologs above. Because the prologs assemble the
389 * addresses of these handlers using the LOAD_HANDLER macro,
390 * which uses an addi instruction, these handlers must be in
391 * the first 32k of the kernel image.
394 /*** Common interrupt handlers ***/
396 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
399 * Machine check is different because we use a different
400 * save area: PACA_EXMC instead of PACA_EXGEN.
403 .globl machine_check_common
404 machine_check_common:
405 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
409 addi r3,r1,STACK_FRAME_OVERHEAD
410 bl .machine_check_exception
413 STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt)
414 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
415 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
416 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
417 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
418 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
419 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
420 STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception)
421 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
422 #ifdef CONFIG_ALTIVEC
423 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
425 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
427 #ifdef CONFIG_CBE_RAS
428 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
429 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
430 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
431 #endif /* CONFIG_CBE_RAS */
438 * Here we have detected that the kernel stack pointer is bad.
439 * R9 contains the saved CR, r13 points to the paca,
440 * r10 contains the (bad) kernel stack pointer,
441 * r11 and r12 contain the saved SRR0 and SRR1.
442 * We switch to using an emergency stack, save the registers there,
443 * and call kernel_bad_stack(), which panics.
446 ld r1,PACAEMERGSP(r13)
447 subi r1,r1,64+INT_FRAME_SIZE
479 lhz r12,PACA_TRAP_SAVE(r13)
481 addi r11,r1,INT_FRAME_SIZE
486 ld r11,exception_marker@toc(r2)
488 std r11,STACK_FRAME_OVERHEAD-16(r1)
489 1: addi r3,r1,STACK_FRAME_OVERHEAD
494 * Here r13 points to the paca, r9 contains the saved CR,
495 * SRR0 and SRR1 are saved in r11 and r12,
496 * r9 - r13 are saved in paca->exgen.
499 .globl data_access_common
502 std r10,PACA_EXGEN+EX_DAR(r13)
504 stw r10,PACA_EXGEN+EX_DSISR(r13)
505 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
506 ld r3,PACA_EXGEN+EX_DAR(r13)
507 lwz r4,PACA_EXGEN+EX_DSISR(r13)
509 b .do_hash_page /* Try to handle as hpte fault */
512 .globl h_data_storage_common
513 h_data_storage_common:
515 std r10,PACA_EXGEN+EX_DAR(r13)
516 mfspr r10,SPRN_HDSISR
517 stw r10,PACA_EXGEN+EX_DSISR(r13)
518 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
520 addi r3,r1,STACK_FRAME_OVERHEAD
521 bl .unknown_exception
525 .globl instruction_access_common
526 instruction_access_common:
527 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
531 b .do_hash_page /* Try to handle as hpte fault */
533 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
536 * Here is the common SLB miss user that is used when going to virtual
537 * mode for SLB misses, that is currently not used
541 .globl slb_miss_user_common
542 slb_miss_user_common:
544 std r3,PACA_EXGEN+EX_DAR(r13)
545 stw r9,PACA_EXGEN+EX_CCR(r13)
546 std r10,PACA_EXGEN+EX_LR(r13)
547 std r11,PACA_EXGEN+EX_SRR0(r13)
548 bl .slb_allocate_user
550 ld r10,PACA_EXGEN+EX_LR(r13)
551 ld r3,PACA_EXGEN+EX_R3(r13)
552 lwz r9,PACA_EXGEN+EX_CCR(r13)
553 ld r11,PACA_EXGEN+EX_SRR0(r13)
557 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
558 beq- unrecov_user_slb
566 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
572 ld r9,PACA_EXGEN+EX_R9(r13)
573 ld r10,PACA_EXGEN+EX_R10(r13)
574 ld r11,PACA_EXGEN+EX_R11(r13)
575 ld r12,PACA_EXGEN+EX_R12(r13)
576 ld r13,PACA_EXGEN+EX_R13(r13)
581 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
582 ld r4,PACA_EXGEN+EX_DAR(r13)
589 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
592 1: addi r3,r1,STACK_FRAME_OVERHEAD
593 bl .unrecoverable_exception
596 #endif /* __DISABLED__ */
600 * r13 points to the PACA, r9 contains the saved CR,
601 * r12 contain the saved SRR1, SRR0 is still ready for return
602 * r3 has the faulting address
603 * r9 - r13 are saved in paca->exslb.
604 * r3 is saved in paca->slb_r3
605 * We assume we aren't going to take any exceptions during this procedure.
607 _GLOBAL(slb_miss_realmode)
609 #ifdef CONFIG_RELOCATABLE
613 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
614 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
616 bl .slb_allocate_realmode
618 /* All done -- return from exception. */
620 ld r10,PACA_EXSLB+EX_LR(r13)
621 ld r3,PACA_EXSLB+EX_R3(r13)
622 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
623 #ifdef CONFIG_PPC_ISERIES
625 ld r11,PACALPPACAPTR(r13)
626 ld r11,LPPACASRR0(r11) /* get SRR0 value */
627 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
628 #endif /* CONFIG_PPC_ISERIES */
632 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
638 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
641 #ifdef CONFIG_PPC_ISERIES
645 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
646 #endif /* CONFIG_PPC_ISERIES */
647 ld r9,PACA_EXSLB+EX_R9(r13)
648 ld r10,PACA_EXSLB+EX_R10(r13)
649 ld r11,PACA_EXSLB+EX_R11(r13)
650 ld r12,PACA_EXSLB+EX_R12(r13)
651 ld r13,PACA_EXSLB+EX_R13(r13)
653 b . /* prevent speculative execution */
656 #ifdef CONFIG_PPC_ISERIES
659 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
660 #endif /* CONFIG_PPC_ISERIES */
662 ld r10,PACAKBASE(r13)
663 LOAD_HANDLER(r10,unrecov_slb)
671 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
674 1: addi r3,r1,STACK_FRAME_OVERHEAD
675 bl .unrecoverable_exception
679 .globl hardware_interrupt_common
680 .globl hardware_interrupt_entry
681 hardware_interrupt_common:
682 EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
684 hardware_interrupt_entry:
687 bl .ppc64_runlatch_on
688 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
689 addi r3,r1,STACK_FRAME_OVERHEAD
691 b .ret_from_except_lite
693 #ifdef CONFIG_PPC_970_NAP
696 std r9,TI_LOCAL_FLAGS(r11)
697 ld r10,_LINK(r1) /* make idle task do the */
698 std r10,_NIP(r1) /* equivalent of a blr */
703 .globl alignment_common
706 std r10,PACA_EXGEN+EX_DAR(r13)
708 stw r10,PACA_EXGEN+EX_DSISR(r13)
709 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
710 ld r3,PACA_EXGEN+EX_DAR(r13)
711 lwz r4,PACA_EXGEN+EX_DSISR(r13)
715 addi r3,r1,STACK_FRAME_OVERHEAD
717 bl .alignment_exception
721 .globl program_check_common
722 program_check_common:
723 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
725 addi r3,r1,STACK_FRAME_OVERHEAD
727 bl .program_check_exception
731 .globl fp_unavailable_common
732 fp_unavailable_common:
733 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
734 bne 1f /* if from user, just load it up */
736 addi r3,r1,STACK_FRAME_OVERHEAD
738 bl .kernel_fp_unavailable_exception
741 b fast_exception_return
744 .globl altivec_unavailable_common
745 altivec_unavailable_common:
746 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
747 #ifdef CONFIG_ALTIVEC
751 b fast_exception_return
753 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
756 addi r3,r1,STACK_FRAME_OVERHEAD
758 bl .altivec_unavailable_exception
762 .globl vsx_unavailable_common
763 vsx_unavailable_common:
764 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
769 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
772 addi r3,r1,STACK_FRAME_OVERHEAD
774 bl .vsx_unavailable_exception
778 .globl __end_handlers
782 * Return from an exception with minimal checks.
783 * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
784 * If interrupts have been enabled, or anything has been
785 * done that might have changed the scheduling status of
786 * any task or sent any task a signal, you should use
787 * ret_from_except or ret_from_except_lite instead of this.
789 fast_exc_return_irq: /* restores irq state too */
791 TRACE_AND_RESTORE_IRQ(r3);
793 rldicl r4,r12,49,63 /* get MSR_EE to LSB */
794 stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
797 .globl fast_exception_return
798 fast_exception_return:
801 andi. r3,r12,MSR_RI /* check if RI is set */
804 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
807 ACCOUNT_CPU_USER_EXIT(r3, r4)
823 rldicl r10,r10,48,1 /* clear EE */
824 rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */
832 b . /* prevent speculative execution */
836 1: addi r3,r1,STACK_FRAME_OVERHEAD
837 bl .unrecoverable_exception
845 _STATIC(do_hash_page)
849 andis. r0,r4,0xa410 /* weird error? */
850 bne- handle_page_fault /* if not, try to insert a HPTE */
851 andis. r0,r4,DSISR_DABRMATCH@h
852 bne- handle_dabr_fault
855 andis. r0,r4,0x0020 /* Is it a segment table fault? */
856 bne- do_ste_alloc /* If so handle it */
857 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
859 clrrdi r11,r1,THREAD_SHIFT
860 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
861 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
862 bne 77f /* then don't call hash_page now */
865 * On iSeries, we soft-disable interrupts here, then
866 * hard-enable interrupts so that the hash_page code can spin on
867 * the hash_table_lock without problems on a shared processor.
872 * Currently, trace_hardirqs_off() will be called by DISABLE_INTS
873 * and will clobber volatile registers when irq tracing is enabled
874 * so we need to reload them. It may be possible to be smarter here
875 * and move the irq tracing elsewhere but let's keep it simple for
878 #ifdef CONFIG_TRACE_IRQFLAGS
884 #endif /* CONFIG_TRACE_IRQFLAGS */
886 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
887 * accessing a userspace segment (even from the kernel). We assume
888 * kernel addresses always have the high bit set.
890 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
891 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
892 orc r0,r12,r0 /* MSR_PR | ~high_bit */
893 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
894 ori r4,r4,1 /* add _PAGE_PRESENT */
895 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
898 * r3 contains the faulting address
899 * r4 contains the required access permissions
900 * r5 contains the trap number
902 * at return r3 = 0 for success
904 bl .hash_page /* build HPTE if possible */
905 cmpdi r3,0 /* see if hash_page succeeded */
909 * If we had interrupts soft-enabled at the point where the
910 * DSI/ISI occurred, and an interrupt came in during hash_page,
912 * We jump to ret_from_except_lite rather than fast_exception_return
913 * because ret_from_except_lite will check for and handle pending
914 * interrupts if necessary.
917 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
921 * Here we have interrupts hard-disabled, so it is sufficient
922 * to restore paca->{soft,hard}_enable and get out.
924 beq fast_exc_return_irq /* Return from exception on success */
925 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
927 /* For a hash failure, we don't bother re-enabling interrupts */
931 * hash_page couldn't handle it, set soft interrupt enable back
932 * to what it was before the trap. Note that .arch_local_irq_restore
933 * handles any interrupts pending at this point.
936 TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f)
937 bl .arch_local_irq_restore
940 /* We have a data breakpoint exception - handle it */
945 addi r3,r1,STACK_FRAME_OVERHEAD
947 b .ret_from_except_lite
949 /* Here we have a page fault that hash_page can't handle. */
954 addi r3,r1,STACK_FRAME_OVERHEAD
960 addi r3,r1,STACK_FRAME_OVERHEAD
965 13: b .ret_from_except_lite
967 /* We have a page fault that hash_page could handle but HV refused
972 addi r3,r1,STACK_FRAME_OVERHEAD
978 * We come here as a result of a DSI at a point where we don't want
979 * to call hash_page, such as when we are accessing memory (possibly
980 * user memory) inside a PMU interrupt that occurred while interrupts
981 * were soft-disabled. We want to invoke the exception handler for
982 * the access, or panic if there isn't a handler.
986 addi r3,r1,STACK_FRAME_OVERHEAD
991 /* here we have a segment miss */
993 bl .ste_allocate /* try to insert stab entry */
995 bne- handle_page_fault
996 b fast_exception_return
999 * r13 points to the PACA, r9 contains the saved CR,
1000 * r11 and r12 contain the saved SRR0 and SRR1.
1001 * r9 - r13 are saved in paca->exslb.
1002 * We assume we aren't going to take any exceptions during this procedure.
1003 * We assume (DAR >> 60) == 0xc.
1006 _GLOBAL(do_stab_bolted)
1007 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1008 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1010 /* Hash to the primary group */
1011 ld r10,PACASTABVIRT(r13)
1014 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1016 /* Calculate VSID */
1017 /* This is a kernel address, so protovsid = ESID */
1018 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1019 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1021 /* Search the primary group for a free entry */
1022 1: ld r11,0(r10) /* Test valid bit of the current ste */
1029 /* Stick for only searching the primary group for now. */
1030 /* At least for now, we use a very simple random castout scheme */
1031 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1033 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1036 /* r10 currently points to an ste one past the group of interest */
1037 /* make it point to the randomly selected entry */
1039 or r10,r10,r11 /* r10 is the entry to invalidate */
1041 isync /* mark the entry invalid */
1043 rldicl r11,r11,56,1 /* clear the valid bit */
1048 clrrdi r11,r11,28 /* Get the esid part of the ste */
1051 2: std r9,8(r10) /* Store the vsid part of the ste */
1054 mfspr r11,SPRN_DAR /* Get the new esid */
1055 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1056 ori r11,r11,0x90 /* Turn on valid and kp */
1057 std r11,0(r10) /* Put new entry back into the stab */
1061 /* All done -- return from exception. */
1062 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1063 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1065 andi. r10,r12,MSR_RI
1068 mtcrf 0x80,r9 /* restore CR */
1076 ld r9,PACA_EXSLB+EX_R9(r13)
1077 ld r10,PACA_EXSLB+EX_R10(r13)
1078 ld r11,PACA_EXSLB+EX_R11(r13)
1079 ld r12,PACA_EXSLB+EX_R12(r13)
1080 ld r13,PACA_EXSLB+EX_R13(r13)
1082 b . /* prevent speculative execution */
1084 #ifdef CONFIG_PPC_PSERIES
1086 * Data area reserved for FWNMI option.
1087 * This address (0x7000) is fixed by the RPA.
1090 .globl fwnmi_data_area
1092 #endif /* CONFIG_PPC_PSERIES */
1094 /* iSeries does not use the FWNMI stuff, so it is safe to put
1095 * this here, even if we later allow kernels that will boot on
1096 * both pSeries and iSeries */
1097 #ifdef CONFIG_PPC_ISERIES
1101 .quad HvEsidsToMap /* xNumberEsids */
1102 .quad HvRangesToMap /* xNumberRanges */
1103 .quad STAB0_PAGE /* xSegmentTableOffs */
1104 .zero 40 /* xRsvd */
1105 /* xEsids (HvEsidsToMap entries of 2 quads) */
1106 .quad PAGE_OFFSET_ESID /* xKernelEsid */
1107 .quad PAGE_OFFSET_VSID /* xKernelVsid */
1108 .quad VMALLOC_START_ESID /* xKernelEsid */
1109 .quad VMALLOC_START_VSID /* xKernelVsid */
1110 /* xRanges (HvRangesToMap entries of 3 quads) */
1111 .quad HvPagesToMap /* xPages */
1112 .quad 0 /* xOffset */
1113 .quad PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */
1115 #endif /* CONFIG_PPC_ISERIES */
1117 #ifdef CONFIG_PPC_PSERIES
1119 #endif /* CONFIG_PPC_PSERIES */
1122 * Space for CPU0's segment table.
1124 * On iSeries, the hypervisor must fill in at least one entry before
1125 * we get control (with relocate on). The address is given to the hv
1126 * as a page number (see xLparMap above), so this must be at a
1127 * fixed address (the linker can't compute (u64)&initial_stab >>
1130 . = STAB0_OFFSET /* 0x8000 */