2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
38 mfspr r11,SPRN_SRR0 ; \
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
49 b . ; /* prevent speculative execution */
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
58 2: mfspr r12,SPRN_SRR1 ; \
59 andi. r12,r12,MSR_PR ; \
61 mtspr SPRN_SRR0,r3 ; \
62 mtspr SPRN_SRR1,r4 ; \
63 mtspr SPRN_SDR1,r5 ; \
65 b . ; /* prevent speculative execution */
67 #if defined(CONFIG_RELOCATABLE)
69 * We can't branch directly; in the direct case we use LR
70 * and system_call_entry restores LR. (We thus need to move
71 * LR to r10 in the RFID case too.)
73 #define SYSCALL_PSERIES_2_DIRECT \
75 ld r12,PACAKBASE(r13) ; \
76 LOAD_HANDLER(r12, system_call_entry_direct) ; \
78 mfspr r12,SPRN_SRR1 ; \
79 /* Re-use of r13... No spare regs to do this */ \
82 GET_PACA(r13) ; /* get r13 back */ \
85 /* We can branch directly */
86 #define SYSCALL_PSERIES_2_DIRECT \
87 mfspr r12,SPRN_SRR1 ; \
89 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
90 b system_call_entry_direct ;
94 * This is the start of the interrupt handlers for pSeries
95 * This code runs with relocation off.
96 * Code from here to __end_interrupts gets copied down to real
97 * address 0x100 when we are running a relocatable kernel.
98 * Therefore any relative branches in this section must only
99 * branch to labels in this section.
102 .globl __start_interrupts
105 .globl system_reset_pSeries;
106 system_reset_pSeries:
107 HMT_MEDIUM_PPR_DISCARD
109 #ifdef CONFIG_PPC_P7_NAP
111 /* Running native on arch 2.06 or later, check if we are
112 * waking up from nap. We only handle no state loss and
113 * supervisor state loss. We do -not- handle hypervisor
114 * state loss at this time.
117 rlwinm. r13,r13,47-31,30,31
120 /* waking up from powersave (nap) state */
122 /* Total loss of HV state is fatal, we could try to use the
123 * PIR to locate a PACA, then use an emergency stack etc...
124 * but for now, let's just stay stuck here
129 #ifdef CONFIG_KVM_BOOK3S_64_HV
130 li r0,KVM_HWTHREAD_IN_KERNEL
131 stb r0,HSTATE_HWTHREAD_STATE(r13)
132 /* Order setting hwthread_state vs. testing hwthread_req */
134 lbz r0,HSTATE_HWTHREAD_REQ(r13)
142 b .power7_wakeup_noloss
143 2: b .power7_wakeup_loss
145 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
146 #endif /* CONFIG_PPC_P7_NAP */
147 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
151 machine_check_pSeries_1:
152 /* This is moved out of line as it can be patched by FW, but
153 * some code path might still want to branch into the original
156 b machine_check_pSeries
159 .globl data_access_pSeries
161 HMT_MEDIUM_PPR_DISCARD
164 b data_access_check_stab
165 data_access_not_stab:
166 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
167 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
171 .globl data_access_slb_pSeries
172 data_access_slb_pSeries:
173 HMT_MEDIUM_PPR_DISCARD
175 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
176 std r3,PACA_EXSLB+EX_R3(r13)
179 /* Keep that around for when we re-implement dynamic VSIDs */
181 bge slb_miss_user_pseries
182 #endif /* __DISABLED__ */
184 #ifndef CONFIG_RELOCATABLE
188 * We can't just use a direct branch to .slb_miss_realmode
189 * because the distance from here to there depends on where
190 * the kernel ends up being put.
193 ld r10,PACAKBASE(r13)
194 LOAD_HANDLER(r10, .slb_miss_realmode)
199 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
202 .globl instruction_access_slb_pSeries
203 instruction_access_slb_pSeries:
204 HMT_MEDIUM_PPR_DISCARD
206 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
207 std r3,PACA_EXSLB+EX_R3(r13)
208 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
210 /* Keep that around for when we re-implement dynamic VSIDs */
212 bge slb_miss_user_pseries
213 #endif /* __DISABLED__ */
215 #ifndef CONFIG_RELOCATABLE
219 ld r10,PACAKBASE(r13)
220 LOAD_HANDLER(r10, .slb_miss_realmode)
225 /* We open code these as we can't have a ". = x" (even with
226 * x = "." within a feature section
229 .globl hardware_interrupt_pSeries;
230 .globl hardware_interrupt_hv;
231 hardware_interrupt_pSeries:
232 hardware_interrupt_hv:
234 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
235 EXC_HV, SOFTEN_TEST_HV)
236 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
238 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
239 EXC_STD, SOFTEN_TEST_HV_201)
240 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
241 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
243 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
244 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
246 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
247 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
249 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
250 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
252 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
253 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
255 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
256 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
258 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
259 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
262 .globl system_call_pSeries
265 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
268 std r9,PACA_EXGEN+EX_R9(r13)
269 std r10,PACA_EXGEN+EX_R10(r13)
275 SYSCALL_PSERIES_2_RFID
277 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
279 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
280 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
282 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
283 * out of line to handle them
286 hv_exception_trampoline:
291 b emulation_assist_hv
299 /* We need to deal with the Altivec unavailable exception
300 * here which is at 0xf20, thus in the middle of the
301 * prolog code of the PerformanceMonitor one. A little
302 * trickery is thus necessary
304 performance_monitor_pSeries_1:
306 b performance_monitor_pSeries
308 altivec_unavailable_pSeries_1:
310 b altivec_unavailable_pSeries
312 vsx_unavailable_pSeries_1:
314 b vsx_unavailable_pSeries
316 #ifdef CONFIG_CBE_RAS
317 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
318 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
319 #endif /* CONFIG_CBE_RAS */
321 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
322 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
325 .global denorm_exception_hv
327 HMT_MEDIUM_PPR_DISCARD
328 mtspr SPRN_SPRG_HSCRATCH0,r13
329 mfspr r13,SPRN_SPRG_HPACA
330 std r9,PACA_EXGEN+EX_R9(r13)
331 HMT_MEDIUM_PPR_SAVE(PACA_EXGEN, r9)
332 std r10,PACA_EXGEN+EX_R10(r13)
333 std r11,PACA_EXGEN+EX_R11(r13)
334 std r12,PACA_EXGEN+EX_R12(r13)
335 mfspr r9,SPRN_SPRG_HSCRATCH0
336 std r9,PACA_EXGEN+EX_R13(r13)
339 #ifdef CONFIG_PPC_DENORMALISATION
341 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
342 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
343 addi r11,r11,-4 /* HSRR0 is next instruction */
347 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
348 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
350 #ifdef CONFIG_CBE_RAS
351 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
352 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
353 #endif /* CONFIG_CBE_RAS */
355 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
356 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
358 #ifdef CONFIG_CBE_RAS
359 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
360 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
363 #endif /* CONFIG_CBE_RAS */
366 /*** Out of line interrupts support ***/
369 /* moved from 0x200 */
370 machine_check_pSeries:
371 .globl machine_check_fwnmi
373 HMT_MEDIUM_PPR_DISCARD
374 SET_SCRATCH0(r13) /* save r13 */
375 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
376 EXC_STD, KVMTEST, 0x200)
377 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
379 /* moved from 0x300 */
380 data_access_check_stab:
382 std r9,PACA_EXSLB+EX_R9(r13)
383 std r10,PACA_EXSLB+EX_R10(r13)
387 rlwimi r10,r9,16,0x20
388 #ifdef CONFIG_KVM_BOOK3S_PR
389 lbz r9,HSTATE_IN_GUEST(r13)
390 rlwimi r10,r9,8,0x300
394 beq do_stab_bolted_pSeries
396 ld r9,PACA_EXSLB+EX_R9(r13)
397 ld r10,PACA_EXSLB+EX_R10(r13)
398 b data_access_not_stab
399 do_stab_bolted_pSeries:
400 std r11,PACA_EXSLB+EX_R11(r13)
401 std r12,PACA_EXSLB+EX_R12(r13)
403 std r10,PACA_EXSLB+EX_R13(r13)
404 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
406 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
407 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
408 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
409 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
410 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
411 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
413 #ifdef CONFIG_PPC_DENORMALISATION
417 * To denormalise we need to move a copy of the register to itself.
418 * For POWER6 do that here for all FP regs.
421 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
422 xori r10,r10,(MSR_FE0|MSR_FE1)
459 * To denormalise we need to move a copy of the register to itself.
460 * For POWER7 do that here for the first 32 VSX registers only.
463 oris r10,r10,MSR_VSX@h
498 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
501 ld r9,PACA_EXGEN+EX_R9(r13)
502 RESTORE_PPR_PACA(PACA_EXGEN, r10)
503 ld r10,PACA_EXGEN+EX_R10(r13)
504 ld r11,PACA_EXGEN+EX_R11(r13)
505 ld r12,PACA_EXGEN+EX_R12(r13)
506 ld r13,PACA_EXGEN+EX_R13(r13)
512 /* moved from 0xe00 */
513 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
514 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
515 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
516 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
517 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
518 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
519 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
520 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
521 MASKABLE_EXCEPTION_HV(., 0xe82, h_doorbell)
522 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
524 /* moved from 0xf00 */
525 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
526 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
527 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
528 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
529 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
530 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
533 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
534 * - If it was a decrementer interrupt, we bump the dec to max and and return.
535 * - If it was a doorbell we return immediately since doorbells are edge
536 * triggered and won't automatically refire.
537 * - else we hard disable and return.
538 * This is called with r10 containing the value to OR to the paca field.
540 #define MASKED_INTERRUPT(_H) \
541 masked_##_H##interrupt: \
542 std r11,PACA_EXGEN+EX_R11(r13); \
543 lbz r11,PACAIRQHAPPENED(r13); \
545 stb r11,PACAIRQHAPPENED(r13); \
546 cmpwi r10,PACA_IRQ_DEC; \
549 ori r10,r10,0xffff; \
550 mtspr SPRN_DEC,r10; \
552 1: cmpwi r10,PACA_IRQ_DBELL; \
554 mfspr r10,SPRN_##_H##SRR1; \
555 rldicl r10,r10,48,1; /* clear MSR_EE */ \
557 mtspr SPRN_##_H##SRR1,r10; \
559 ld r9,PACA_EXGEN+EX_R9(r13); \
560 ld r10,PACA_EXGEN+EX_R10(r13); \
561 ld r11,PACA_EXGEN+EX_R11(r13); \
570 * Called from arch_local_irq_enable when an interrupt needs
571 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
572 * which kind of interrupt. MSR:EE is already off. We generate a
573 * stackframe like if a real interrupt had happened.
575 * Note: While MSR:EE is off, we need to make sure that _MSR
576 * in the generated frame has EE set to 1 or the exception
577 * handler will not properly re-enable them.
579 _GLOBAL(__replay_interrupt)
580 /* We are going to jump to the exception common code which
581 * will retrieve various register values from the PACA which
582 * we don't give a damn about, so we don't bother storing them.
589 beq decrementer_common
591 beq hardware_interrupt_common
594 beq h_doorbell_common
597 beq doorbell_super_common
598 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
601 #ifdef CONFIG_PPC_PSERIES
603 * Vectors for the FWNMI option. Share common code.
605 .globl system_reset_fwnmi
608 HMT_MEDIUM_PPR_DISCARD
609 SET_SCRATCH0(r13) /* save r13 */
610 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
613 #endif /* CONFIG_PPC_PSERIES */
617 * This is used for when the SLB miss handler has to go virtual,
618 * which doesn't happen for now anymore but will once we re-implement
619 * dynamic VSIDs for shared page tables
621 slb_miss_user_pseries:
622 std r10,PACA_EXGEN+EX_R10(r13)
623 std r11,PACA_EXGEN+EX_R11(r13)
624 std r12,PACA_EXGEN+EX_R12(r13)
626 ld r11,PACA_EXSLB+EX_R9(r13)
627 ld r12,PACA_EXSLB+EX_R3(r13)
628 std r10,PACA_EXGEN+EX_R13(r13)
629 std r11,PACA_EXGEN+EX_R9(r13)
630 std r12,PACA_EXGEN+EX_R3(r13)
633 mfspr r11,SRR0 /* save SRR0 */
634 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
635 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
637 mfspr r12,SRR1 /* and SRR1 */
640 b . /* prevent spec. execution */
641 #endif /* __DISABLED__ */
644 * Code from here down to __end_handlers is invoked from the
645 * exception prologs above. Because the prologs assemble the
646 * addresses of these handlers using the LOAD_HANDLER macro,
647 * which uses an ori instruction, these handlers must be in
648 * the first 64k of the kernel image.
651 /*** Common interrupt handlers ***/
653 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
656 * Machine check is different because we use a different
657 * save area: PACA_EXMC instead of PACA_EXGEN.
660 .globl machine_check_common
661 machine_check_common:
662 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
666 addi r3,r1,STACK_FRAME_OVERHEAD
667 bl .machine_check_exception
670 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
671 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
672 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
673 #ifdef CONFIG_PPC_DOORBELL
674 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
676 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception)
678 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
679 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
680 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
681 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
682 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
683 #ifdef CONFIG_PPC_DOORBELL
684 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception)
686 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception)
688 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
689 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
690 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
691 #ifdef CONFIG_ALTIVEC
692 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
694 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
696 #ifdef CONFIG_CBE_RAS
697 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
698 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
699 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
700 #endif /* CONFIG_CBE_RAS */
703 * Relocation-on interrupts: A subset of the interrupts can be delivered
704 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
705 * it. Addresses are the same as the original interrupt addresses, but
706 * offset by 0xc000000000004000.
707 * It's impossible to receive interrupts below 0x300 via this mechanism.
708 * KVM: None of these traps are from the guest ; anything that escalated
709 * to HV=1 from HV=0 is delivered via real mode handlers.
713 * This uses the standard macro, since the original 0x300 vector
714 * only has extra guff for STAB-based processors -- which never
717 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
719 .globl data_access_slb_relon_pSeries
720 data_access_slb_relon_pSeries:
721 HMT_MEDIUM_PPR_DISCARD
723 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
724 std r3,PACA_EXSLB+EX_R3(r13)
727 #ifndef CONFIG_RELOCATABLE
731 * We can't just use a direct branch to .slb_miss_realmode
732 * because the distance from here to there depends on where
733 * the kernel ends up being put.
736 ld r10,PACAKBASE(r13)
737 LOAD_HANDLER(r10, .slb_miss_realmode)
742 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
744 .globl instruction_access_slb_relon_pSeries
745 instruction_access_slb_relon_pSeries:
746 HMT_MEDIUM_PPR_DISCARD
748 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
749 std r3,PACA_EXSLB+EX_R3(r13)
750 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
752 #ifndef CONFIG_RELOCATABLE
756 ld r10,PACAKBASE(r13)
757 LOAD_HANDLER(r10, .slb_miss_realmode)
763 .globl hardware_interrupt_relon_pSeries;
764 .globl hardware_interrupt_relon_hv;
765 hardware_interrupt_relon_pSeries:
766 hardware_interrupt_relon_hv:
768 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
770 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
771 ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_206)
772 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
773 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
774 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
775 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
776 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
777 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
778 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
781 .globl system_call_relon_pSeries
782 system_call_relon_pSeries:
785 SYSCALL_PSERIES_2_DIRECT
788 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
791 b h_data_storage_relon_hv
794 b h_instr_storage_relon_hv
797 b emulation_assist_relon_hv
800 b hmi_exception_relon_hv
803 b hmi_exception_relon_hv
806 b h_doorbell_relon_hv
808 performance_monitor_relon_pSeries_1:
810 b performance_monitor_relon_pSeries
812 altivec_unavailable_relon_pSeries_1:
814 b altivec_unavailable_relon_pSeries
816 vsx_unavailable_relon_pSeries_1:
818 b vsx_unavailable_relon_pSeries
820 #ifdef CONFIG_CBE_RAS
821 STD_RELON_EXCEPTION_HV(0x5200, 0x1202, cbe_system_error)
822 #endif /* CONFIG_CBE_RAS */
823 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
824 #ifdef CONFIG_PPC_DENORMALISATION
826 b denorm_exception_hv
828 #ifdef CONFIG_CBE_RAS
829 STD_RELON_EXCEPTION_HV(0x5600, 0x1602, cbe_maintenance)
831 #ifdef CONFIG_HVC_SCOM
832 STD_RELON_EXCEPTION_HV(0x5600, 0x1600, maintence_interrupt)
833 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1600)
834 #endif /* CONFIG_HVC_SCOM */
835 #endif /* CONFIG_CBE_RAS */
836 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
837 #ifdef CONFIG_CBE_RAS
838 STD_RELON_EXCEPTION_HV(0x5800, 0x1802, cbe_thermal)
839 #endif /* CONFIG_CBE_RAS */
841 /* Other future vectors */
843 .globl __end_interrupts
847 system_call_entry_direct:
848 #if defined(CONFIG_RELOCATABLE)
849 /* The first level prologue may have used LR to get here, saving
850 * orig in r10. To save hacking/ifdeffing common code, restore here.
857 ppc64_runlatch_on_trampoline:
858 b .__ppc64_runlatch_on
861 * Here we have detected that the kernel stack pointer is bad.
862 * R9 contains the saved CR, r13 points to the paca,
863 * r10 contains the (bad) kernel stack pointer,
864 * r11 and r12 contain the saved SRR0 and SRR1.
865 * We switch to using an emergency stack, save the registers there,
866 * and call kernel_bad_stack(), which panics.
869 ld r1,PACAEMERGSP(r13)
870 subi r1,r1,64+INT_FRAME_SIZE
902 std r10,ORIG_GPR3(r1)
903 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
906 lhz r12,PACA_TRAP_SAVE(r13)
908 addi r11,r1,INT_FRAME_SIZE
913 ld r11,exception_marker@toc(r2)
915 std r11,STACK_FRAME_OVERHEAD-16(r1)
916 1: addi r3,r1,STACK_FRAME_OVERHEAD
921 * Here r13 points to the paca, r9 contains the saved CR,
922 * SRR0 and SRR1 are saved in r11 and r12,
923 * r9 - r13 are saved in paca->exgen.
926 .globl data_access_common
929 std r10,PACA_EXGEN+EX_DAR(r13)
931 stw r10,PACA_EXGEN+EX_DSISR(r13)
932 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
935 ld r3,PACA_EXGEN+EX_DAR(r13)
936 lwz r4,PACA_EXGEN+EX_DSISR(r13)
938 b .do_hash_page /* Try to handle as hpte fault */
941 .globl h_data_storage_common
942 h_data_storage_common:
944 std r10,PACA_EXGEN+EX_DAR(r13)
945 mfspr r10,SPRN_HDSISR
946 stw r10,PACA_EXGEN+EX_DSISR(r13)
947 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
950 addi r3,r1,STACK_FRAME_OVERHEAD
951 bl .unknown_exception
955 .globl instruction_access_common
956 instruction_access_common:
957 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
963 b .do_hash_page /* Try to handle as hpte fault */
965 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
968 * Here is the common SLB miss user that is used when going to virtual
969 * mode for SLB misses, that is currently not used
973 .globl slb_miss_user_common
974 slb_miss_user_common:
976 std r3,PACA_EXGEN+EX_DAR(r13)
977 stw r9,PACA_EXGEN+EX_CCR(r13)
978 std r10,PACA_EXGEN+EX_LR(r13)
979 std r11,PACA_EXGEN+EX_SRR0(r13)
980 bl .slb_allocate_user
982 ld r10,PACA_EXGEN+EX_LR(r13)
983 ld r3,PACA_EXGEN+EX_R3(r13)
984 lwz r9,PACA_EXGEN+EX_CCR(r13)
985 ld r11,PACA_EXGEN+EX_SRR0(r13)
989 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
990 beq- unrecov_user_slb
998 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1004 ld r9,PACA_EXGEN+EX_R9(r13)
1005 ld r10,PACA_EXGEN+EX_R10(r13)
1006 ld r11,PACA_EXGEN+EX_R11(r13)
1007 ld r12,PACA_EXGEN+EX_R12(r13)
1008 ld r13,PACA_EXGEN+EX_R13(r13)
1013 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1014 ld r4,PACA_EXGEN+EX_DAR(r13)
1021 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1024 1: addi r3,r1,STACK_FRAME_OVERHEAD
1025 bl .unrecoverable_exception
1028 #endif /* __DISABLED__ */
1032 * r13 points to the PACA, r9 contains the saved CR,
1033 * r12 contain the saved SRR1, SRR0 is still ready for return
1034 * r3 has the faulting address
1035 * r9 - r13 are saved in paca->exslb.
1036 * r3 is saved in paca->slb_r3
1037 * We assume we aren't going to take any exceptions during this procedure.
1039 _GLOBAL(slb_miss_realmode)
1041 #ifdef CONFIG_RELOCATABLE
1045 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1046 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1048 bl .slb_allocate_realmode
1050 /* All done -- return from exception. */
1052 ld r10,PACA_EXSLB+EX_LR(r13)
1053 ld r3,PACA_EXSLB+EX_R3(r13)
1054 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1058 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1064 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1067 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1068 ld r9,PACA_EXSLB+EX_R9(r13)
1069 ld r10,PACA_EXSLB+EX_R10(r13)
1070 ld r11,PACA_EXSLB+EX_R11(r13)
1071 ld r12,PACA_EXSLB+EX_R12(r13)
1072 ld r13,PACA_EXSLB+EX_R13(r13)
1074 b . /* prevent speculative execution */
1076 2: mfspr r11,SPRN_SRR0
1077 ld r10,PACAKBASE(r13)
1078 LOAD_HANDLER(r10,unrecov_slb)
1080 ld r10,PACAKMSR(r13)
1086 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1089 1: addi r3,r1,STACK_FRAME_OVERHEAD
1090 bl .unrecoverable_exception
1094 #ifdef CONFIG_PPC_970_NAP
1097 std r9,TI_LOCAL_FLAGS(r11)
1098 ld r10,_LINK(r1) /* make idle task do the */
1099 std r10,_NIP(r1) /* equivalent of a blr */
1104 .globl alignment_common
1107 std r10,PACA_EXGEN+EX_DAR(r13)
1108 mfspr r10,SPRN_DSISR
1109 stw r10,PACA_EXGEN+EX_DSISR(r13)
1110 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1111 ld r3,PACA_EXGEN+EX_DAR(r13)
1112 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1117 addi r3,r1,STACK_FRAME_OVERHEAD
1118 bl .alignment_exception
1122 .globl program_check_common
1123 program_check_common:
1124 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1127 addi r3,r1,STACK_FRAME_OVERHEAD
1128 bl .program_check_exception
1132 .globl fp_unavailable_common
1133 fp_unavailable_common:
1134 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1135 bne 1f /* if from user, just load it up */
1138 addi r3,r1,STACK_FRAME_OVERHEAD
1139 bl .kernel_fp_unavailable_exception
1142 b fast_exception_return
1145 .globl altivec_unavailable_common
1146 altivec_unavailable_common:
1147 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1148 #ifdef CONFIG_ALTIVEC
1152 b fast_exception_return
1154 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1158 addi r3,r1,STACK_FRAME_OVERHEAD
1159 bl .altivec_unavailable_exception
1163 .globl vsx_unavailable_common
1164 vsx_unavailable_common:
1165 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1171 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1175 addi r3,r1,STACK_FRAME_OVERHEAD
1176 bl .vsx_unavailable_exception
1180 .globl __end_handlers
1187 _STATIC(do_hash_page)
1191 andis. r0,r4,0xa410 /* weird error? */
1192 bne- handle_page_fault /* if not, try to insert a HPTE */
1193 andis. r0,r4,DSISR_DABRMATCH@h
1194 bne- handle_dabr_fault
1197 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1198 bne- do_ste_alloc /* If so handle it */
1199 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1201 CURRENT_THREAD_INFO(r11, r1)
1202 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1203 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1204 bne 77f /* then don't call hash_page now */
1206 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1207 * accessing a userspace segment (even from the kernel). We assume
1208 * kernel addresses always have the high bit set.
1210 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1211 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1212 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1213 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1214 ori r4,r4,1 /* add _PAGE_PRESENT */
1215 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1218 * r3 contains the faulting address
1219 * r4 contains the required access permissions
1220 * r5 contains the trap number
1222 * at return r3 = 0 for success, 1 for page fault, negative for error
1224 bl .hash_page /* build HPTE if possible */
1225 cmpdi r3,0 /* see if hash_page succeeded */
1228 beq fast_exc_return_irq /* Return from exception on success */
1233 /* Here we have a page fault that hash_page can't handle. */
1237 addi r3,r1,STACK_FRAME_OVERHEAD
1243 addi r3,r1,STACK_FRAME_OVERHEAD
1248 /* We have a data breakpoint exception - handle it */
1253 addi r3,r1,STACK_FRAME_OVERHEAD
1255 12: b .ret_from_except_lite
1258 /* We have a page fault that hash_page could handle but HV refused
1263 addi r3,r1,STACK_FRAME_OVERHEAD
1269 * We come here as a result of a DSI at a point where we don't want
1270 * to call hash_page, such as when we are accessing memory (possibly
1271 * user memory) inside a PMU interrupt that occurred while interrupts
1272 * were soft-disabled. We want to invoke the exception handler for
1273 * the access, or panic if there isn't a handler.
1277 addi r3,r1,STACK_FRAME_OVERHEAD
1282 /* here we have a segment miss */
1284 bl .ste_allocate /* try to insert stab entry */
1286 bne- handle_page_fault
1287 b fast_exception_return
1290 * r13 points to the PACA, r9 contains the saved CR,
1291 * r11 and r12 contain the saved SRR0 and SRR1.
1292 * r9 - r13 are saved in paca->exslb.
1293 * We assume we aren't going to take any exceptions during this procedure.
1294 * We assume (DAR >> 60) == 0xc.
1297 _GLOBAL(do_stab_bolted)
1298 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1299 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1301 /* Hash to the primary group */
1302 ld r10,PACASTABVIRT(r13)
1305 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1307 /* Calculate VSID */
1308 /* This is a kernel address, so protovsid = ESID | 1 << 37 */
1310 rldimi r11,r9,(CONTEXT_BITS + USER_ESID_BITS),0
1311 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1312 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1314 /* Search the primary group for a free entry */
1315 1: ld r11,0(r10) /* Test valid bit of the current ste */
1322 /* Stick for only searching the primary group for now. */
1323 /* At least for now, we use a very simple random castout scheme */
1324 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1326 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1329 /* r10 currently points to an ste one past the group of interest */
1330 /* make it point to the randomly selected entry */
1332 or r10,r10,r11 /* r10 is the entry to invalidate */
1334 isync /* mark the entry invalid */
1336 rldicl r11,r11,56,1 /* clear the valid bit */
1341 clrrdi r11,r11,28 /* Get the esid part of the ste */
1344 2: std r9,8(r10) /* Store the vsid part of the ste */
1347 mfspr r11,SPRN_DAR /* Get the new esid */
1348 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1349 ori r11,r11,0x90 /* Turn on valid and kp */
1350 std r11,0(r10) /* Put new entry back into the stab */
1354 /* All done -- return from exception. */
1355 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1356 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1358 andi. r10,r12,MSR_RI
1361 mtcrf 0x80,r9 /* restore CR */
1369 ld r9,PACA_EXSLB+EX_R9(r13)
1370 ld r10,PACA_EXSLB+EX_R10(r13)
1371 ld r11,PACA_EXSLB+EX_R11(r13)
1372 ld r12,PACA_EXSLB+EX_R12(r13)
1373 ld r13,PACA_EXSLB+EX_R13(r13)
1375 b . /* prevent speculative execution */
1378 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1379 STD_RELON_EXCEPTION_HV(., 0xe00, h_data_storage)
1380 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe00)
1381 STD_RELON_EXCEPTION_HV(., 0xe20, h_instr_storage)
1382 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe20)
1383 STD_RELON_EXCEPTION_HV(., 0xe40, emulation_assist)
1384 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe40)
1385 STD_RELON_EXCEPTION_HV(., 0xe60, hmi_exception)
1386 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe60)
1387 MASKABLE_RELON_EXCEPTION_HV(., 0xe80, h_doorbell)
1388 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe80)
1390 STD_RELON_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
1391 STD_RELON_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
1392 STD_RELON_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
1394 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1396 * Data area reserved for FWNMI option.
1397 * This address (0x7000) is fixed by the RPA.
1400 .globl fwnmi_data_area
1403 /* pseries and powernv need to keep the whole page from
1404 * 0x7000 to 0x8000 free for use by the firmware
1407 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1409 /* Space for CPU0's segment table */
1415 #ifdef CONFIG_PPC_POWERNV
1416 _GLOBAL(opal_mc_secondary_handler)
1417 HMT_MEDIUM_PPR_DISCARD
1422 std r3,PACA_OPAL_MC_EVT(r13)
1423 ld r13,OPAL_MC_SRR0(r3)
1425 ld r13,OPAL_MC_SRR1(r3)
1427 ld r3,OPAL_MC_GPR3(r3)
1429 b machine_check_pSeries
1430 #endif /* CONFIG_PPC_POWERNV */