2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x2fff : pSeries Interrupt prologs
23 * 0x3000 - 0x5fff : interrupt support common interrupt prologs
24 * 0x6000 - 0x6fff : Initial (CPU0) segment table
25 * 0x7000 - 0x7fff : FWNMI data area
26 * 0x8000 - : Early init and support code
30 * This is the start of the interrupt handlers for pSeries
31 * This code runs with relocation off.
32 * Code from here to __end_interrupts gets copied down to real
33 * address 0x100 when we are running a relocatable kernel.
34 * Therefore any relative branches in this section must only
35 * branch to labels in this section.
38 .globl __start_interrupts
41 .globl system_reset_pSeries;
45 #ifdef CONFIG_PPC_P7_NAP
47 /* Running native on arch 2.06 or later, check if we are
48 * waking up from nap. We only handle no state loss and
49 * supervisor state loss. We do -not- handle hypervisor
50 * state loss at this time.
53 rlwinm. r13,r13,47-31,30,31
56 /* waking up from powersave (nap) state */
58 /* Total loss of HV state is fatal, we could try to use the
59 * PIR to locate a PACA, then use an emergency stack etc...
60 * but for now, let's just stay stuck here
65 #ifdef CONFIG_KVM_BOOK3S_64_HV
66 li r0,KVM_HWTHREAD_IN_KERNEL
67 stb r0,HSTATE_HWTHREAD_STATE(r13)
68 /* Order setting hwthread_state vs. testing hwthread_req */
70 lbz r0,HSTATE_HWTHREAD_REQ(r13)
78 b .power7_wakeup_noloss
79 2: b .power7_wakeup_loss
81 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
82 #endif /* CONFIG_PPC_P7_NAP */
83 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
87 machine_check_pSeries_1:
88 /* This is moved out of line as it can be patched by FW, but
89 * some code path might still want to branch into the original
92 b machine_check_pSeries
95 .globl data_access_pSeries
100 b data_access_check_stab
101 data_access_not_stab:
102 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
103 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
107 .globl data_access_slb_pSeries
108 data_access_slb_pSeries:
111 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
112 std r3,PACA_EXSLB+EX_R3(r13)
115 /* Keep that around for when we re-implement dynamic VSIDs */
117 bge slb_miss_user_pseries
118 #endif /* __DISABLED__ */
120 #ifndef CONFIG_RELOCATABLE
124 * We can't just use a direct branch to .slb_miss_realmode
125 * because the distance from here to there depends on where
126 * the kernel ends up being put.
129 ld r10,PACAKBASE(r13)
130 LOAD_HANDLER(r10, .slb_miss_realmode)
135 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
138 .globl instruction_access_slb_pSeries
139 instruction_access_slb_pSeries:
142 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
143 std r3,PACA_EXSLB+EX_R3(r13)
144 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
146 /* Keep that around for when we re-implement dynamic VSIDs */
148 bge slb_miss_user_pseries
149 #endif /* __DISABLED__ */
151 #ifndef CONFIG_RELOCATABLE
155 ld r10,PACAKBASE(r13)
156 LOAD_HANDLER(r10, .slb_miss_realmode)
161 /* We open code these as we can't have a ". = x" (even with
162 * x = "." within a feature section
165 .globl hardware_interrupt_pSeries;
166 .globl hardware_interrupt_hv;
167 hardware_interrupt_pSeries:
168 hardware_interrupt_hv:
170 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
171 EXC_HV, SOFTEN_TEST_HV)
172 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
174 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
175 EXC_STD, SOFTEN_TEST_HV_201)
176 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
177 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
179 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
180 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
182 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
183 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
185 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
186 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
188 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
189 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
191 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
192 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
194 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
195 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
198 .globl system_call_pSeries
201 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
204 std r9,PACA_EXGEN+EX_R9(r13)
205 std r10,PACA_EXGEN+EX_R10(r13)
213 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
218 ld r10,PACAKBASE(r13)
219 LOAD_HANDLER(r10, system_call_entry)
224 b . /* prevent speculative execution */
226 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
228 /* Fast LE/BE switch system call */
229 1: mfspr r12,SPRN_SRR1
232 rfid /* return to userspace */
235 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
236 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
238 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
239 * out of line to handle them
242 hv_exception_trampoline:
247 b emulation_assist_hv
253 /* We need to deal with the Altivec unavailable exception
254 * here which is at 0xf20, thus in the middle of the
255 * prolog code of the PerformanceMonitor one. A little
256 * trickery is thus necessary
258 performance_monitor_pSeries_1:
260 b performance_monitor_pSeries
262 altivec_unavailable_pSeries_1:
264 b altivec_unavailable_pSeries
266 vsx_unavailable_pSeries_1:
268 b vsx_unavailable_pSeries
270 #ifdef CONFIG_CBE_RAS
271 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
272 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
273 #endif /* CONFIG_CBE_RAS */
275 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
276 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
279 .global denorm_exception_hv
282 mtspr SPRN_SPRG_HSCRATCH0,r13
283 mfspr r13,SPRN_SPRG_HPACA
284 std r9,PACA_EXGEN+EX_R9(r13)
285 std r10,PACA_EXGEN+EX_R10(r13)
286 std r11,PACA_EXGEN+EX_R11(r13)
287 std r12,PACA_EXGEN+EX_R12(r13)
288 mfspr r9,SPRN_SPRG_HSCRATCH0
289 std r9,PACA_EXGEN+EX_R13(r13)
292 #ifdef CONFIG_PPC_DENORMALISATION
294 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
295 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
296 addi r11,r11,-4 /* HSRR0 is next instruction */
300 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
301 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
303 #ifdef CONFIG_CBE_RAS
304 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
305 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
306 #endif /* CONFIG_CBE_RAS */
308 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
309 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
311 #ifdef CONFIG_CBE_RAS
312 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
313 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
314 #endif /* CONFIG_CBE_RAS */
318 /*** Out of line interrupts support ***/
320 /* moved from 0x200 */
321 machine_check_pSeries:
322 .globl machine_check_fwnmi
325 SET_SCRATCH0(r13) /* save r13 */
326 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
327 EXC_STD, KVMTEST, 0x200)
328 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
330 /* moved from 0x300 */
331 data_access_check_stab:
333 std r9,PACA_EXSLB+EX_R9(r13)
334 std r10,PACA_EXSLB+EX_R10(r13)
338 rlwimi r10,r9,16,0x20
339 #ifdef CONFIG_KVM_BOOK3S_PR
340 lbz r9,HSTATE_IN_GUEST(r13)
341 rlwimi r10,r9,8,0x300
345 beq do_stab_bolted_pSeries
347 ld r9,PACA_EXSLB+EX_R9(r13)
348 ld r10,PACA_EXSLB+EX_R10(r13)
349 b data_access_not_stab
350 do_stab_bolted_pSeries:
351 std r11,PACA_EXSLB+EX_R11(r13)
352 std r12,PACA_EXSLB+EX_R12(r13)
354 std r10,PACA_EXSLB+EX_R13(r13)
355 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
357 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
358 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
359 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
360 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
361 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
362 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
364 #ifdef CONFIG_PPC_DENORMALISATION
368 * To denormalise we need to move a copy of the register to itself.
369 * For POWER6 do that here for all FP regs.
372 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
373 xori r10,r10,(MSR_FE0|MSR_FE1)
410 * To denormalise we need to move a copy of the register to itself.
411 * For POWER7 do that here for the first 32 VSX registers only.
414 oris r10,r10,MSR_VSX@h
449 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
452 ld r9,PACA_EXGEN+EX_R9(r13)
453 ld r10,PACA_EXGEN+EX_R10(r13)
454 ld r11,PACA_EXGEN+EX_R11(r13)
455 ld r12,PACA_EXGEN+EX_R12(r13)
456 ld r13,PACA_EXGEN+EX_R13(r13)
462 /* moved from 0xe00 */
463 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
464 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
465 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
466 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
467 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
468 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
469 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
470 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
472 /* moved from 0xf00 */
473 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
474 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
475 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
476 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
477 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
478 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
481 * An interrupt came in while soft-disabled. We set paca->irq_happened,
482 * then, if it was a decrementer interrupt, we bump the dec to max and
483 * and return, else we hard disable and return. This is called with
484 * r10 containing the value to OR to the paca field.
486 #define MASKED_INTERRUPT(_H) \
487 masked_##_H##interrupt: \
488 std r11,PACA_EXGEN+EX_R11(r13); \
489 lbz r11,PACAIRQHAPPENED(r13); \
491 stb r11,PACAIRQHAPPENED(r13); \
492 andi. r10,r10,PACA_IRQ_DEC; \
495 ori r10,r10,0xffff; \
496 mtspr SPRN_DEC,r10; \
498 1: mfspr r10,SPRN_##_H##SRR1; \
499 rldicl r10,r10,48,1; /* clear MSR_EE */ \
501 mtspr SPRN_##_H##SRR1,r10; \
503 ld r9,PACA_EXGEN+EX_R9(r13); \
504 ld r10,PACA_EXGEN+EX_R10(r13); \
505 ld r11,PACA_EXGEN+EX_R11(r13); \
514 * Called from arch_local_irq_enable when an interrupt needs
515 * to be resent. r3 contains 0x500 or 0x900 to indicate which
516 * kind of interrupt. MSR:EE is already off. We generate a
517 * stackframe like if a real interrupt had happened.
519 * Note: While MSR:EE is off, we need to make sure that _MSR
520 * in the generated frame has EE set to 1 or the exception
521 * handler will not properly re-enable them.
523 _GLOBAL(__replay_interrupt)
524 /* We are going to jump to the exception common code which
525 * will retrieve various register values from the PACA which
526 * we don't give a damn about, so we don't bother storing them.
533 bne decrementer_common
534 b hardware_interrupt_common
536 #ifdef CONFIG_PPC_PSERIES
538 * Vectors for the FWNMI option. Share common code.
540 .globl system_reset_fwnmi
544 SET_SCRATCH0(r13) /* save r13 */
545 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
548 #endif /* CONFIG_PPC_PSERIES */
552 * This is used for when the SLB miss handler has to go virtual,
553 * which doesn't happen for now anymore but will once we re-implement
554 * dynamic VSIDs for shared page tables
556 slb_miss_user_pseries:
557 std r10,PACA_EXGEN+EX_R10(r13)
558 std r11,PACA_EXGEN+EX_R11(r13)
559 std r12,PACA_EXGEN+EX_R12(r13)
561 ld r11,PACA_EXSLB+EX_R9(r13)
562 ld r12,PACA_EXSLB+EX_R3(r13)
563 std r10,PACA_EXGEN+EX_R13(r13)
564 std r11,PACA_EXGEN+EX_R9(r13)
565 std r12,PACA_EXGEN+EX_R3(r13)
568 mfspr r11,SRR0 /* save SRR0 */
569 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
570 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
572 mfspr r12,SRR1 /* and SRR1 */
575 b . /* prevent spec. execution */
576 #endif /* __DISABLED__ */
579 .globl __end_interrupts
583 * Code from here down to __end_handlers is invoked from the
584 * exception prologs above. Because the prologs assemble the
585 * addresses of these handlers using the LOAD_HANDLER macro,
586 * which uses an addi instruction, these handlers must be in
587 * the first 32k of the kernel image.
590 /*** Common interrupt handlers ***/
592 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
595 * Machine check is different because we use a different
596 * save area: PACA_EXMC instead of PACA_EXGEN.
599 .globl machine_check_common
600 machine_check_common:
601 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
605 addi r3,r1,STACK_FRAME_OVERHEAD
606 bl .machine_check_exception
609 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
610 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
611 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
612 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
613 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
614 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
615 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
616 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
617 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
618 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
619 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
620 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
621 #ifdef CONFIG_ALTIVEC
622 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
624 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
626 #ifdef CONFIG_CBE_RAS
627 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
628 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
629 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
630 #endif /* CONFIG_CBE_RAS */
636 ppc64_runlatch_on_trampoline:
637 b .__ppc64_runlatch_on
640 * Here we have detected that the kernel stack pointer is bad.
641 * R9 contains the saved CR, r13 points to the paca,
642 * r10 contains the (bad) kernel stack pointer,
643 * r11 and r12 contain the saved SRR0 and SRR1.
644 * We switch to using an emergency stack, save the registers there,
645 * and call kernel_bad_stack(), which panics.
648 ld r1,PACAEMERGSP(r13)
649 subi r1,r1,64+INT_FRAME_SIZE
681 std r10,ORIG_GPR3(r1)
682 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
685 lhz r12,PACA_TRAP_SAVE(r13)
687 addi r11,r1,INT_FRAME_SIZE
692 ld r11,exception_marker@toc(r2)
694 std r11,STACK_FRAME_OVERHEAD-16(r1)
695 1: addi r3,r1,STACK_FRAME_OVERHEAD
700 * Here r13 points to the paca, r9 contains the saved CR,
701 * SRR0 and SRR1 are saved in r11 and r12,
702 * r9 - r13 are saved in paca->exgen.
705 .globl data_access_common
708 std r10,PACA_EXGEN+EX_DAR(r13)
710 stw r10,PACA_EXGEN+EX_DSISR(r13)
711 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
714 ld r3,PACA_EXGEN+EX_DAR(r13)
715 lwz r4,PACA_EXGEN+EX_DSISR(r13)
717 b .do_hash_page /* Try to handle as hpte fault */
720 .globl h_data_storage_common
721 h_data_storage_common:
723 std r10,PACA_EXGEN+EX_DAR(r13)
724 mfspr r10,SPRN_HDSISR
725 stw r10,PACA_EXGEN+EX_DSISR(r13)
726 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
729 addi r3,r1,STACK_FRAME_OVERHEAD
730 bl .unknown_exception
734 .globl instruction_access_common
735 instruction_access_common:
736 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
742 b .do_hash_page /* Try to handle as hpte fault */
744 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
747 * Here is the common SLB miss user that is used when going to virtual
748 * mode for SLB misses, that is currently not used
752 .globl slb_miss_user_common
753 slb_miss_user_common:
755 std r3,PACA_EXGEN+EX_DAR(r13)
756 stw r9,PACA_EXGEN+EX_CCR(r13)
757 std r10,PACA_EXGEN+EX_LR(r13)
758 std r11,PACA_EXGEN+EX_SRR0(r13)
759 bl .slb_allocate_user
761 ld r10,PACA_EXGEN+EX_LR(r13)
762 ld r3,PACA_EXGEN+EX_R3(r13)
763 lwz r9,PACA_EXGEN+EX_CCR(r13)
764 ld r11,PACA_EXGEN+EX_SRR0(r13)
768 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
769 beq- unrecov_user_slb
777 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
783 ld r9,PACA_EXGEN+EX_R9(r13)
784 ld r10,PACA_EXGEN+EX_R10(r13)
785 ld r11,PACA_EXGEN+EX_R11(r13)
786 ld r12,PACA_EXGEN+EX_R12(r13)
787 ld r13,PACA_EXGEN+EX_R13(r13)
792 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
793 ld r4,PACA_EXGEN+EX_DAR(r13)
800 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
803 1: addi r3,r1,STACK_FRAME_OVERHEAD
804 bl .unrecoverable_exception
807 #endif /* __DISABLED__ */
811 * r13 points to the PACA, r9 contains the saved CR,
812 * r12 contain the saved SRR1, SRR0 is still ready for return
813 * r3 has the faulting address
814 * r9 - r13 are saved in paca->exslb.
815 * r3 is saved in paca->slb_r3
816 * We assume we aren't going to take any exceptions during this procedure.
818 _GLOBAL(slb_miss_realmode)
820 #ifdef CONFIG_RELOCATABLE
824 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
825 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
827 bl .slb_allocate_realmode
829 /* All done -- return from exception. */
831 ld r10,PACA_EXSLB+EX_LR(r13)
832 ld r3,PACA_EXSLB+EX_R3(r13)
833 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
837 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
843 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
846 ld r9,PACA_EXSLB+EX_R9(r13)
847 ld r10,PACA_EXSLB+EX_R10(r13)
848 ld r11,PACA_EXSLB+EX_R11(r13)
849 ld r12,PACA_EXSLB+EX_R12(r13)
850 ld r13,PACA_EXSLB+EX_R13(r13)
852 b . /* prevent speculative execution */
854 2: mfspr r11,SPRN_SRR0
855 ld r10,PACAKBASE(r13)
856 LOAD_HANDLER(r10,unrecov_slb)
864 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
867 1: addi r3,r1,STACK_FRAME_OVERHEAD
868 bl .unrecoverable_exception
872 #ifdef CONFIG_PPC_970_NAP
875 std r9,TI_LOCAL_FLAGS(r11)
876 ld r10,_LINK(r1) /* make idle task do the */
877 std r10,_NIP(r1) /* equivalent of a blr */
882 .globl alignment_common
885 std r10,PACA_EXGEN+EX_DAR(r13)
887 stw r10,PACA_EXGEN+EX_DSISR(r13)
888 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
889 ld r3,PACA_EXGEN+EX_DAR(r13)
890 lwz r4,PACA_EXGEN+EX_DSISR(r13)
895 addi r3,r1,STACK_FRAME_OVERHEAD
896 bl .alignment_exception
900 .globl program_check_common
901 program_check_common:
902 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
905 addi r3,r1,STACK_FRAME_OVERHEAD
906 bl .program_check_exception
910 .globl fp_unavailable_common
911 fp_unavailable_common:
912 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
913 bne 1f /* if from user, just load it up */
916 addi r3,r1,STACK_FRAME_OVERHEAD
917 bl .kernel_fp_unavailable_exception
920 b fast_exception_return
923 .globl altivec_unavailable_common
924 altivec_unavailable_common:
925 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
926 #ifdef CONFIG_ALTIVEC
930 b fast_exception_return
932 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
936 addi r3,r1,STACK_FRAME_OVERHEAD
937 bl .altivec_unavailable_exception
941 .globl vsx_unavailable_common
942 vsx_unavailable_common:
943 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
949 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
953 addi r3,r1,STACK_FRAME_OVERHEAD
954 bl .vsx_unavailable_exception
958 .globl __end_handlers
965 _STATIC(do_hash_page)
969 andis. r0,r4,0xa410 /* weird error? */
970 bne- handle_page_fault /* if not, try to insert a HPTE */
971 andis. r0,r4,DSISR_DABRMATCH@h
972 bne- handle_dabr_fault
975 andis. r0,r4,0x0020 /* Is it a segment table fault? */
976 bne- do_ste_alloc /* If so handle it */
977 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
979 CURRENT_THREAD_INFO(r11, r1)
980 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
981 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
982 bne 77f /* then don't call hash_page now */
984 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
985 * accessing a userspace segment (even from the kernel). We assume
986 * kernel addresses always have the high bit set.
988 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
989 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
990 orc r0,r12,r0 /* MSR_PR | ~high_bit */
991 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
992 ori r4,r4,1 /* add _PAGE_PRESENT */
993 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
996 * r3 contains the faulting address
997 * r4 contains the required access permissions
998 * r5 contains the trap number
1000 * at return r3 = 0 for success, 1 for page fault, negative for error
1002 bl .hash_page /* build HPTE if possible */
1003 cmpdi r3,0 /* see if hash_page succeeded */
1006 beq fast_exc_return_irq /* Return from exception on success */
1011 /* Here we have a page fault that hash_page can't handle. */
1015 addi r3,r1,STACK_FRAME_OVERHEAD
1021 addi r3,r1,STACK_FRAME_OVERHEAD
1026 /* We have a data breakpoint exception - handle it */
1031 addi r3,r1,STACK_FRAME_OVERHEAD
1033 12: b .ret_from_except_lite
1036 /* We have a page fault that hash_page could handle but HV refused
1041 addi r3,r1,STACK_FRAME_OVERHEAD
1047 * We come here as a result of a DSI at a point where we don't want
1048 * to call hash_page, such as when we are accessing memory (possibly
1049 * user memory) inside a PMU interrupt that occurred while interrupts
1050 * were soft-disabled. We want to invoke the exception handler for
1051 * the access, or panic if there isn't a handler.
1055 addi r3,r1,STACK_FRAME_OVERHEAD
1060 /* here we have a segment miss */
1062 bl .ste_allocate /* try to insert stab entry */
1064 bne- handle_page_fault
1065 b fast_exception_return
1068 * r13 points to the PACA, r9 contains the saved CR,
1069 * r11 and r12 contain the saved SRR0 and SRR1.
1070 * r9 - r13 are saved in paca->exslb.
1071 * We assume we aren't going to take any exceptions during this procedure.
1072 * We assume (DAR >> 60) == 0xc.
1075 _GLOBAL(do_stab_bolted)
1076 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1077 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1079 /* Hash to the primary group */
1080 ld r10,PACASTABVIRT(r13)
1083 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1085 /* Calculate VSID */
1086 /* This is a kernel address, so protovsid = ESID | 1 << 37 */
1088 rldimi r11,r9,(CONTEXT_BITS + USER_ESID_BITS),0
1089 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1090 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1092 /* Search the primary group for a free entry */
1093 1: ld r11,0(r10) /* Test valid bit of the current ste */
1100 /* Stick for only searching the primary group for now. */
1101 /* At least for now, we use a very simple random castout scheme */
1102 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1104 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1107 /* r10 currently points to an ste one past the group of interest */
1108 /* make it point to the randomly selected entry */
1110 or r10,r10,r11 /* r10 is the entry to invalidate */
1112 isync /* mark the entry invalid */
1114 rldicl r11,r11,56,1 /* clear the valid bit */
1119 clrrdi r11,r11,28 /* Get the esid part of the ste */
1122 2: std r9,8(r10) /* Store the vsid part of the ste */
1125 mfspr r11,SPRN_DAR /* Get the new esid */
1126 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1127 ori r11,r11,0x90 /* Turn on valid and kp */
1128 std r11,0(r10) /* Put new entry back into the stab */
1132 /* All done -- return from exception. */
1133 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1134 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1136 andi. r10,r12,MSR_RI
1139 mtcrf 0x80,r9 /* restore CR */
1147 ld r9,PACA_EXSLB+EX_R9(r13)
1148 ld r10,PACA_EXSLB+EX_R10(r13)
1149 ld r11,PACA_EXSLB+EX_R11(r13)
1150 ld r12,PACA_EXSLB+EX_R12(r13)
1151 ld r13,PACA_EXSLB+EX_R13(r13)
1153 b . /* prevent speculative execution */
1155 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1157 * Data area reserved for FWNMI option.
1158 * This address (0x7000) is fixed by the RPA.
1161 .globl fwnmi_data_area
1164 /* pseries and powernv need to keep the whole page from
1165 * 0x7000 to 0x8000 free for use by the firmware
1168 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1170 /* Space for CPU0's segment table */
1176 #ifdef CONFIG_PPC_POWERNV
1177 _GLOBAL(opal_mc_secondary_handler)
1183 std r3,PACA_OPAL_MC_EVT(r13)
1184 ld r13,OPAL_MC_SRR0(r3)
1186 ld r13,OPAL_MC_SRR1(r3)
1188 ld r3,OPAL_MC_GPR3(r3)
1190 b machine_check_pSeries
1191 #endif /* CONFIG_PPC_POWERNV */