arch/powerpc/boot/dts/mpc8641_hpcn.dts

   1 /*
   2  * MPC8641 HPCN Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 / {
  14         model = "MPC8641HPCN";
  15         compatible = "mpc86xx";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         aliases {
  20                 ethernet0 = &enet0;
  21                 ethernet1 = &enet1;
  22                 ethernet2 = &enet2;
  23                 ethernet3 = &enet3;
  24                 serial0 = &serial0;
  25                 serial1 = &serial1;
  26                 pci0 = &pci0;
  27                 pci1 = &pci1;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 PowerPC,8641@0 {
  35                         device_type = "cpu";
  36                         reg = <0>;
  37                         d-cache-line-size = <20>;       // 32 bytes
  38                         i-cache-line-size = <20>;       // 32 bytes
  39                         d-cache-size = <8000>;          // L1, 32K
  40                         i-cache-size = <8000>;          // L1, 32K
  41                         timebase-frequency = <0>;       // 33 MHz, from uboot
  42                         bus-frequency = <0>;            // From uboot
  43                         clock-frequency = <0>;          // From uboot
  44                 };
  45                 PowerPC,8641@1 {
  46                         device_type = "cpu";
  47                         reg = <1>;
  48                         d-cache-line-size = <20>;       // 32 bytes
  49                         i-cache-line-size = <20>;       // 32 bytes
  50                         d-cache-size = <8000>;          // L1, 32K
  51                         i-cache-size = <8000>;          // L1, 32K
  52                         timebase-frequency = <0>;       // 33 MHz, from uboot
  53                         bus-frequency = <0>;            // From uboot
  54                         clock-frequency = <0>;          // From uboot
  55                 };
  56         };
  57
  58         memory {
  59                 device_type = "memory";
  60                 reg = <00000000 40000000>;      // 1G at 0x0
  61         };
  62
  63         soc8641@f8000000 {
  64                 #address-cells = <1>;
  65                 #size-cells = <1>;
  66                 device_type = "soc";
  67                 ranges = <00000000 f8000000 00100000>;
  68                 reg = <f8000000 00001000>;      // CCSRBAR
  69                 bus-frequency = <0>;
  70
  71                 i2c@3000 {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74                         cell-index = <0>;
  75                         compatible = "fsl-i2c";
  76                         reg = <3000 100>;
  77                         interrupts = <2b 2>;
  78                         interrupt-parent = <&mpic>;
  79                         dfsrr;
  80                 };
  81
  82                 i2c@3100 {
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                         cell-index = <1>;
  86                         compatible = "fsl-i2c";
  87                         reg = <3100 100>;
  88                         interrupts = <2b 2>;
  89                         interrupt-parent = <&mpic>;
  90                         dfsrr;
  91                 };
  92
  93                 mdio@24520 {
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96                         compatible = "fsl,gianfar-mdio";
  97                         reg = <24520 20>;
  98
  99                         phy0: ethernet-phy@0 {
 100                                 interrupt-parent = <&mpic>;
 101                                 interrupts = <a 1>;
 102                                 reg = <0>;
 103                                 device_type = "ethernet-phy";
 104                         };
 105                         phy1: ethernet-phy@1 {
 106                                 interrupt-parent = <&mpic>;
 107                                 interrupts = <a 1>;
 108                                 reg = <1>;
 109                                 device_type = "ethernet-phy";
 110                         };
 111                         phy2: ethernet-phy@2 {
 112                                 interrupt-parent = <&mpic>;
 113                                 interrupts = <a 1>;
 114                                 reg = <2>;
 115                                 device_type = "ethernet-phy";
 116                         };
 117                         phy3: ethernet-phy@3 {
 118                                 interrupt-parent = <&mpic>;
 119                                 interrupts = <a 1>;
 120                                 reg = <3>;
 121                                 device_type = "ethernet-phy";
 122                         };
 123                 };
 124
 125                 enet0: ethernet@24000 {
 126                         cell-index = <0>;
 127                         device_type = "network";
 128                         model = "TSEC";
 129                         compatible = "gianfar";
 130                         reg = <24000 1000>;
 131                         local-mac-address = [ 00 00 00 00 00 00 ];
 132                         interrupts = <1d 2 1e 2 22 2>;
 133                         interrupt-parent = <&mpic>;
 134                         phy-handle = <&phy0>;
 135                         phy-connection-type = "rgmii-id";
 136                 };
 137
 138                 enet1: ethernet@25000 {
 139                         cell-index = <1>;
 140                         device_type = "network";
 141                         model = "TSEC";
 142                         compatible = "gianfar";
 143                         reg = <25000 1000>;
 144                         local-mac-address = [ 00 00 00 00 00 00 ];
 145                         interrupts = <23 2 24 2 28 2>;
 146                         interrupt-parent = <&mpic>;
 147                         phy-handle = <&phy1>;
 148                         phy-connection-type = "rgmii-id";
 149                 };
 150
 151                 enet2: ethernet@26000 {
 152                         cell-index = <2>;
 153                         device_type = "network";
 154                         model = "TSEC";
 155                         compatible = "gianfar";
 156                         reg = <26000 1000>;
 157                         local-mac-address = [ 00 00 00 00 00 00 ];
 158                         interrupts = <1F 2 20 2 21 2>;
 159                         interrupt-parent = <&mpic>;
 160                         phy-handle = <&phy2>;
 161                         phy-connection-type = "rgmii-id";
 162                 };
 163
 164                 enet3: ethernet@27000 {
 165                         cell-index = <3>;
 166                         device_type = "network";
 167                         model = "TSEC";
 168                         compatible = "gianfar";
 169                         reg = <27000 1000>;
 170                         local-mac-address = [ 00 00 00 00 00 00 ];
 171                         interrupts = <25 2 26 2 27 2>;
 172                         interrupt-parent = <&mpic>;
 173                         phy-handle = <&phy3>;
 174                         phy-connection-type = "rgmii-id";
 175                 };
 176
 177                 serial0: serial@4500 {
 178                         device_type = "serial";
 179                         compatible = "ns16550";
 180                         reg = <4500 100>;
 181                         clock-frequency = <0>;
 182                         interrupts = <2a 2>;
 183                         interrupt-parent = <&mpic>;
 184                 };
 185
 186                 serial1: serial@4600 {
 187                         device_type = "serial";
 188                         compatible = "ns16550";
 189                         reg = <4600 100>;
 190                         clock-frequency = <0>;
 191                         interrupts = <1c 2>;
 192                         interrupt-parent = <&mpic>;
 193                 };
 194
 195                 mpic: pic@40000 {
 196                         clock-frequency = <0>;
 197                         interrupt-controller;
 198                         #address-cells = <0>;
 199                         #interrupt-cells = <2>;
 200                         reg = <40000 40000>;
 201                         compatible = "chrp,open-pic";
 202                         device_type = "open-pic";
 203                         big-endian;
 204                 };
 205
 206                 global-utilities@e0000 {
 207                         compatible = "fsl,mpc8641-guts";
 208                         reg = <e0000 1000>;
 209                         fsl,has-rstcr;
 210                 };
 211         };
 212
 213         pci0: pcie@f8008000 {
 214                 compatible = "fsl,mpc8641-pcie";
 215                 device_type = "pci";
 216                 #interrupt-cells = <1>;
 217                 #size-cells = <2>;
 218                 #address-cells = <3>;
 219                 reg = <f8008000 1000>;
 220                 bus-range = <0 ff>;
 221                 ranges = <02000000 0 80000000 80000000 0 20000000
 222                           01000000 0 00000000 e2000000 0 00100000>;
 223                 clock-frequency = <1fca055>;
 224                 interrupt-parent = <&mpic>;
 225                 interrupts = <18 2>;
 226                 interrupt-map-mask = <ff00 0 0 7>;
 227                 interrupt-map = <
 228                         /* IDSEL 0x11 func 0 - PCI slot 1 */
 229                         8800 0 0 1 &mpic 2 1
 230                         8800 0 0 2 &mpic 3 1
 231                         8800 0 0 3 &mpic 4 1
 232                         8800 0 0 4 &mpic 1 1
 233
 234                         /* IDSEL 0x11 func 1 - PCI slot 1 */
 235                         8900 0 0 1 &mpic 2 1
 236                         8900 0 0 2 &mpic 3 1
 237                         8900 0 0 3 &mpic 4 1
 238                         8900 0 0 4 &mpic 1 1
 239
 240                         /* IDSEL 0x11 func 2 - PCI slot 1 */
 241                         8a00 0 0 1 &mpic 2 1
 242                         8a00 0 0 2 &mpic 3 1
 243                         8a00 0 0 3 &mpic 4 1
 244                         8a00 0 0 4 &mpic 1 1
 245
 246                         /* IDSEL 0x11 func 3 - PCI slot 1 */
 247                         8b00 0 0 1 &mpic 2 1
 248                         8b00 0 0 2 &mpic 3 1
 249                         8b00 0 0 3 &mpic 4 1
 250                         8b00 0 0 4 &mpic 1 1
 251
 252                         /* IDSEL 0x11 func 4 - PCI slot 1 */
 253                         8c00 0 0 1 &mpic 2 1
 254                         8c00 0 0 2 &mpic 3 1
 255                         8c00 0 0 3 &mpic 4 1
 256                         8c00 0 0 4 &mpic 1 1
 257
 258                         /* IDSEL 0x11 func 5 - PCI slot 1 */
 259                         8d00 0 0 1 &mpic 2 1
 260                         8d00 0 0 2 &mpic 3 1
 261                         8d00 0 0 3 &mpic 4 1
 262                         8d00 0 0 4 &mpic 1 1
 263
 264                         /* IDSEL 0x11 func 6 - PCI slot 1 */
 265                         8e00 0 0 1 &mpic 2 1
 266                         8e00 0 0 2 &mpic 3 1
 267                         8e00 0 0 3 &mpic 4 1
 268                         8e00 0 0 4 &mpic 1 1
 269
 270                         /* IDSEL 0x11 func 7 - PCI slot 1 */
 271                         8f00 0 0 1 &mpic 2 1
 272                         8f00 0 0 2 &mpic 3 1
 273                         8f00 0 0 3 &mpic 4 1
 274                         8f00 0 0 4 &mpic 1 1
 275
 276                         /* IDSEL 0x12 func 0 - PCI slot 2 */
 277                         9000 0 0 1 &mpic 3 1
 278                         9000 0 0 2 &mpic 4 1
 279                         9000 0 0 3 &mpic 1 1
 280                         9000 0 0 4 &mpic 2 1
 281
 282                         /* IDSEL 0x12 func 1 - PCI slot 2 */
 283                         9100 0 0 1 &mpic 3 1
 284                         9100 0 0 2 &mpic 4 1
 285                         9100 0 0 3 &mpic 1 1
 286                         9100 0 0 4 &mpic 2 1
 287
 288                         /* IDSEL 0x12 func 2 - PCI slot 2 */
 289                         9200 0 0 1 &mpic 3 1
 290                         9200 0 0 2 &mpic 4 1
 291                         9200 0 0 3 &mpic 1 1
 292                         9200 0 0 4 &mpic 2 1
 293
 294                         /* IDSEL 0x12 func 3 - PCI slot 2 */
 295                         9300 0 0 1 &mpic 3 1
 296                         9300 0 0 2 &mpic 4 1
 297                         9300 0 0 3 &mpic 1 1
 298                         9300 0 0 4 &mpic 2 1
 299
 300                         /* IDSEL 0x12 func 4 - PCI slot 2 */
 301                         9400 0 0 1 &mpic 3 1
 302                         9400 0 0 2 &mpic 4 1
 303                         9400 0 0 3 &mpic 1 1
 304                         9400 0 0 4 &mpic 2 1
 305
 306                         /* IDSEL 0x12 func 5 - PCI slot 2 */
 307                         9500 0 0 1 &mpic 3 1
 308                         9500 0 0 2 &mpic 4 1
 309                         9500 0 0 3 &mpic 1 1
 310                         9500 0 0 4 &mpic 2 1
 311
 312                         /* IDSEL 0x12 func 6 - PCI slot 2 */
 313                         9600 0 0 1 &mpic 3 1
 314                         9600 0 0 2 &mpic 4 1
 315                         9600 0 0 3 &mpic 1 1
 316                         9600 0 0 4 &mpic 2 1
 317
 318                         /* IDSEL 0x12 func 7 - PCI slot 2 */
 319                         9700 0 0 1 &mpic 3 1
 320                         9700 0 0 2 &mpic 4 1
 321                         9700 0 0 3 &mpic 1 1
 322                         9700 0 0 4 &mpic 2 1
 323
 324                         // IDSEL 0x1c  USB
 325                         e000 0 0 1 &i8259 c 2
 326                         e100 0 0 1 &i8259 9 2
 327                         e200 0 0 1 &i8259 a 2
 328                         e300 0 0 1 &i8259 b 2
 329
 330                         // IDSEL 0x1d  Audio
 331                         e800 0 0 1 &i8259 6 2
 332
 333                         // IDSEL 0x1e Legacy
 334                         f000 0 0 1 &i8259 7 2
 335                         f100 0 0 1 &i8259 7 2
 336
 337                         // IDSEL 0x1f IDE/SATA
 338                         f800 0 0 1 &i8259 e 2
 339                         f900 0 0 1 &i8259 5 2
 340                         >;
 341
 342                 pcie@0 {
 343                         reg = <0 0 0 0 0>;
 344                         #size-cells = <2>;
 345                         #address-cells = <3>;
 346                         device_type = "pci";
 347                         ranges = <02000000 0 80000000
 348                                   02000000 0 80000000
 349                                   0 20000000
 350
 351                                   01000000 0 00000000
 352                                   01000000 0 00000000
 353                                   0 00100000>;
 354                         uli1575@0 {
 355                                 reg = <0 0 0 0 0>;
 356                                 #size-cells = <2>;
 357                                 #address-cells = <3>;
 358                                 ranges = <02000000 0 80000000
 359                                           02000000 0 80000000
 360                                           0 20000000
 361                                           01000000 0 00000000
 362                                           01000000 0 00000000
 363                                           0 00100000>;
 364                                 isa@1e {
 365                                         device_type = "isa";
 366                                         #interrupt-cells = <2>;
 367                                         #size-cells = <1>;
 368                                         #address-cells = <2>;
 369                                         reg = <f000 0 0 0 0>;
 370                                         ranges = <1 0 01000000 0 0
 371                                                   00001000>;
 372                                         interrupt-parent = <&i8259>;
 373
 374                                         i8259: interrupt-controller@20 {
 375                                                 reg = <1 20 2
 376                                                        1 a0 2
 377                                                        1 4d0 2>;
 378                                                 interrupt-controller;
 379                                                 device_type = "interrupt-controller";
 380                                                 #address-cells = <0>;
 381                                                 #interrupt-cells = <2>;
 382                                                 compatible = "chrp,iic";
 383                                                 interrupts = <9 2>;
 384                                                 interrupt-parent = <&mpic>;
 385                                         };
 386
 387                                         i8042@60 {
 388                                                 #size-cells = <0>;
 389                                                 #address-cells = <1>;
 390                                                 reg = <1 60 1 1 64 1>;
 391                                                 interrupts = <1 3 c 3>;
 392                                                 interrupt-parent =
 393                                                         <&i8259>;
 394
 395                                                 keyboard@0 {
 396                                                         reg = <0>;
 397                                                         compatible = "pnpPNP,303";
 398                                                 };
 399
 400                                                 mouse@1 {
 401                                                         reg = <1>;
 402                                                         compatible = "pnpPNP,f03";
 403                                                 };
 404                                         };
 405
 406                                         rtc@70 {
 407                                                 compatible =
 408                                                         "pnpPNP,b00";
 409                                                 reg = <1 70 2>;
 410                                         };
 411
 412                                         gpio@400 {
 413                                                 reg = <1 400 80>;
 414                                         };
 415                                 };
 416                         };
 417                 };
 418
 419         };
 420
 421         pci1: pcie@f8009000 {
 422                 compatible = "fsl,mpc8641-pcie";
 423                 device_type = "pci";
 424                 #interrupt-cells = <1>;
 425                 #size-cells = <2>;
 426                 #address-cells = <3>;
 427                 reg = <f8009000 1000>;
 428                 bus-range = <0 ff>;
 429                 ranges = <02000000 0 a0000000 a0000000 0 20000000
 430                           01000000 0 00000000 e3000000 0 00100000>;
 431                 clock-frequency = <1fca055>;
 432                 interrupt-parent = <&mpic>;
 433                 interrupts = <19 2>;
 434                 interrupt-map-mask = <f800 0 0 7>;
 435                 interrupt-map = <
 436                         /* IDSEL 0x0 */
 437                         0000 0 0 1 &mpic 4 1
 438                         0000 0 0 2 &mpic 5 1
 439                         0000 0 0 3 &mpic 6 1
 440                         0000 0 0 4 &mpic 7 1
 441                         >;
 442                 pcie@0 {
 443                         reg = <0 0 0 0 0>;
 444                         #size-cells = <2>;
 445                         #address-cells = <3>;
 446                         device_type = "pci";
 447                         ranges = <02000000 0 a0000000
 448                                   02000000 0 a0000000
 449                                   0 20000000
 450
 451                                   01000000 0 00000000
 452                                   01000000 0 00000000
 453                                   0 00100000>;
 454                 };
 455         };
 456 };