arch/powerpc/boot/dts/mpc8641_hpcn.dts

   1 /*
   2  * MPC8641 HPCN Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 / {
  14         model = "MPC8641HPCN";
  15         compatible = "mpc86xx";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         aliases {
  20                 ethernet0 = &enet0;
  21                 ethernet1 = &enet1;
  22                 ethernet2 = &enet2;
  23                 ethernet3 = &enet3;
  24                 serial0 = &serial0;
  25                 serial1 = &serial1;
  26                 pci0 = &pci0;
  27                 pci1 = &pci1;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 PowerPC,8641@0 {
  35                         device_type = "cpu";
  36                         reg = <0>;
  37                         d-cache-line-size = <20>;       // 32 bytes
  38                         i-cache-line-size = <20>;       // 32 bytes
  39                         d-cache-size = <8000>;          // L1, 32K
  40                         i-cache-size = <8000>;          // L1, 32K
  41                         timebase-frequency = <0>;       // 33 MHz, from uboot
  42                         bus-frequency = <0>;            // From uboot
  43                         clock-frequency = <0>;          // From uboot
  44                 };
  45                 PowerPC,8641@1 {
  46                         device_type = "cpu";
  47                         reg = <1>;
  48                         d-cache-line-size = <20>;       // 32 bytes
  49                         i-cache-line-size = <20>;       // 32 bytes
  50                         d-cache-size = <8000>;          // L1, 32K
  51                         i-cache-size = <8000>;          // L1, 32K
  52                         timebase-frequency = <0>;       // 33 MHz, from uboot
  53                         bus-frequency = <0>;            // From uboot
  54                         clock-frequency = <0>;          // From uboot
  55                 };
  56         };
  57
  58         memory {
  59                 device_type = "memory";
  60                 reg = <00000000 40000000>;      // 1G at 0x0
  61         };
  62
  63         soc8641@f8000000 {
  64                 #address-cells = <1>;
  65                 #size-cells = <1>;
  66                 device_type = "soc";
  67                 ranges = <00000000 f8000000 00100000>;
  68                 reg = <f8000000 00001000>;      // CCSRBAR
  69                 bus-frequency = <0>;
  70
  71                 i2c@3000 {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74                         cell-index = <0>;
  75                         compatible = "fsl-i2c";
  76                         reg = <3000 100>;
  77                         interrupts = <2b 2>;
  78                         interrupt-parent = <&mpic>;
  79                         dfsrr;
  80                 };
  81
  82                 i2c@3100 {
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                         cell-index = <1>;
  86                         compatible = "fsl-i2c";
  87                         reg = <3100 100>;
  88                         interrupts = <2b 2>;
  89                         interrupt-parent = <&mpic>;
  90                         dfsrr;
  91                 };
  92
  93                 mdio@24520 {
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96                         compatible = "fsl,gianfar-mdio";
  97                         reg = <24520 20>;
  98
  99                         phy0: ethernet-phy@0 {
 100                                 interrupt-parent = <&mpic>;
 101                                 interrupts = <a 1>;
 102                                 reg = <0>;
 103                                 device_type = "ethernet-phy";
 104                         };
 105                         phy1: ethernet-phy@1 {
 106                                 interrupt-parent = <&mpic>;
 107                                 interrupts = <a 1>;
 108                                 reg = <1>;
 109                                 device_type = "ethernet-phy";
 110                         };
 111                         phy2: ethernet-phy@2 {
 112                                 interrupt-parent = <&mpic>;
 113                                 interrupts = <a 1>;
 114                                 reg = <2>;
 115                                 device_type = "ethernet-phy";
 116                         };
 117                         phy3: ethernet-phy@3 {
 118                                 interrupt-parent = <&mpic>;
 119                                 interrupts = <a 1>;
 120                                 reg = <3>;
 121                                 device_type = "ethernet-phy";
 122                         };
 123                 };
 124
 125                 enet0: ethernet@24000 {
 126                         cell-index = <0>;
 127                         device_type = "network";
 128                         model = "TSEC";
 129                         compatible = "gianfar";
 130                         reg = <24000 1000>;
 131                         local-mac-address = [ 00 00 00 00 00 00 ];
 132                         interrupts = <1d 2 1e 2 22 2>;
 133                         interrupt-parent = <&mpic>;
 134                         phy-handle = <&phy0>;
 135                         phy-connection-type = "rgmii-id";
 136                 };
 137
 138                 enet1: ethernet@25000 {
 139                         cell-index = <1>;
 140                         device_type = "network";
 141                         model = "TSEC";
 142                         compatible = "gianfar";
 143                         reg = <25000 1000>;
 144                         local-mac-address = [ 00 00 00 00 00 00 ];
 145                         interrupts = <23 2 24 2 28 2>;
 146                         interrupt-parent = <&mpic>;
 147                         phy-handle = <&phy1>;
 148                         phy-connection-type = "rgmii-id";
 149                 };
 150
 151                 enet2: ethernet@26000 {
 152                         cell-index = <2>;
 153                         device_type = "network";
 154                         model = "TSEC";
 155                         compatible = "gianfar";
 156                         reg = <26000 1000>;
 157                         local-mac-address = [ 00 00 00 00 00 00 ];
 158                         interrupts = <1F 2 20 2 21 2>;
 159                         interrupt-parent = <&mpic>;
 160                         phy-handle = <&phy2>;
 161                         phy-connection-type = "rgmii-id";
 162                 };
 163
 164                 enet3: ethernet@27000 {
 165                         cell-index = <3>;
 166                         device_type = "network";
 167                         model = "TSEC";
 168                         compatible = "gianfar";
 169                         reg = <27000 1000>;
 170                         local-mac-address = [ 00 00 00 00 00 00 ];
 171                         interrupts = <25 2 26 2 27 2>;
 172                         interrupt-parent = <&mpic>;
 173                         phy-handle = <&phy3>;
 174                         phy-connection-type = "rgmii-id";
 175                 };
 176
 177                 serial0: serial@4500 {
 178                         cell-index = <0>;
 179                         device_type = "serial";
 180                         compatible = "ns16550";
 181                         reg = <4500 100>;
 182                         clock-frequency = <0>;
 183                         interrupts = <2a 2>;
 184                         interrupt-parent = <&mpic>;
 185                 };
 186
 187                 serial1: serial@4600 {
 188                         cell-index = <1>;
 189                         device_type = "serial";
 190                         compatible = "ns16550";
 191                         reg = <4600 100>;
 192                         clock-frequency = <0>;
 193                         interrupts = <1c 2>;
 194                         interrupt-parent = <&mpic>;
 195                 };
 196
 197                 mpic: pic@40000 {
 198                         clock-frequency = <0>;
 199                         interrupt-controller;
 200                         #address-cells = <0>;
 201                         #interrupt-cells = <2>;
 202                         reg = <40000 40000>;
 203                         compatible = "chrp,open-pic";
 204                         device_type = "open-pic";
 205                         big-endian;
 206                 };
 207
 208                 global-utilities@e0000 {
 209                         compatible = "fsl,mpc8641-guts";
 210                         reg = <e0000 1000>;
 211                         fsl,has-rstcr;
 212                 };
 213         };
 214
 215         pci0: pcie@f8008000 {
 216                 cell-index = <0>;
 217                 compatible = "fsl,mpc8641-pcie";
 218                 device_type = "pci";
 219                 #interrupt-cells = <1>;
 220                 #size-cells = <2>;
 221                 #address-cells = <3>;
 222                 reg = <f8008000 1000>;
 223                 bus-range = <0 ff>;
 224                 ranges = <02000000 0 80000000 80000000 0 20000000
 225                           01000000 0 00000000 e2000000 0 00100000>;
 226                 clock-frequency = <1fca055>;
 227                 interrupt-parent = <&mpic>;
 228                 interrupts = <18 2>;
 229                 interrupt-map-mask = <ff00 0 0 7>;
 230                 interrupt-map = <
 231                         /* IDSEL 0x11 func 0 - PCI slot 1 */
 232                         8800 0 0 1 &mpic 2 1
 233                         8800 0 0 2 &mpic 3 1
 234                         8800 0 0 3 &mpic 4 1
 235                         8800 0 0 4 &mpic 1 1
 236
 237                         /* IDSEL 0x11 func 1 - PCI slot 1 */
 238                         8900 0 0 1 &mpic 2 1
 239                         8900 0 0 2 &mpic 3 1
 240                         8900 0 0 3 &mpic 4 1
 241                         8900 0 0 4 &mpic 1 1
 242
 243                         /* IDSEL 0x11 func 2 - PCI slot 1 */
 244                         8a00 0 0 1 &mpic 2 1
 245                         8a00 0 0 2 &mpic 3 1
 246                         8a00 0 0 3 &mpic 4 1
 247                         8a00 0 0 4 &mpic 1 1
 248
 249                         /* IDSEL 0x11 func 3 - PCI slot 1 */
 250                         8b00 0 0 1 &mpic 2 1
 251                         8b00 0 0 2 &mpic 3 1
 252                         8b00 0 0 3 &mpic 4 1
 253                         8b00 0 0 4 &mpic 1 1
 254
 255                         /* IDSEL 0x11 func 4 - PCI slot 1 */
 256                         8c00 0 0 1 &mpic 2 1
 257                         8c00 0 0 2 &mpic 3 1
 258                         8c00 0 0 3 &mpic 4 1
 259                         8c00 0 0 4 &mpic 1 1
 260
 261                         /* IDSEL 0x11 func 5 - PCI slot 1 */
 262                         8d00 0 0 1 &mpic 2 1
 263                         8d00 0 0 2 &mpic 3 1
 264                         8d00 0 0 3 &mpic 4 1
 265                         8d00 0 0 4 &mpic 1 1
 266
 267                         /* IDSEL 0x11 func 6 - PCI slot 1 */
 268                         8e00 0 0 1 &mpic 2 1
 269                         8e00 0 0 2 &mpic 3 1
 270                         8e00 0 0 3 &mpic 4 1
 271                         8e00 0 0 4 &mpic 1 1
 272
 273                         /* IDSEL 0x11 func 7 - PCI slot 1 */
 274                         8f00 0 0 1 &mpic 2 1
 275                         8f00 0 0 2 &mpic 3 1
 276                         8f00 0 0 3 &mpic 4 1
 277                         8f00 0 0 4 &mpic 1 1
 278
 279                         /* IDSEL 0x12 func 0 - PCI slot 2 */
 280                         9000 0 0 1 &mpic 3 1
 281                         9000 0 0 2 &mpic 4 1
 282                         9000 0 0 3 &mpic 1 1
 283                         9000 0 0 4 &mpic 2 1
 284
 285                         /* IDSEL 0x12 func 1 - PCI slot 2 */
 286                         9100 0 0 1 &mpic 3 1
 287                         9100 0 0 2 &mpic 4 1
 288                         9100 0 0 3 &mpic 1 1
 289                         9100 0 0 4 &mpic 2 1
 290
 291                         /* IDSEL 0x12 func 2 - PCI slot 2 */
 292                         9200 0 0 1 &mpic 3 1
 293                         9200 0 0 2 &mpic 4 1
 294                         9200 0 0 3 &mpic 1 1
 295                         9200 0 0 4 &mpic 2 1
 296
 297                         /* IDSEL 0x12 func 3 - PCI slot 2 */
 298                         9300 0 0 1 &mpic 3 1
 299                         9300 0 0 2 &mpic 4 1
 300                         9300 0 0 3 &mpic 1 1
 301                         9300 0 0 4 &mpic 2 1
 302
 303                         /* IDSEL 0x12 func 4 - PCI slot 2 */
 304                         9400 0 0 1 &mpic 3 1
 305                         9400 0 0 2 &mpic 4 1
 306                         9400 0 0 3 &mpic 1 1
 307                         9400 0 0 4 &mpic 2 1
 308
 309                         /* IDSEL 0x12 func 5 - PCI slot 2 */
 310                         9500 0 0 1 &mpic 3 1
 311                         9500 0 0 2 &mpic 4 1
 312                         9500 0 0 3 &mpic 1 1
 313                         9500 0 0 4 &mpic 2 1
 314
 315                         /* IDSEL 0x12 func 6 - PCI slot 2 */
 316                         9600 0 0 1 &mpic 3 1
 317                         9600 0 0 2 &mpic 4 1
 318                         9600 0 0 3 &mpic 1 1
 319                         9600 0 0 4 &mpic 2 1
 320
 321                         /* IDSEL 0x12 func 7 - PCI slot 2 */
 322                         9700 0 0 1 &mpic 3 1
 323                         9700 0 0 2 &mpic 4 1
 324                         9700 0 0 3 &mpic 1 1
 325                         9700 0 0 4 &mpic 2 1
 326
 327                         // IDSEL 0x1c  USB
 328                         e000 0 0 1 &i8259 c 2
 329                         e100 0 0 1 &i8259 9 2
 330                         e200 0 0 1 &i8259 a 2
 331                         e300 0 0 1 &i8259 b 2
 332
 333                         // IDSEL 0x1d  Audio
 334                         e800 0 0 1 &i8259 6 2
 335
 336                         // IDSEL 0x1e Legacy
 337                         f000 0 0 1 &i8259 7 2
 338                         f100 0 0 1 &i8259 7 2
 339
 340                         // IDSEL 0x1f IDE/SATA
 341                         f800 0 0 1 &i8259 e 2
 342                         f900 0 0 1 &i8259 5 2
 343                         >;
 344
 345                 pcie@0 {
 346                         reg = <0 0 0 0 0>;
 347                         #size-cells = <2>;
 348                         #address-cells = <3>;
 349                         device_type = "pci";
 350                         ranges = <02000000 0 80000000
 351                                   02000000 0 80000000
 352                                   0 20000000
 353
 354                                   01000000 0 00000000
 355                                   01000000 0 00000000
 356                                   0 00100000>;
 357                         uli1575@0 {
 358                                 reg = <0 0 0 0 0>;
 359                                 #size-cells = <2>;
 360                                 #address-cells = <3>;
 361                                 ranges = <02000000 0 80000000
 362                                           02000000 0 80000000
 363                                           0 20000000
 364                                           01000000 0 00000000
 365                                           01000000 0 00000000
 366                                           0 00100000>;
 367                                 isa@1e {
 368                                         device_type = "isa";
 369                                         #interrupt-cells = <2>;
 370                                         #size-cells = <1>;
 371                                         #address-cells = <2>;
 372                                         reg = <f000 0 0 0 0>;
 373                                         ranges = <1 0 01000000 0 0
 374                                                   00001000>;
 375                                         interrupt-parent = <&i8259>;
 376
 377                                         i8259: interrupt-controller@20 {
 378                                                 reg = <1 20 2
 379                                                        1 a0 2
 380                                                        1 4d0 2>;
 381                                                 interrupt-controller;
 382                                                 device_type = "interrupt-controller";
 383                                                 #address-cells = <0>;
 384                                                 #interrupt-cells = <2>;
 385                                                 compatible = "chrp,iic";
 386                                                 interrupts = <9 2>;
 387                                                 interrupt-parent = <&mpic>;
 388                                         };
 389
 390                                         i8042@60 {
 391                                                 #size-cells = <0>;
 392                                                 #address-cells = <1>;
 393                                                 reg = <1 60 1 1 64 1>;
 394                                                 interrupts = <1 3 c 3>;
 395                                                 interrupt-parent =
 396                                                         <&i8259>;
 397
 398                                                 keyboard@0 {
 399                                                         reg = <0>;
 400                                                         compatible = "pnpPNP,303";
 401                                                 };
 402
 403                                                 mouse@1 {
 404                                                         reg = <1>;
 405                                                         compatible = "pnpPNP,f03";
 406                                                 };
 407                                         };
 408
 409                                         rtc@70 {
 410                                                 compatible =
 411                                                         "pnpPNP,b00";
 412                                                 reg = <1 70 2>;
 413                                         };
 414
 415                                         gpio@400 {
 416                                                 reg = <1 400 80>;
 417                                         };
 418                                 };
 419                         };
 420                 };
 421
 422         };
 423
 424         pci1: pcie@f8009000 {
 425                 cell-index = <1>;
 426                 compatible = "fsl,mpc8641-pcie";
 427                 device_type = "pci";
 428                 #interrupt-cells = <1>;
 429                 #size-cells = <2>;
 430                 #address-cells = <3>;
 431                 reg = <f8009000 1000>;
 432                 bus-range = <0 ff>;
 433                 ranges = <02000000 0 a0000000 a0000000 0 20000000
 434                           01000000 0 00000000 e3000000 0 00100000>;
 435                 clock-frequency = <1fca055>;
 436                 interrupt-parent = <&mpic>;
 437                 interrupts = <19 2>;
 438                 interrupt-map-mask = <f800 0 0 7>;
 439                 interrupt-map = <
 440                         /* IDSEL 0x0 */
 441                         0000 0 0 1 &mpic 4 1
 442                         0000 0 0 2 &mpic 5 1
 443                         0000 0 0 3 &mpic 6 1
 444                         0000 0 0 4 &mpic 7 1
 445                         >;
 446                 pcie@0 {
 447                         reg = <0 0 0 0 0>;
 448                         #size-cells = <2>;
 449                         #address-cells = <3>;
 450                         device_type = "pci";
 451                         ranges = <02000000 0 a0000000
 452                                   02000000 0 a0000000
 453                                   0 20000000
 454
 455                                   01000000 0 00000000
 456                                   01000000 0 00000000
 457                                   0 00100000>;
 458                 };
 459         };
 460 };