arch/powerpc/boot/dts/mpc8641_hpcn.dts

   1 /*
   2  * MPC8641 HPCN Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8641HPCN";
  16         compatible = "fsl,mpc8641hpcn";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 ethernet3 = &enet3;
  25                 serial0 = &serial0;
  26                 serial1 = &serial1;
  27                 pci0 = &pci0;
  28                 pci1 = &pci1;
  29                 rapidio0 = &rapidio0;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8641@0 {
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                         d-cache-line-size = <32>;
  40                         i-cache-line-size = <32>;
  41                         d-cache-size = <32768>;         // L1
  42                         i-cache-size = <32768>;         // L1
  43                         timebase-frequency = <0>;       // From uboot
  44                         bus-frequency = <0>;            // From uboot
  45                         clock-frequency = <0>;          // From uboot
  46                 };
  47                 PowerPC,8641@1 {
  48                         device_type = "cpu";
  49                         reg = <1>;
  50                         d-cache-line-size = <32>;
  51                         i-cache-line-size = <32>;
  52                         d-cache-size = <32768>;
  53                         i-cache-size = <32768>;
  54                         timebase-frequency = <0>;       // From uboot
  55                         bus-frequency = <0>;            // From uboot
  56                         clock-frequency = <0>;          // From uboot
  57                 };
  58         };
  59
  60         memory {
  61                 device_type = "memory";
  62                 reg = <0x00000000 0x40000000>;  // 1G at 0x0
  63         };
  64
  65         localbus@f8005000 {
  66                 #address-cells = <2>;
  67                 #size-cells = <1>;
  68                 compatible = "fsl,mpc8641-localbus", "simple-bus";
  69                 reg = <0xf8005000 0x1000>;
  70                 interrupts = <19 2>;
  71                 interrupt-parent = <&mpic>;
  72
  73                 ranges = <0 0 0xff800000 0x00800000
  74                           1 0 0xfe000000 0x01000000
  75                           2 0 0xf8200000 0x00100000
  76                           3 0 0xf8100000 0x00100000>;
  77
  78                 flash@0,0 {
  79                         compatible = "cfi-flash";
  80                         reg = <0 0 0x00800000>;
  81                         bank-width = <2>;
  82                         device-width = <2>;
  83                         #address-cells = <1>;
  84                         #size-cells = <1>;
  85                         partition@0 {
  86                                 label = "kernel";
  87                                 reg = <0x00000000 0x00300000>;
  88                         };
  89                         partition@300000 {
  90                                 label = "firmware b";
  91                                 reg = <0x00300000 0x00100000>;
  92                                 read-only;
  93                         };
  94                         partition@400000 {
  95                                 label = "fs";
  96                                 reg = <0x00400000 0x00300000>;
  97                         };
  98                         partition@700000 {
  99                                 label = "firmware a";
 100                                 reg = <0x00700000 0x00100000>;
 101                                 read-only;
 102                         };
 103                 };
 104         };
 105
 106         soc8641@f8000000 {
 107                 #address-cells = <1>;
 108                 #size-cells = <1>;
 109                 device_type = "soc";
 110                 compatible = "simple-bus";
 111                 ranges = <0x00000000 0xf8000000 0x00100000>;
 112                 reg = <0xf8000000 0x00001000>;  // CCSRBAR
 113                 bus-frequency = <0>;
 114
 115                 i2c@3000 {
 116                         #address-cells = <1>;
 117                         #size-cells = <0>;
 118                         cell-index = <0>;
 119                         compatible = "fsl-i2c";
 120                         reg = <0x3000 0x100>;
 121                         interrupts = <43 2>;
 122                         interrupt-parent = <&mpic>;
 123                         dfsrr;
 124                 };
 125
 126                 i2c@3100 {
 127                         #address-cells = <1>;
 128                         #size-cells = <0>;
 129                         cell-index = <1>;
 130                         compatible = "fsl-i2c";
 131                         reg = <0x3100 0x100>;
 132                         interrupts = <43 2>;
 133                         interrupt-parent = <&mpic>;
 134                         dfsrr;
 135                 };
 136
 137                 mdio@24520 {
 138                         #address-cells = <1>;
 139                         #size-cells = <0>;
 140                         compatible = "fsl,gianfar-mdio";
 141                         reg = <0x24520 0x20>;
 142
 143                         phy0: ethernet-phy@0 {
 144                                 interrupt-parent = <&mpic>;
 145                                 interrupts = <10 1>;
 146                                 reg = <0>;
 147                                 device_type = "ethernet-phy";
 148                         };
 149                         phy1: ethernet-phy@1 {
 150                                 interrupt-parent = <&mpic>;
 151                                 interrupts = <10 1>;
 152                                 reg = <1>;
 153                                 device_type = "ethernet-phy";
 154                         };
 155                         phy2: ethernet-phy@2 {
 156                                 interrupt-parent = <&mpic>;
 157                                 interrupts = <10 1>;
 158                                 reg = <2>;
 159                                 device_type = "ethernet-phy";
 160                         };
 161                         phy3: ethernet-phy@3 {
 162                                 interrupt-parent = <&mpic>;
 163                                 interrupts = <10 1>;
 164                                 reg = <3>;
 165                                 device_type = "ethernet-phy";
 166                         };
 167                 };
 168
 169                 enet0: ethernet@24000 {
 170                         cell-index = <0>;
 171                         device_type = "network";
 172                         model = "TSEC";
 173                         compatible = "gianfar";
 174                         reg = <0x24000 0x1000>;
 175                         local-mac-address = [ 00 00 00 00 00 00 ];
 176                         interrupts = <29 2 30  2 34 2>;
 177                         interrupt-parent = <&mpic>;
 178                         phy-handle = <&phy0>;
 179                         phy-connection-type = "rgmii-id";
 180                 };
 181
 182                 enet1: ethernet@25000 {
 183                         cell-index = <1>;
 184                         device_type = "network";
 185                         model = "TSEC";
 186                         compatible = "gianfar";
 187                         reg = <0x25000 0x1000>;
 188                         local-mac-address = [ 00 00 00 00 00 00 ];
 189                         interrupts = <35 2 36 2 40 2>;
 190                         interrupt-parent = <&mpic>;
 191                         phy-handle = <&phy1>;
 192                         phy-connection-type = "rgmii-id";
 193                 };
 194
 195                 enet2: ethernet@26000 {
 196                         cell-index = <2>;
 197                         device_type = "network";
 198                         model = "TSEC";
 199                         compatible = "gianfar";
 200                         reg = <0x26000 0x1000>;
 201                         local-mac-address = [ 00 00 00 00 00 00 ];
 202                         interrupts = <31 2 32 2 33 2>;
 203                         interrupt-parent = <&mpic>;
 204                         phy-handle = <&phy2>;
 205                         phy-connection-type = "rgmii-id";
 206                 };
 207
 208                 enet3: ethernet@27000 {
 209                         cell-index = <3>;
 210                         device_type = "network";
 211                         model = "TSEC";
 212                         compatible = "gianfar";
 213                         reg = <0x27000 0x1000>;
 214                         local-mac-address = [ 00 00 00 00 00 00 ];
 215                         interrupts = <37 2 38 2 39 2>;
 216                         interrupt-parent = <&mpic>;
 217                         phy-handle = <&phy3>;
 218                         phy-connection-type = "rgmii-id";
 219                 };
 220
 221                 serial0: serial@4500 {
 222                         cell-index = <0>;
 223                         device_type = "serial";
 224                         compatible = "ns16550";
 225                         reg = <0x4500 0x100>;
 226                         clock-frequency = <0>;
 227                         interrupts = <42 2>;
 228                         interrupt-parent = <&mpic>;
 229                 };
 230
 231                 serial1: serial@4600 {
 232                         cell-index = <1>;
 233                         device_type = "serial";
 234                         compatible = "ns16550";
 235                         reg = <0x4600 0x100>;
 236                         clock-frequency = <0>;
 237                         interrupts = <28 2>;
 238                         interrupt-parent = <&mpic>;
 239                 };
 240
 241                 mpic: pic@40000 {
 242                         clock-frequency = <0>;
 243                         interrupt-controller;
 244                         #address-cells = <0>;
 245                         #interrupt-cells = <2>;
 246                         reg = <0x40000 0x40000>;
 247                         compatible = "chrp,open-pic";
 248                         device_type = "open-pic";
 249                         big-endian;
 250                 };
 251
 252                 global-utilities@e0000 {
 253                         compatible = "fsl,mpc8641-guts";
 254                         reg = <0xe0000 0x1000>;
 255                         fsl,has-rstcr;
 256                 };
 257         };
 258
 259         pci0: pcie@f8008000 {
 260                 cell-index = <0>;
 261                 compatible = "fsl,mpc8641-pcie";
 262                 device_type = "pci";
 263                 #interrupt-cells = <1>;
 264                 #size-cells = <2>;
 265                 #address-cells = <3>;
 266                 reg = <0xf8008000 0x1000>;
 267                 bus-range = <0x0 0xff>;
 268                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 269                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
 270                 clock-frequency = <33333333>;
 271                 interrupt-parent = <&mpic>;
 272                 interrupts = <24 2>;
 273                 interrupt-map-mask = <0xff00 0 0 7>;
 274                 interrupt-map = <
 275                         /* IDSEL 0x11 func 0 - PCI slot 1 */
 276                         0x8800 0 0 1 &mpic 2 1
 277                         0x8800 0 0 2 &mpic 3 1
 278                         0x8800 0 0 3 &mpic 4 1
 279                         0x8800 0 0 4 &mpic 1 1
 280
 281                         /* IDSEL 0x11 func 1 - PCI slot 1 */
 282                         0x8900 0 0 1 &mpic 2 1
 283                         0x8900 0 0 2 &mpic 3 1
 284                         0x8900 0 0 3 &mpic 4 1
 285                         0x8900 0 0 4 &mpic 1 1
 286
 287                         /* IDSEL 0x11 func 2 - PCI slot 1 */
 288                         0x8a00 0 0 1 &mpic 2 1
 289                         0x8a00 0 0 2 &mpic 3 1
 290                         0x8a00 0 0 3 &mpic 4 1
 291                         0x8a00 0 0 4 &mpic 1 1
 292
 293                         /* IDSEL 0x11 func 3 - PCI slot 1 */
 294                         0x8b00 0 0 1 &mpic 2 1
 295                         0x8b00 0 0 2 &mpic 3 1
 296                         0x8b00 0 0 3 &mpic 4 1
 297                         0x8b00 0 0 4 &mpic 1 1
 298
 299                         /* IDSEL 0x11 func 4 - PCI slot 1 */
 300                         0x8c00 0 0 1 &mpic 2 1
 301                         0x8c00 0 0 2 &mpic 3 1
 302                         0x8c00 0 0 3 &mpic 4 1
 303                         0x8c00 0 0 4 &mpic 1 1
 304
 305                         /* IDSEL 0x11 func 5 - PCI slot 1 */
 306                         0x8d00 0 0 1 &mpic 2 1
 307                         0x8d00 0 0 2 &mpic 3 1
 308                         0x8d00 0 0 3 &mpic 4 1
 309                         0x8d00 0 0 4 &mpic 1 1
 310
 311                         /* IDSEL 0x11 func 6 - PCI slot 1 */
 312                         0x8e00 0 0 1 &mpic 2 1
 313                         0x8e00 0 0 2 &mpic 3 1
 314                         0x8e00 0 0 3 &mpic 4 1
 315                         0x8e00 0 0 4 &mpic 1 1
 316
 317                         /* IDSEL 0x11 func 7 - PCI slot 1 */
 318                         0x8f00 0 0 1 &mpic 2 1
 319                         0x8f00 0 0 2 &mpic 3 1
 320                         0x8f00 0 0 3 &mpic 4 1
 321                         0x8f00 0 0 4 &mpic 1 1
 322
 323                         /* IDSEL 0x12 func 0 - PCI slot 2 */
 324                         0x9000 0 0 1 &mpic 3 1
 325                         0x9000 0 0 2 &mpic 4 1
 326                         0x9000 0 0 3 &mpic 1 1
 327                         0x9000 0 0 4 &mpic 2 1
 328
 329                         /* IDSEL 0x12 func 1 - PCI slot 2 */
 330                         0x9100 0 0 1 &mpic 3 1
 331                         0x9100 0 0 2 &mpic 4 1
 332                         0x9100 0 0 3 &mpic 1 1
 333                         0x9100 0 0 4 &mpic 2 1
 334
 335                         /* IDSEL 0x12 func 2 - PCI slot 2 */
 336                         0x9200 0 0 1 &mpic 3 1
 337                         0x9200 0 0 2 &mpic 4 1
 338                         0x9200 0 0 3 &mpic 1 1
 339                         0x9200 0 0 4 &mpic 2 1
 340
 341                         /* IDSEL 0x12 func 3 - PCI slot 2 */
 342                         0x9300 0 0 1 &mpic 3 1
 343                         0x9300 0 0 2 &mpic 4 1
 344                         0x9300 0 0 3 &mpic 1 1
 345                         0x9300 0 0 4 &mpic 2 1
 346
 347                         /* IDSEL 0x12 func 4 - PCI slot 2 */
 348                         0x9400 0 0 1 &mpic 3 1
 349                         0x9400 0 0 2 &mpic 4 1
 350                         0x9400 0 0 3 &mpic 1 1
 351                         0x9400 0 0 4 &mpic 2 1
 352
 353                         /* IDSEL 0x12 func 5 - PCI slot 2 */
 354                         0x9500 0 0 1 &mpic 3 1
 355                         0x9500 0 0 2 &mpic 4 1
 356                         0x9500 0 0 3 &mpic 1 1
 357                         0x9500 0 0 4 &mpic 2 1
 358
 359                         /* IDSEL 0x12 func 6 - PCI slot 2 */
 360                         0x9600 0 0 1 &mpic 3 1
 361                         0x9600 0 0 2 &mpic 4 1
 362                         0x9600 0 0 3 &mpic 1 1
 363                         0x9600 0 0 4 &mpic 2 1
 364
 365                         /* IDSEL 0x12 func 7 - PCI slot 2 */
 366                         0x9700 0 0 1 &mpic 3 1
 367                         0x9700 0 0 2 &mpic 4 1
 368                         0x9700 0 0 3 &mpic 1 1
 369                         0x9700 0 0 4 &mpic 2 1
 370
 371                         // IDSEL 0x1c  USB
 372                         0xe000 0 0 1 &i8259 12 2
 373                         0xe100 0 0 2 &i8259 9 2
 374                         0xe200 0 0 3 &i8259 10 2
 375                         0xe300 0 0 4 &i8259 112
 376
 377                         // IDSEL 0x1d  Audio
 378                         0xe800 0 0 1 &i8259 6 2
 379
 380                         // IDSEL 0x1e Legacy
 381                         0xf000 0 0 1 &i8259 7 2
 382                         0xf100 0 0 1 &i8259 7 2
 383
 384                         // IDSEL 0x1f IDE/SATA
 385                         0xf800 0 0 1 &i8259 14 2
 386                         0xf900 0 0 1 &i8259 5 2
 387                         >;
 388
 389                 pcie@0 {
 390                         reg = <0 0 0 0 0>;
 391                         #size-cells = <2>;
 392                         #address-cells = <3>;
 393                         device_type = "pci";
 394                         ranges = <0x02000000 0x0 0x80000000
 395                                   0x02000000 0x0 0x80000000
 396                                   0x0 0x20000000
 397
 398                                   0x01000000 0x0 0x00000000
 399                                   0x01000000 0x0 0x00000000
 400                                   0x0 0x00100000>;
 401                         uli1575@0 {
 402                                 reg = <0 0 0 0 0>;
 403                                 #size-cells = <2>;
 404                                 #address-cells = <3>;
 405                                 ranges = <0x02000000 0x0 0x80000000
 406                                           0x02000000 0x0 0x80000000
 407                                           0x0 0x20000000
 408                                           0x01000000 0x0 0x00000000
 409                                           0x01000000 0x0 0x00000000
 410                                           0x0 0x00100000>;
 411                                 isa@1e {
 412                                         device_type = "isa";
 413                                         #interrupt-cells = <2>;
 414                                         #size-cells = <1>;
 415                                         #address-cells = <2>;
 416                                         reg = <0xf000 0 0 0 0>;
 417                                         ranges = <1 0 0x01000000 0 0
 418                                                   0x00001000>;
 419                                         interrupt-parent = <&i8259>;
 420
 421                                         i8259: interrupt-controller@20 {
 422                                                 reg = <1 0x20 2
 423                                                        1 0xa0 2
 424                                                        1 0x4d0 2>;
 425                                                 interrupt-controller;
 426                                                 device_type = "interrupt-controller";
 427                                                 #address-cells = <0>;
 428                                                 #interrupt-cells = <2>;
 429                                                 compatible = "chrp,iic";
 430                                                 interrupts = <9 2>;
 431                                                 interrupt-parent = <&mpic>;
 432                                         };
 433
 434                                         i8042@60 {
 435                                                 #size-cells = <0>;
 436                                                 #address-cells = <1>;
 437                                                 reg = <1 0x60 1 1 0x64 1>;
 438                                                 interrupts = <1 3 12 3>;
 439                                                 interrupt-parent =
 440                                                         <&i8259>;
 441
 442                                                 keyboard@0 {
 443                                                         reg = <0>;
 444                                                         compatible = "pnpPNP,303";
 445                                                 };
 446
 447                                                 mouse@1 {
 448                                                         reg = <1>;
 449                                                         compatible = "pnpPNP,f03";
 450                                                 };
 451                                         };
 452
 453                                         rtc@70 {
 454                                                 compatible =
 455                                                         "pnpPNP,b00";
 456                                                 reg = <1 0x70 2>;
 457                                         };
 458
 459                                         gpio@400 {
 460                                                 reg = <1 0x400 0x80>;
 461                                         };
 462                                 };
 463                         };
 464                 };
 465
 466         };
 467
 468         pci1: pcie@f8009000 {
 469                 cell-index = <1>;
 470                 compatible = "fsl,mpc8641-pcie";
 471                 device_type = "pci";
 472                 #interrupt-cells = <1>;
 473                 #size-cells = <2>;
 474                 #address-cells = <3>;
 475                 reg = <0xf8009000 0x1000>;
 476                 bus-range = <0 0xff>;
 477                 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
 478                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
 479                 clock-frequency = <33333333>;
 480                 interrupt-parent = <&mpic>;
 481                 interrupts = <25 2>;
 482                 interrupt-map-mask = <0xf800 0 0 7>;
 483                 interrupt-map = <
 484                         /* IDSEL 0x0 */
 485                         0x0000 0 0 1 &mpic 4 1
 486                         0x0000 0 0 2 &mpic 5 1
 487                         0x0000 0 0 3 &mpic 6 1
 488                         0x0000 0 0 4 &mpic 7 1
 489                         >;
 490                 pcie@0 {
 491                         reg = <0 0 0 0 0>;
 492                         #size-cells = <2>;
 493                         #address-cells = <3>;
 494                         device_type = "pci";
 495                         ranges = <0x02000000 0x0 0xa0000000
 496                                   0x02000000 0x0 0xa0000000
 497                                   0x0 0x20000000
 498
 499                                   0x01000000 0x0 0x00000000
 500                                   0x01000000 0x0 0x00000000
 501                                   0x0 0x00100000>;
 502                 };
 503         };
 504         rapidio0: rapidio@f80c0000 {
 505                 #address-cells = <2>;
 506                 #size-cells = <2>;
 507                 compatible = "fsl,rapidio-delta";
 508                 reg = <0xf80c0000 0x20000>;
 509                 ranges = <0 0 0xc0000000 0 0x20000000>;
 510                 interrupt-parent = <&mpic>;
 511                 /* err_irq bell_outb_irq bell_inb_irq
 512                         msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */
 513                 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
 514         };
 515 };