2 * MPC8641 HPCN Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
14 model = "MPC8641HPCN";
15 compatible = "mpc86xx";
37 d-cache-line-size = <20>; // 32 bytes
38 i-cache-line-size = <20>; // 32 bytes
39 d-cache-size = <8000>; // L1, 32K
40 i-cache-size = <8000>; // L1, 32K
41 timebase-frequency = <0>; // 33 MHz, from uboot
42 bus-frequency = <0>; // From uboot
43 clock-frequency = <0>; // From uboot
48 d-cache-line-size = <20>; // 32 bytes
49 i-cache-line-size = <20>; // 32 bytes
50 d-cache-size = <8000>; // L1, 32K
51 i-cache-size = <8000>; // L1, 32K
52 timebase-frequency = <0>; // 33 MHz, from uboot
53 bus-frequency = <0>; // From uboot
54 clock-frequency = <0>; // From uboot
59 device_type = "memory";
60 reg = <00000000 40000000>; // 1G at 0x0
67 ranges = <00000000 f8000000 00100000>;
68 reg = <f8000000 00001000>; // CCSRBAR
75 compatible = "fsl-i2c";
78 interrupt-parent = <&mpic>;
86 compatible = "fsl-i2c";
89 interrupt-parent = <&mpic>;
96 compatible = "fsl,gianfar-mdio";
99 phy0: ethernet-phy@0 {
100 interrupt-parent = <&mpic>;
103 device_type = "ethernet-phy";
105 phy1: ethernet-phy@1 {
106 interrupt-parent = <&mpic>;
109 device_type = "ethernet-phy";
111 phy2: ethernet-phy@2 {
112 interrupt-parent = <&mpic>;
115 device_type = "ethernet-phy";
117 phy3: ethernet-phy@3 {
118 interrupt-parent = <&mpic>;
121 device_type = "ethernet-phy";
125 enet0: ethernet@24000 {
127 device_type = "network";
129 compatible = "gianfar";
131 local-mac-address = [ 00 00 00 00 00 00 ];
132 interrupts = <1d 2 1e 2 22 2>;
133 interrupt-parent = <&mpic>;
134 phy-handle = <&phy0>;
135 phy-connection-type = "rgmii-id";
138 enet1: ethernet@25000 {
140 device_type = "network";
142 compatible = "gianfar";
144 local-mac-address = [ 00 00 00 00 00 00 ];
145 interrupts = <23 2 24 2 28 2>;
146 interrupt-parent = <&mpic>;
147 phy-handle = <&phy1>;
148 phy-connection-type = "rgmii-id";
151 enet2: ethernet@26000 {
153 device_type = "network";
155 compatible = "gianfar";
157 local-mac-address = [ 00 00 00 00 00 00 ];
158 interrupts = <1F 2 20 2 21 2>;
159 interrupt-parent = <&mpic>;
160 phy-handle = <&phy2>;
161 phy-connection-type = "rgmii-id";
164 enet3: ethernet@27000 {
166 device_type = "network";
168 compatible = "gianfar";
170 local-mac-address = [ 00 00 00 00 00 00 ];
171 interrupts = <25 2 26 2 27 2>;
172 interrupt-parent = <&mpic>;
173 phy-handle = <&phy3>;
174 phy-connection-type = "rgmii-id";
177 serial0: serial@4500 {
179 device_type = "serial";
180 compatible = "ns16550";
182 clock-frequency = <0>;
184 interrupt-parent = <&mpic>;
187 serial1: serial@4600 {
189 device_type = "serial";
190 compatible = "ns16550";
192 clock-frequency = <0>;
194 interrupt-parent = <&mpic>;
198 clock-frequency = <0>;
199 interrupt-controller;
200 #address-cells = <0>;
201 #interrupt-cells = <2>;
203 compatible = "chrp,open-pic";
204 device_type = "open-pic";
208 global-utilities@e0000 {
209 compatible = "fsl,mpc8641-guts";
215 pci0: pcie@f8008000 {
217 compatible = "fsl,mpc8641-pcie";
219 #interrupt-cells = <1>;
221 #address-cells = <3>;
222 reg = <f8008000 1000>;
224 ranges = <02000000 0 80000000 80000000 0 20000000
225 01000000 0 00000000 e2000000 0 00100000>;
226 clock-frequency = <1fca055>;
227 interrupt-parent = <&mpic>;
229 interrupt-map-mask = <ff00 0 0 7>;
231 /* IDSEL 0x11 func 0 - PCI slot 1 */
237 /* IDSEL 0x11 func 1 - PCI slot 1 */
243 /* IDSEL 0x11 func 2 - PCI slot 1 */
249 /* IDSEL 0x11 func 3 - PCI slot 1 */
255 /* IDSEL 0x11 func 4 - PCI slot 1 */
261 /* IDSEL 0x11 func 5 - PCI slot 1 */
267 /* IDSEL 0x11 func 6 - PCI slot 1 */
273 /* IDSEL 0x11 func 7 - PCI slot 1 */
279 /* IDSEL 0x12 func 0 - PCI slot 2 */
285 /* IDSEL 0x12 func 1 - PCI slot 2 */
291 /* IDSEL 0x12 func 2 - PCI slot 2 */
297 /* IDSEL 0x12 func 3 - PCI slot 2 */
303 /* IDSEL 0x12 func 4 - PCI slot 2 */
309 /* IDSEL 0x12 func 5 - PCI slot 2 */
315 /* IDSEL 0x12 func 6 - PCI slot 2 */
321 /* IDSEL 0x12 func 7 - PCI slot 2 */
328 e000 0 0 1 &i8259 c 2
329 e100 0 0 1 &i8259 9 2
330 e200 0 0 1 &i8259 a 2
331 e300 0 0 1 &i8259 b 2
334 e800 0 0 1 &i8259 6 2
337 f000 0 0 1 &i8259 7 2
338 f100 0 0 1 &i8259 7 2
340 // IDSEL 0x1f IDE/SATA
341 f800 0 0 1 &i8259 e 2
342 f900 0 0 1 &i8259 5 2
348 #address-cells = <3>;
350 ranges = <02000000 0 80000000
360 #address-cells = <3>;
361 ranges = <02000000 0 80000000
369 #interrupt-cells = <2>;
371 #address-cells = <2>;
372 reg = <f000 0 0 0 0>;
373 ranges = <1 0 01000000 0 0
375 interrupt-parent = <&i8259>;
377 i8259: interrupt-controller@20 {
381 interrupt-controller;
382 device_type = "interrupt-controller";
383 #address-cells = <0>;
384 #interrupt-cells = <2>;
385 compatible = "chrp,iic";
387 interrupt-parent = <&mpic>;
392 #address-cells = <1>;
393 reg = <1 60 1 1 64 1>;
394 interrupts = <1 3 c 3>;
400 compatible = "pnpPNP,303";
405 compatible = "pnpPNP,f03";
424 pci1: pcie@f8009000 {
426 compatible = "fsl,mpc8641-pcie";
428 #interrupt-cells = <1>;
430 #address-cells = <3>;
431 reg = <f8009000 1000>;
433 ranges = <02000000 0 a0000000 a0000000 0 20000000
434 01000000 0 00000000 e3000000 0 00100000>;
435 clock-frequency = <1fca055>;
436 interrupt-parent = <&mpic>;
438 interrupt-map-mask = <f800 0 0 7>;
449 #address-cells = <3>;
451 ranges = <02000000 0 a0000000