arch/powerpc/boot/dts/mpc8536ds.dts

   1 /*
   2  * MPC8536 DS Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor, Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "fsl,mpc8536ds";
  16         compatible = "fsl,mpc8536ds";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26                 pci1 = &pci1;
  27                 pci2 = &pci2;
  28                 pci3 = &pci3;
  29         };
  30
  31         cpus {
  32                 #cpus = <1>;
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8536@0 {
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                         next-level-cache = <&L2>;
  40                 };
  41         };
  42
  43         memory {
  44                 device_type = "memory";
  45                 reg = <00000000 00000000>;      // Filled by U-Boot
  46         };
  47
  48         soc@ffe00000 {
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 device_type = "soc";
  52                 compatible = "simple-bus";
  53                 ranges = <0x0 0xffe00000 0x100000>;
  54                 bus-frequency = <0>;            // Filled out by uboot.
  55
  56                 ecm-law@0 {
  57                         compatible = "fsl,ecm-law";
  58                         reg = <0x0 0x1000>;
  59                         fsl,num-laws = <12>;
  60                 };
  61
  62                 ecm@1000 {
  63                         compatible = "fsl,mpc8536-ecm", "fsl,ecm";
  64                         reg = <0x1000 0x1000>;
  65                         interrupts = <17 2>;
  66                         interrupt-parent = <&mpic>;
  67                 };
  68
  69                 memory-controller@2000 {
  70                         compatible = "fsl,mpc8536-memory-controller";
  71                         reg = <0x2000 0x1000>;
  72                         interrupt-parent = <&mpic>;
  73                         interrupts = <18 0x2>;
  74                 };
  75
  76                 L2: l2-cache-controller@20000 {
  77                         compatible = "fsl,mpc8536-l2-cache-controller";
  78                         reg = <0x20000 0x1000>;
  79                         interrupt-parent = <&mpic>;
  80                         interrupts = <16 0x2>;
  81                 };
  82
  83                 i2c@3000 {
  84                         #address-cells = <1>;
  85                         #size-cells = <0>;
  86                         cell-index = <0>;
  87                         compatible = "fsl-i2c";
  88                         reg = <0x3000 0x100>;
  89                         interrupts = <43 0x2>;
  90                         interrupt-parent = <&mpic>;
  91                         dfsrr;
  92                 };
  93
  94                 i2c@3100 {
  95                         #address-cells = <1>;
  96                         #size-cells = <0>;
  97                         cell-index = <1>;
  98                         compatible = "fsl-i2c";
  99                         reg = <0x3100 0x100>;
 100                         interrupts = <43 0x2>;
 101                         interrupt-parent = <&mpic>;
 102                         dfsrr;
 103                         rtc@68 {
 104                                 compatible = "dallas,ds3232";
 105                                 reg = <0x68>;
 106                                 interrupts = <0 0x1>;
 107                                 interrupt-parent = <&mpic>;
 108                         };
 109                 };
 110
 111                 dma@21300 {
 112                         #address-cells = <1>;
 113                         #size-cells = <1>;
 114                         compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
 115                         reg = <0x21300 4>;
 116                         ranges = <0 0x21100 0x200>;
 117                         cell-index = <0>;
 118                         dma-channel@0 {
 119                                 compatible = "fsl,mpc8536-dma-channel",
 120                                              "fsl,eloplus-dma-channel";
 121                                 reg = <0x0 0x80>;
 122                                 cell-index = <0>;
 123                                 interrupt-parent = <&mpic>;
 124                                 interrupts = <20 2>;
 125                         };
 126                         dma-channel@80 {
 127                                 compatible = "fsl,mpc8536-dma-channel",
 128                                              "fsl,eloplus-dma-channel";
 129                                 reg = <0x80 0x80>;
 130                                 cell-index = <1>;
 131                                 interrupt-parent = <&mpic>;
 132                                 interrupts = <21 2>;
 133                         };
 134                         dma-channel@100 {
 135                                 compatible = "fsl,mpc8536-dma-channel",
 136                                              "fsl,eloplus-dma-channel";
 137                                 reg = <0x100 0x80>;
 138                                 cell-index = <2>;
 139                                 interrupt-parent = <&mpic>;
 140                                 interrupts = <22 2>;
 141                         };
 142                         dma-channel@180 {
 143                                 compatible = "fsl,mpc8536-dma-channel",
 144                                              "fsl,eloplus-dma-channel";
 145                                 reg = <0x180 0x80>;
 146                                 cell-index = <3>;
 147                                 interrupt-parent = <&mpic>;
 148                                 interrupts = <23 2>;
 149                         };
 150                 };
 151
 152                 usb@22000 {
 153                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 154                         reg = <0x22000 0x1000>;
 155                         #address-cells = <1>;
 156                         #size-cells = <0>;
 157                         interrupt-parent = <&mpic>;
 158                         interrupts = <28 0x2>;
 159                         phy_type = "ulpi";
 160                 };
 161
 162                 usb@23000 {
 163                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 164                         reg = <0x23000 0x1000>;
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                         interrupt-parent = <&mpic>;
 168                         interrupts = <46 0x2>;
 169                         phy_type = "ulpi";
 170                 };
 171
 172                 enet0: ethernet@24000 {
 173                         #address-cells = <1>;
 174                         #size-cells = <1>;
 175                         cell-index = <0>;
 176                         device_type = "network";
 177                         model = "eTSEC";
 178                         compatible = "gianfar";
 179                         reg = <0x24000 0x1000>;
 180                         ranges = <0x0 0x24000 0x1000>;
 181                         local-mac-address = [ 00 00 00 00 00 00 ];
 182                         interrupts = <29 2 30 2 34 2>;
 183                         interrupt-parent = <&mpic>;
 184                         tbi-handle = <&tbi0>;
 185                         phy-handle = <&phy1>;
 186                         phy-connection-type = "rgmii-id";
 187
 188                         mdio@520 {
 189                                 #address-cells = <1>;
 190                                 #size-cells = <0>;
 191                                 compatible = "fsl,gianfar-mdio";
 192                                 reg = <0x520 0x20>;
 193
 194                                 phy0: ethernet-phy@0 {
 195                                         interrupt-parent = <&mpic>;
 196                                         interrupts = <10 0x1>;
 197                                         reg = <0>;
 198                                         device_type = "ethernet-phy";
 199                                 };
 200                                 phy1: ethernet-phy@1 {
 201                                         interrupt-parent = <&mpic>;
 202                                         interrupts = <10 0x1>;
 203                                         reg = <1>;
 204                                         device_type = "ethernet-phy";
 205                                 };
 206                                 tbi0: tbi-phy@11 {
 207                                         reg = <0x11>;
 208                                         device_type = "tbi-phy";
 209                                 };
 210                         };
 211                 };
 212
 213                 enet1: ethernet@26000 {
 214                         #address-cells = <1>;
 215                         #size-cells = <1>;
 216                         cell-index = <1>;
 217                         device_type = "network";
 218                         model = "eTSEC";
 219                         compatible = "gianfar";
 220                         reg = <0x26000 0x1000>;
 221                         ranges = <0x0 0x26000 0x1000>;
 222                         local-mac-address = [ 00 00 00 00 00 00 ];
 223                         interrupts = <31 2 32 2 33 2>;
 224                         interrupt-parent = <&mpic>;
 225                         tbi-handle = <&tbi1>;
 226                         phy-handle = <&phy0>;
 227                         phy-connection-type = "rgmii-id";
 228
 229                         mdio@520 {
 230                                 #address-cells = <1>;
 231                                 #size-cells = <0>;
 232                                 compatible = "fsl,gianfar-tbi";
 233                                 reg = <0x520 0x20>;
 234
 235                                 tbi1: tbi-phy@11 {
 236                                         reg = <0x11>;
 237                                         device_type = "tbi-phy";
 238                                 };
 239                         };
 240                 };
 241
 242                 usb@2b000 {
 243                         compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
 244                         reg = <0x2b000 0x1000>;
 245                         #address-cells = <1>;
 246                         #size-cells = <0>;
 247                         interrupt-parent = <&mpic>;
 248                         interrupts = <60 0x2>;
 249                         dr_mode = "peripheral";
 250                         phy_type = "ulpi";
 251                 };
 252
 253                 serial0: serial@4500 {
 254                         cell-index = <0>;
 255                         device_type = "serial";
 256                         compatible = "ns16550";
 257                         reg = <0x4500 0x100>;
 258                         clock-frequency = <0>;
 259                         interrupts = <42 0x2>;
 260                         interrupt-parent = <&mpic>;
 261                 };
 262
 263                 serial1: serial@4600 {
 264                         cell-index = <1>;
 265                         device_type = "serial";
 266                         compatible = "ns16550";
 267                         reg = <0x4600 0x100>;
 268                         clock-frequency = <0>;
 269                         interrupts = <42 0x2>;
 270                         interrupt-parent = <&mpic>;
 271                 };
 272
 273                 crypto@30000 {
 274                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 275                                      "fsl,sec2.1", "fsl,sec2.0";
 276                         reg = <0x30000 0x10000>;
 277                         interrupts = <45 2 58 2>;
 278                         interrupt-parent = <&mpic>;
 279                         fsl,num-channels = <4>;
 280                         fsl,channel-fifo-len = <24>;
 281                         fsl,exec-units-mask = <0x9fe>;
 282                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 283                 };
 284
 285                 sata@18000 {
 286                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 287                         reg = <0x18000 0x1000>;
 288                         cell-index = <1>;
 289                         interrupts = <74 0x2>;
 290                         interrupt-parent = <&mpic>;
 291                 };
 292
 293                 sata@19000 {
 294                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 295                         reg = <0x19000 0x1000>;
 296                         cell-index = <2>;
 297                         interrupts = <41 0x2>;
 298                         interrupt-parent = <&mpic>;
 299                 };
 300
 301                 global-utilities@e0000 {        //global utilities block
 302                         compatible = "fsl,mpc8548-guts";
 303                         reg = <0xe0000 0x1000>;
 304                         fsl,has-rstcr;
 305                 };
 306
 307                 mpic: pic@40000 {
 308                         clock-frequency = <0>;
 309                         interrupt-controller;
 310                         #address-cells = <0>;
 311                         #interrupt-cells = <2>;
 312                         reg = <0x40000 0x40000>;
 313                         compatible = "chrp,open-pic";
 314                         device_type = "open-pic";
 315                         big-endian;
 316                 };
 317
 318                 msi@41600 {
 319                         compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
 320                         reg = <0x41600 0x80>;
 321                         msi-available-ranges = <0 0x100>;
 322                         interrupts = <
 323                                 0xe0 0
 324                                 0xe1 0
 325                                 0xe2 0
 326                                 0xe3 0
 327                                 0xe4 0
 328                                 0xe5 0
 329                                 0xe6 0
 330                                 0xe7 0>;
 331                         interrupt-parent = <&mpic>;
 332                 };
 333         };
 334
 335         pci0: pci@ffe08000 {
 336                 compatible = "fsl,mpc8540-pci";
 337                 device_type = "pci";
 338                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 339                 interrupt-map = <
 340
 341                         /* IDSEL 0x11 J17 Slot 1 */
 342                         0x8800 0 0 1 &mpic 1 1
 343                         0x8800 0 0 2 &mpic 2 1
 344                         0x8800 0 0 3 &mpic 3 1
 345                         0x8800 0 0 4 &mpic 4 1>;
 346
 347                 interrupt-parent = <&mpic>;
 348                 interrupts = <24 0x2>;
 349                 bus-range = <0 0xff>;
 350                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
 351                           0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
 352                 clock-frequency = <66666666>;
 353                 #interrupt-cells = <1>;
 354                 #size-cells = <2>;
 355                 #address-cells = <3>;
 356                 reg = <0xffe08000 0x1000>;
 357         };
 358
 359         pci1: pcie@ffe09000 {
 360                 compatible = "fsl,mpc8548-pcie";
 361                 device_type = "pci";
 362                 #interrupt-cells = <1>;
 363                 #size-cells = <2>;
 364                 #address-cells = <3>;
 365                 reg = <0xffe09000 0x1000>;
 366                 bus-range = <0 0xff>;
 367                 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
 368                           0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
 369                 clock-frequency = <33333333>;
 370                 interrupt-parent = <&mpic>;
 371                 interrupts = <25 0x2>;
 372                 interrupt-map-mask = <0xf800 0 0 7>;
 373                 interrupt-map = <
 374                         /* IDSEL 0x0 */
 375                         0000 0 0 1 &mpic 4 1
 376                         0000 0 0 2 &mpic 5 1
 377                         0000 0 0 3 &mpic 6 1
 378                         0000 0 0 4 &mpic 7 1
 379                         >;
 380                 pcie@0 {
 381                         reg = <0 0 0 0 0>;
 382                         #size-cells = <2>;
 383                         #address-cells = <3>;
 384                         device_type = "pci";
 385                         ranges = <0x02000000 0 0x98000000
 386                                   0x02000000 0 0x98000000
 387                                   0 0x08000000
 388
 389                                   0x01000000 0 0x00000000
 390                                   0x01000000 0 0x00000000
 391                                   0 0x00010000>;
 392                 };
 393         };
 394
 395         pci2: pcie@ffe0a000 {
 396                 compatible = "fsl,mpc8548-pcie";
 397                 device_type = "pci";
 398                 #interrupt-cells = <1>;
 399                 #size-cells = <2>;
 400                 #address-cells = <3>;
 401                 reg = <0xffe0a000 0x1000>;
 402                 bus-range = <0 0xff>;
 403                 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
 404                           0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
 405                 clock-frequency = <33333333>;
 406                 interrupt-parent = <&mpic>;
 407                 interrupts = <26 0x2>;
 408                 interrupt-map-mask = <0xf800 0 0 7>;
 409                 interrupt-map = <
 410                         /* IDSEL 0x0 */
 411                         0000 0 0 1 &mpic 0 1
 412                         0000 0 0 2 &mpic 1 1
 413                         0000 0 0 3 &mpic 2 1
 414                         0000 0 0 4 &mpic 3 1
 415                         >;
 416                 pcie@0 {
 417                         reg = <0 0 0 0 0>;
 418                         #size-cells = <2>;
 419                         #address-cells = <3>;
 420                         device_type = "pci";
 421                         ranges = <0x02000000 0 0x90000000
 422                                   0x02000000 0 0x90000000
 423                                   0 0x08000000
 424
 425                                   0x01000000 0 0x00000000
 426                                   0x01000000 0 0x00000000
 427                                   0 0x00010000>;
 428                 };
 429         };
 430
 431         pci3: pcie@ffe0b000 {
 432                 compatible = "fsl,mpc8548-pcie";
 433                 device_type = "pci";
 434                 #interrupt-cells = <1>;
 435                 #size-cells = <2>;
 436                 #address-cells = <3>;
 437                 reg = <0xffe0b000 0x1000>;
 438                 bus-range = <0 0xff>;
 439                 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
 440                           0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
 441                 clock-frequency = <33333333>;
 442                 interrupt-parent = <&mpic>;
 443                 interrupts = <27 0x2>;
 444                 interrupt-map-mask = <0xf800 0 0 7>;
 445                 interrupt-map = <
 446                         /* IDSEL 0x0 */
 447                         0000 0 0 1 &mpic 8 1
 448                         0000 0 0 2 &mpic 9 1
 449                         0000 0 0 3 &mpic 10 1
 450                         0000 0 0 4 &mpic 11 1
 451                         >;
 452
 453                 pcie@0 {
 454                         reg = <0 0 0 0 0>;
 455                         #size-cells = <2>;
 456                         #address-cells = <3>;
 457                         device_type = "pci";
 458                         ranges = <0x02000000 0 0xa0000000
 459                                   0x02000000 0 0xa0000000
 460                                   0 0x20000000
 461
 462                                   0x01000000 0 0x00000000
 463                                   0x01000000 0 0x00000000
 464                                   0 0x00100000>;
 465                 };
 466         };
 467 };