arch/powerpc/boot/dts/mpc834x_mds.dts

   1 /*
   2  * MPC8349E MDS Device Tree Source
   3  *
   4  * Copyright 2005, 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8349EMDS";
  14         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 PowerPC,8349@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         d-cache-line-size = <20>;       // 32 bytes
  26                         i-cache-line-size = <20>;       // 32 bytes
  27                         d-cache-size = <8000>;          // L1, 32K
  28                         i-cache-size = <8000>;          // L1, 32K
  29                         timebase-frequency = <0>;       // from bootloader
  30                         bus-frequency = <0>;            // from bootloader
  31                         clock-frequency = <0>;          // from bootloader
  32                 };
  33         };
  34
  35         memory {
  36                 device_type = "memory";
  37                 reg = <00000000 10000000>;      // 256MB at 0
  38         };
  39
  40         bcsr@e2400000 {
  41                 device_type = "board-control";
  42                 reg = <e2400000 8000>;
  43         };
  44
  45         soc8349@e0000000 {
  46                 #address-cells = <1>;
  47                 #size-cells = <1>;
  48                 device_type = "soc";
  49                 ranges = <0 e0000000 00100000>;
  50                 reg = <e0000000 00000200>;
  51                 bus-frequency = <0>;
  52
  53                 wdt@200 {
  54                         device_type = "watchdog";
  55                         compatible = "mpc83xx_wdt";
  56                         reg = <200 100>;
  57                 };
  58
  59                 i2c@3000 {
  60                         #address-cells = <1>;
  61                         #size-cells = <0>;
  62                         cell-index = <0>;
  63                         compatible = "fsl-i2c";
  64                         reg = <3000 100>;
  65                         interrupts = <e 8>;
  66                         interrupt-parent = < &ipic >;
  67                         dfsrr;
  68
  69                         rtc@68 {
  70                                 compatible = "dallas,ds1374";
  71                                 reg = <68>;
  72                         };
  73                 };
  74
  75                 i2c@3100 {
  76                         #address-cells = <1>;
  77                         #size-cells = <0>;
  78                         cell-index = <1>;
  79                         compatible = "fsl-i2c";
  80                         reg = <3100 100>;
  81                         interrupts = <f 8>;
  82                         interrupt-parent = < &ipic >;
  83                         dfsrr;
  84                 };
  85
  86                 spi@7000 {
  87                         device_type = "spi";
  88                         compatible = "fsl_spi";
  89                         reg = <7000 1000>;
  90                         interrupts = <10 8>;
  91                         interrupt-parent = < &ipic >;
  92                         mode = "cpu";
  93                 };
  94
  95                 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
  96                 /* port = 0 or 1 */
  97                 usb@22000 {
  98                         device_type = "usb";
  99                         compatible = "fsl-usb2-mph";
 100                         reg = <22000 1000>;
 101                         #address-cells = <1>;
 102                         #size-cells = <0>;
 103                         interrupt-parent = < &ipic >;
 104                         interrupts = <27 8>;
 105                         phy_type = "ulpi";
 106                         port1;
 107                 };
 108                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 109                 usb@23000 {
 110                         device_type = "usb";
 111                         compatible = "fsl-usb2-dr";
 112                         reg = <23000 1000>;
 113                         #address-cells = <1>;
 114                         #size-cells = <0>;
 115                         interrupt-parent = < &ipic >;
 116                         interrupts = <26 8>;
 117                         dr_mode = "otg";
 118                         phy_type = "ulpi";
 119                 };
 120
 121                 mdio@24520 {
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124                         compatible = "fsl,gianfar-mdio";
 125                         reg = <24520 20>;
 126
 127                         phy0: ethernet-phy@0 {
 128                                 interrupt-parent = < &ipic >;
 129                                 interrupts = <11 8>;
 130                                 reg = <0>;
 131                                 device_type = "ethernet-phy";
 132                         };
 133                         phy1: ethernet-phy@1 {
 134                                 interrupt-parent = < &ipic >;
 135                                 interrupts = <12 8>;
 136                                 reg = <1>;
 137                                 device_type = "ethernet-phy";
 138                         };
 139                 };
 140
 141                 enet0: ethernet@24000 {
 142                         cell-index = <0>;
 143                         device_type = "network";
 144                         model = "TSEC";
 145                         compatible = "gianfar";
 146                         reg = <24000 1000>;
 147                         local-mac-address = [ 00 00 00 00 00 00 ];
 148                         interrupts = <20 8 21 8 22 8>;
 149                         interrupt-parent = < &ipic >;
 150                         phy-handle = < &phy0 >;
 151                         linux,network-index = <0>;
 152                 };
 153
 154                 enet1: ethernet@25000 {
 155                         cell-index = <1>;
 156                         device_type = "network";
 157                         model = "TSEC";
 158                         compatible = "gianfar";
 159                         reg = <25000 1000>;
 160                         local-mac-address = [ 00 00 00 00 00 00 ];
 161                         interrupts = <23 8 24 8 25 8>;
 162                         interrupt-parent = < &ipic >;
 163                         phy-handle = < &phy1 >;
 164                         linux,network-index = <1>;
 165                 };
 166
 167                 serial@4500 {
 168                         device_type = "serial";
 169                         compatible = "ns16550";
 170                         reg = <4500 100>;
 171                         clock-frequency = <0>;
 172                         interrupts = <9 8>;
 173                         interrupt-parent = < &ipic >;
 174                 };
 175
 176                 serial@4600 {
 177                         device_type = "serial";
 178                         compatible = "ns16550";
 179                         reg = <4600 100>;
 180                         clock-frequency = <0>;
 181                         interrupts = <a 8>;
 182                         interrupt-parent = < &ipic >;
 183                 };
 184
 185                 /* May need to remove if on a part without crypto engine */
 186                 crypto@30000 {
 187                         device_type = "crypto";
 188                         model = "SEC2";
 189                         compatible = "talitos";
 190                         reg = <30000 10000>;
 191                         interrupts = <b 8>;
 192                         interrupt-parent = < &ipic >;
 193                         num-channels = <4>;
 194                         channel-fifo-len = <18>;
 195                         exec-units-mask = <0000007e>;
 196                         /* desc mask is for rev2.0,
 197                          * we need runtime fixup for >2.0 */
 198                         descriptor-types-mask = <01010ebf>;
 199                 };
 200
 201                 /* IPIC
 202                  * interrupts cell = <intr #, sense>
 203                  * sense values match linux IORESOURCE_IRQ_* defines:
 204                  * sense == 8: Level, low assertion
 205                  * sense == 2: Edge, high-to-low change
 206                  */
 207                 ipic: pic@700 {
 208                         interrupt-controller;
 209                         #address-cells = <0>;
 210                         #interrupt-cells = <2>;
 211                         reg = <700 100>;
 212                         device_type = "ipic";
 213                 };
 214         };
 215
 216         pci@e0008500 {
 217                 interrupt-map-mask = <f800 0 0 7>;
 218                 interrupt-map = <
 219
 220                                 /* IDSEL 0x11 */
 221                                  8800 0 0 1 &ipic 14 8
 222                                  8800 0 0 2 &ipic 15 8
 223                                  8800 0 0 3 &ipic 16 8
 224                                  8800 0 0 4 &ipic 17 8
 225
 226                                 /* IDSEL 0x12 */
 227                                  9000 0 0 1 &ipic 16 8
 228                                  9000 0 0 2 &ipic 17 8
 229                                  9000 0 0 3 &ipic 14 8
 230                                  9000 0 0 4 &ipic 15 8
 231
 232                                 /* IDSEL 0x13 */
 233                                  9800 0 0 1 &ipic 17 8
 234                                  9800 0 0 2 &ipic 14 8
 235                                  9800 0 0 3 &ipic 15 8
 236                                  9800 0 0 4 &ipic 16 8
 237
 238                                 /* IDSEL 0x15 */
 239                                  a800 0 0 1 &ipic 14 8
 240                                  a800 0 0 2 &ipic 15 8
 241                                  a800 0 0 3 &ipic 16 8
 242                                  a800 0 0 4 &ipic 17 8
 243
 244                                 /* IDSEL 0x16 */
 245                                  b000 0 0 1 &ipic 17 8
 246                                  b000 0 0 2 &ipic 14 8
 247                                  b000 0 0 3 &ipic 15 8
 248                                  b000 0 0 4 &ipic 16 8
 249
 250                                 /* IDSEL 0x17 */
 251                                  b800 0 0 1 &ipic 16 8
 252                                  b800 0 0 2 &ipic 17 8
 253                                  b800 0 0 3 &ipic 14 8
 254                                  b800 0 0 4 &ipic 15 8
 255
 256                                 /* IDSEL 0x18 */
 257                                  c000 0 0 1 &ipic 15 8
 258                                  c000 0 0 2 &ipic 16 8
 259                                  c000 0 0 3 &ipic 17 8
 260                                  c000 0 0 4 &ipic 14 8>;
 261                 interrupt-parent = < &ipic >;
 262                 interrupts = <42 8>;
 263                 bus-range = <0 0>;
 264                 ranges = <02000000 0 90000000 90000000 0 10000000
 265                           42000000 0 80000000 80000000 0 10000000
 266                           01000000 0 00000000 e2000000 0 00100000>;
 267                 clock-frequency = <3f940aa>;
 268                 #interrupt-cells = <1>;
 269                 #size-cells = <2>;
 270                 #address-cells = <3>;
 271                 reg = <e0008500 100>;
 272                 compatible = "fsl,mpc8349-pci";
 273                 device_type = "pci";
 274         };
 275
 276         pci@e0008600 {
 277                 interrupt-map-mask = <f800 0 0 7>;
 278                 interrupt-map = <
 279
 280                                 /* IDSEL 0x11 */
 281                                  8800 0 0 1 &ipic 14 8
 282                                  8800 0 0 2 &ipic 15 8
 283                                  8800 0 0 3 &ipic 16 8
 284                                  8800 0 0 4 &ipic 17 8
 285
 286                                 /* IDSEL 0x12 */
 287                                  9000 0 0 1 &ipic 16 8
 288                                  9000 0 0 2 &ipic 17 8
 289                                  9000 0 0 3 &ipic 14 8
 290                                  9000 0 0 4 &ipic 15 8
 291
 292                                 /* IDSEL 0x13 */
 293                                  9800 0 0 1 &ipic 17 8
 294                                  9800 0 0 2 &ipic 14 8
 295                                  9800 0 0 3 &ipic 15 8
 296                                  9800 0 0 4 &ipic 16 8
 297
 298                                 /* IDSEL 0x15 */
 299                                  a800 0 0 1 &ipic 14 8
 300                                  a800 0 0 2 &ipic 15 8
 301                                  a800 0 0 3 &ipic 16 8
 302                                  a800 0 0 4 &ipic 17 8
 303
 304                                 /* IDSEL 0x16 */
 305                                  b000 0 0 1 &ipic 17 8
 306                                  b000 0 0 2 &ipic 14 8
 307                                  b000 0 0 3 &ipic 15 8
 308                                  b000 0 0 4 &ipic 16 8
 309
 310                                 /* IDSEL 0x17 */
 311                                  b800 0 0 1 &ipic 16 8
 312                                  b800 0 0 2 &ipic 17 8
 313                                  b800 0 0 3 &ipic 14 8
 314                                  b800 0 0 4 &ipic 15 8
 315
 316                                 /* IDSEL 0x18 */
 317                                  c000 0 0 1 &ipic 15 8
 318                                  c000 0 0 2 &ipic 16 8
 319                                  c000 0 0 3 &ipic 17 8
 320                                  c000 0 0 4 &ipic 14 8>;
 321                 interrupt-parent = < &ipic >;
 322                 interrupts = <42 8>;
 323                 bus-range = <0 0>;
 324                 ranges = <02000000 0 b0000000 b0000000 0 10000000
 325                           42000000 0 a0000000 a0000000 0 10000000
 326                           01000000 0 00000000 e2100000 0 00100000>;
 327                 clock-frequency = <3f940aa>;
 328                 #interrupt-cells = <1>;
 329                 #size-cells = <2>;
 330                 #address-cells = <3>;
 331                 reg = <e0008600 100>;
 332                 compatible = "fsl,mpc8349-pci";
 333                 device_type = "pci";
 334         };
 335 };