arch/powerpc/boot/dts/mpc8313erdb.dts

   1 /*
   2  * MPC8313E RDB Device Tree Source
   3  *
   4  * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8313ERDB";
  14         compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 PowerPC,8313@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         d-cache-line-size = <20>;       // 32 bytes
  26                         i-cache-line-size = <20>;       // 32 bytes
  27                         d-cache-size = <4000>;          // L1, 16K
  28                         i-cache-size = <4000>;          // L1, 16K
  29                         timebase-frequency = <0>;       // from bootloader
  30                         bus-frequency = <0>;            // from bootloader
  31                         clock-frequency = <0>;          // from bootloader
  32                 };
  33         };
  34
  35         memory {
  36                 device_type = "memory";
  37                 reg = <00000000 08000000>;      // 128MB at 0
  38         };
  39
  40         soc8313@e0000000 {
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43                 device_type = "soc";
  44                 ranges = <0 e0000000 00100000>;
  45                 reg = <e0000000 00000200>;
  46                 bus-frequency = <0>;
  47
  48                 wdt@200 {
  49                         device_type = "watchdog";
  50                         compatible = "mpc83xx_wdt";
  51                         reg = <200 100>;
  52                 };
  53
  54                 i2c@3000 {
  55                         device_type = "i2c";
  56                         compatible = "fsl-i2c";
  57                         reg = <3000 100>;
  58                         interrupts = <e 8>;
  59                         interrupt-parent = < &ipic >;
  60                         dfsrr;
  61                 };
  62
  63                 i2c@3100 {
  64                         device_type = "i2c";
  65                         compatible = "fsl-i2c";
  66                         reg = <3100 100>;
  67                         interrupts = <f 8>;
  68                         interrupt-parent = < &ipic >;
  69                         dfsrr;
  70                 };
  71
  72                 spi@7000 {
  73                         device_type = "spi";
  74                         compatible = "fsl_spi";
  75                         reg = <7000 1000>;
  76                         interrupts = <10 8>;
  77                         interrupt-parent = < &ipic >;
  78                         mode = "cpu";
  79                 };
  80
  81                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  82                 usb@23000 {
  83                         device_type = "usb";
  84                         compatible = "fsl-usb2-dr";
  85                         reg = <23000 1000>;
  86                         #address-cells = <1>;
  87                         #size-cells = <0>;
  88                         interrupt-parent = < &ipic >;
  89                         interrupts = <26 8>;
  90                         phy_type = "utmi_wide";
  91                 };
  92
  93                 mdio@24520 {
  94                         device_type = "mdio";
  95                         compatible = "gianfar";
  96                         reg = <24520 20>;
  97                         #address-cells = <1>;
  98                         #size-cells = <0>;
  99                         phy1: ethernet-phy@1 {
 100                                 interrupt-parent = < &ipic >;
 101                                 interrupts = <13 8>;
 102                                 reg = <1>;
 103                                 device_type = "ethernet-phy";
 104                         };
 105                         phy4: ethernet-phy@4 {
 106                                 interrupt-parent = < &ipic >;
 107                                 interrupts = <14 8>;
 108                                 reg = <4>;
 109                                 device_type = "ethernet-phy";
 110                         };
 111                 };
 112
 113                 ethernet@24000 {
 114                         device_type = "network";
 115                         model = "eTSEC";
 116                         compatible = "gianfar";
 117                         reg = <24000 1000>;
 118                         local-mac-address = [ 00 00 00 00 00 00 ];
 119                         interrupts = <25 8 24 8 23 8>;
 120                         interrupt-parent = < &ipic >;
 121                         phy-handle = < &phy1 >;
 122                 };
 123
 124                 ethernet@25000 {
 125                         device_type = "network";
 126                         model = "eTSEC";
 127                         compatible = "gianfar";
 128                         reg = <25000 1000>;
 129                         local-mac-address = [ 00 00 00 00 00 00 ];
 130                         interrupts = <22 8 21 8 20 8>;
 131                         interrupt-parent = < &ipic >;
 132                         phy-handle = < &phy4 >;
 133                 };
 134
 135                 serial@4500 {
 136                         device_type = "serial";
 137                         compatible = "ns16550";
 138                         reg = <4500 100>;
 139                         clock-frequency = <0>;
 140                         interrupts = <9 8>;
 141                         interrupt-parent = < &ipic >;
 142                 };
 143
 144                 serial@4600 {
 145                         device_type = "serial";
 146                         compatible = "ns16550";
 147                         reg = <4600 100>;
 148                         clock-frequency = <0>;
 149                         interrupts = <a 8>;
 150                         interrupt-parent = < &ipic >;
 151                 };
 152
 153                 crypto@30000 {
 154                         device_type = "crypto";
 155                         model = "SEC2";
 156                         compatible = "talitos";
 157                         reg = <30000 7000>;
 158                         interrupts = <b 8>;
 159                         interrupt-parent = < &ipic >;
 160                         /* Rev. 2.2 */
 161                         num-channels = <1>;
 162                         channel-fifo-len = <18>;
 163                         exec-units-mask = <0000004c>;
 164                         descriptor-types-mask = <0122003f>;
 165                 };
 166
 167                 /* IPIC
 168                  * interrupts cell = <intr #, sense>
 169                  * sense values match linux IORESOURCE_IRQ_* defines:
 170                  * sense == 8: Level, low assertion
 171                  * sense == 2: Edge, high-to-low change
 172                  */
 173                 ipic: pic@700 {
 174                         interrupt-controller;
 175                         #address-cells = <0>;
 176                         #interrupt-cells = <2>;
 177                         reg = <700 100>;
 178                         device_type = "ipic";
 179                 };
 180         };
 181
 182         pci@e0008500 {
 183                 interrupt-map-mask = <f800 0 0 7>;
 184                 interrupt-map = <
 185
 186                                 /* IDSEL 0x0E -mini PCI */
 187                                  7000 0 0 1 &ipic 12 8
 188                                  7000 0 0 2 &ipic 12 8
 189                                  7000 0 0 3 &ipic 12 8
 190                                  7000 0 0 4 &ipic 12 8
 191
 192                                 /* IDSEL 0x0F - PCI slot */
 193                                  7800 0 0 1 &ipic 11 8
 194                                  7800 0 0 2 &ipic 12 8
 195                                  7800 0 0 3 &ipic 11 8
 196                                  7800 0 0 4 &ipic 12 8>;
 197                 interrupt-parent = < &ipic >;
 198                 interrupts = <42 8>;
 199                 bus-range = <0 0>;
 200                 ranges = <02000000 0 90000000 90000000 0 10000000
 201                           42000000 0 80000000 80000000 0 10000000
 202                           01000000 0 00000000 e2000000 0 00100000>;
 203                 clock-frequency = <3f940aa>;
 204                 #interrupt-cells = <1>;
 205                 #size-cells = <2>;
 206                 #address-cells = <3>;
 207                 reg = <e0008500 100>;
 208                 compatible = "fsl,mpc8349-pci";
 209                 device_type = "pci";
 210         };
 211 };