[MIPS] i8253 PIT clocksource and clockevent drivers
[pandora-kernel.git] / arch / mips / cobalt / setup.c
1 /*
2  * Setup pointers to hardware dependent routines.
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file "COPYING" in the main directory of this archive
6  * for more details.
7  *
8  * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
9  * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
10  *
11  */
12 #include <linux/interrupt.h>
13 #include <linux/init.h>
14 #include <linux/pm.h>
15
16 #include <asm/bootinfo.h>
17 #include <asm/time.h>
18 #include <asm/i8253.h>
19 #include <asm/io.h>
20 #include <asm/reboot.h>
21 #include <asm/gt64120.h>
22
23 #include <cobalt.h>
24 #include <irq.h>
25
26 extern void cobalt_machine_restart(char *command);
27 extern void cobalt_machine_halt(void);
28 extern void cobalt_machine_power_off(void);
29
30 const char *get_system_type(void)
31 {
32         switch (cobalt_board_id) {
33                 case COBALT_BRD_ID_QUBE1:
34                         return "Cobalt Qube";
35                 case COBALT_BRD_ID_RAQ1:
36                         return "Cobalt RaQ";
37                 case COBALT_BRD_ID_QUBE2:
38                         return "Cobalt Qube2";
39                 case COBALT_BRD_ID_RAQ2:
40                         return "Cobalt RaQ2";
41         }
42         return "MIPS Cobalt";
43 }
44
45 void __init plat_timer_setup(struct irqaction *irq)
46 {
47         /* Load timer value for HZ (TCLK is 50MHz) */
48         GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ);
49
50         /* Enable timer0 */
51         GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
52
53         setup_irq(GT641XX_TIMER0_IRQ, irq);
54 }
55
56 /*
57  * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
58  * keyboard conntroller is never used.
59  * Also PCI-ISA bridge DMA contoroller is never used.
60  */
61 static struct resource cobalt_reserved_resources[] = {
62         {       /* dma1 */
63                 .start  = 0x00,
64                 .end    = 0x1f,
65                 .name   = "reserved",
66                 .flags  = IORESOURCE_BUSY | IORESOURCE_IO,
67         },
68         {       /* keyboard */
69                 .start  = 0x60,
70                 .end    = 0x6f,
71                 .name   = "reserved",
72                 .flags  = IORESOURCE_BUSY | IORESOURCE_IO,
73         },
74         {       /* dma page reg */
75                 .start  = 0x80,
76                 .end    = 0x8f,
77                 .name   = "reserved",
78                 .flags  = IORESOURCE_BUSY | IORESOURCE_IO,
79         },
80         {       /* dma2 */
81                 .start  = 0xc0,
82                 .end    = 0xdf,
83                 .name   = "reserved",
84                 .flags  = IORESOURCE_BUSY | IORESOURCE_IO,
85         },
86 };
87
88 void __init plat_time_init(void)
89 {
90         setup_pit_timer();
91 }
92
93 void __init plat_mem_setup(void)
94 {
95         int i;
96
97         _machine_restart = cobalt_machine_restart;
98         _machine_halt = cobalt_machine_halt;
99         pm_power_off = cobalt_machine_power_off;
100
101         set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
102
103         /* I/O port resource must include LCD/buttons */
104         ioport_resource.end = 0x0fffffff;
105
106         /* These resources have been reserved by VIA SuperI/O chip. */
107         for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
108                 request_resource(&ioport_resource, cobalt_reserved_resources + i);
109 }
110
111 /*
112  * Prom init. We read our one and only communication with the firmware.
113  * Grab the amount of installed memory.
114  * Better boot loaders (CoLo) pass a command line too :-)
115  */
116
117 void __init prom_init(void)
118 {
119         int narg, indx, posn, nchr;
120         unsigned long memsz;
121         char **argv;
122
123         memsz = fw_arg0 & 0x7fff0000;
124         narg = fw_arg0 & 0x0000ffff;
125
126         if (narg) {
127                 arcs_cmdline[0] = '\0';
128                 argv = (char **) fw_arg1;
129                 posn = 0;
130                 for (indx = 1; indx < narg; ++indx) {
131                         nchr = strlen(argv[indx]);
132                         if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
133                                 break;
134                         if (posn)
135                                 arcs_cmdline[posn++] = ' ';
136                         strcpy(arcs_cmdline + posn, argv[indx]);
137                         posn += nchr;
138                 }
139         }
140
141         add_memory_region(0x0, memsz, BOOT_MEM_RAM);
142 }
143
144 void __init prom_free_prom_memory(void)
145 {
146         /* Nothing to do! */
147 }