2 * Copyright (C) 2009,2010,2011 Imagination Technologies Ltd.
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/atomic.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched.h>
15 #include <linux/interrupt.h>
16 #include <linux/cache.h>
17 #include <linux/profile.h>
18 #include <linux/errno.h>
20 #include <linux/err.h>
21 #include <linux/cpu.h>
22 #include <linux/smp.h>
23 #include <linux/seq_file.h>
24 #include <linux/irq.h>
25 #include <linux/bootmem.h>
27 #include <asm/cacheflush.h>
28 #include <asm/cachepart.h>
29 #include <asm/core_reg.h>
31 #include <asm/mmu_context.h>
32 #include <asm/pgtable.h>
33 #include <asm/pgalloc.h>
34 #include <asm/processor.h>
35 #include <asm/setup.h>
36 #include <asm/tlbflush.h>
37 #include <asm/hwthread.h>
38 #include <asm/traps.h>
40 DECLARE_PER_CPU(PTBI, pTBI);
42 void *secondary_data_stack;
45 * structures for inter-processor calls
46 * - A collection of single bit ipi messages.
50 unsigned long ipi_count;
54 static DEFINE_PER_CPU(struct ipi_data, ipi_data) = {
55 .lock = __SPIN_LOCK_UNLOCKED(ipi_data.lock),
58 static DEFINE_SPINLOCK(boot_lock);
61 * "thread" is assumed to be a valid Meta hardware thread ID.
63 int __cpuinit boot_secondary(unsigned int thread, struct task_struct *idle)
68 * set synchronisation state between this boot processor
69 * and the secondary one
71 spin_lock(&boot_lock);
73 core_reg_write(TXUPC_ID, 0, thread, (unsigned int)secondary_startup);
74 core_reg_write(TXUPC_ID, 1, thread, 0);
77 * Give the thread privilege (PSTAT) and clear potentially problematic
78 * bits in the process (namely ISTAT, CBMarker, CBMarkerI, LSM_STEP).
80 core_reg_write(TXUCT_ID, TXSTATUS_REGNUM, thread, TXSTATUS_PSTAT_BIT);
82 /* Clear the minim enable bit. */
83 val = core_reg_read(TXUCT_ID, TXPRIVEXT_REGNUM, thread);
84 core_reg_write(TXUCT_ID, TXPRIVEXT_REGNUM, thread, val & ~0x80);
87 * set the ThreadEnable bit (0x1) in the TXENABLE register
88 * for the specified thread - off it goes!
90 val = core_reg_read(TXUCT_ID, TXENABLE_REGNUM, thread);
91 core_reg_write(TXUCT_ID, TXENABLE_REGNUM, thread, val | 0x1);
94 * now the secondary core is starting up let it run its
95 * calibrations, then wait for it to finish
97 spin_unlock(&boot_lock);
102 int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
104 unsigned int thread = cpu_2_hwthread_id[cpu];
107 load_pgd(swapper_pg_dir, thread);
112 * Tell the secondary CPU where to find its idle thread's stack.
114 secondary_data_stack = task_stack_page(idle);
119 * Now bring the CPU into our world.
121 ret = boot_secondary(thread, idle);
123 unsigned long timeout;
126 * CPU was successfully started, wait for it
127 * to come online or time out.
129 timeout = jiffies + HZ;
130 while (time_before(jiffies, timeout)) {
138 if (!cpu_online(cpu))
142 secondary_data_stack = NULL;
145 pr_crit("CPU%u: processor failed to boot\n", cpu);
148 * FIXME: We need to clean up the new idle thread. --rmk
155 #ifdef CONFIG_HOTPLUG_CPU
156 static DECLARE_COMPLETION(cpu_killed);
159 * __cpu_disable runs on the processor to be shutdown.
161 int __cpuexit __cpu_disable(void)
163 unsigned int cpu = smp_processor_id();
164 struct task_struct *p;
167 * Take this CPU offline. Once we clear this, we can't return,
168 * and we must not schedule until we're ready to give up the cpu.
170 set_cpu_online(cpu, false);
173 * OK - migrate IRQs away from this CPU
178 * Flush user cache and TLB mappings, and then remove this CPU
179 * from the vm mask set of all processes.
182 local_flush_tlb_all();
184 read_lock(&tasklist_lock);
185 for_each_process(p) {
187 cpumask_clear_cpu(cpu, mm_cpumask(p->mm));
189 read_unlock(&tasklist_lock);
195 * called on the thread which is asking for a CPU to be shutdown -
196 * waits until shutdown has completed, or it is timed out.
198 void __cpuexit __cpu_die(unsigned int cpu)
200 if (!wait_for_completion_timeout(&cpu_killed, msecs_to_jiffies(1)))
201 pr_err("CPU%u: unable to kill\n", cpu);
205 * Called from the idle thread for the CPU which has been shutdown.
207 * Note that we do not return from this function. If this cpu is
208 * brought online again it will need to run secondary_startup().
210 void __cpuexit cpu_die(void)
215 complete(&cpu_killed);
217 asm ("XOR TXENABLE, D0Re0,D0Re0\n");
219 #endif /* CONFIG_HOTPLUG_CPU */
222 * Called by both boot and secondaries to move global data into
223 * per-processor storage.
225 void __cpuinit smp_store_cpu_info(unsigned int cpuid)
227 struct cpuinfo_metag *cpu_info = &per_cpu(cpu_data, cpuid);
229 cpu_info->loops_per_jiffy = loops_per_jiffy;
233 * This is the secondary CPU boot entry. We're using this CPUs
234 * idle thread stack and the global page tables.
236 asmlinkage void secondary_start_kernel(void)
238 struct mm_struct *mm = &init_mm;
239 unsigned int cpu = smp_processor_id();
242 * All kernel threads share the same mm context; grab a
243 * reference and switch to it.
245 atomic_inc(&mm->mm_users);
246 atomic_inc(&mm->mm_count);
247 current->active_mm = mm;
248 cpumask_set_cpu(cpu, mm_cpumask(mm));
249 enter_lazy_tlb(mm, current);
250 local_flush_tlb_all();
253 * TODO: Some day it might be useful for each Linux CPU to
254 * have its own TBI structure. That would allow each Linux CPU
255 * to run different interrupt handlers for the same IRQ
258 * For now, simply copying the pointer to the boot CPU's TBI
259 * structure is sufficient because we always want to run the
260 * same interrupt handler whatever CPU takes the interrupt.
262 per_cpu(pTBI, cpu) = __TBI(TBID_ISTAT_BIT);
264 if (!per_cpu(pTBI, cpu))
265 panic("No TBI found!");
267 per_cpu_trap_init(cpu);
274 * Enable local interrupts.
276 tbi_startup_interrupt(TBID_SIGNUM_TRT);
277 notify_cpu_starting(cpu);
280 pr_info("CPU%u (thread %u): Booted secondary processor\n",
281 cpu, cpu_2_hwthread_id[cpu]);
284 smp_store_cpu_info(cpu);
287 * OK, now it's safe to let the boot CPU continue
289 set_cpu_online(cpu, true);
292 * Check for cache aliasing.
293 * Preemption is disabled
295 check_for_cache_aliasing(cpu);
298 * OK, it's off to the idle thread for us
303 void __init smp_cpus_done(unsigned int max_cpus)
306 unsigned long bogosum = 0;
308 for_each_online_cpu(cpu)
309 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
311 pr_info("SMP: Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
313 bogosum / (500000/HZ),
314 (bogosum / (5000/HZ)) % 100);
317 void __init smp_prepare_cpus(unsigned int max_cpus)
319 unsigned int cpu = smp_processor_id();
321 init_new_context(current, &init_mm);
322 current_thread_info()->cpu = cpu;
324 smp_store_cpu_info(cpu);
325 init_cpu_present(cpu_possible_mask);
328 void __init smp_prepare_boot_cpu(void)
330 unsigned int cpu = smp_processor_id();
332 per_cpu(pTBI, cpu) = __TBI(TBID_ISTAT_BIT);
334 if (!per_cpu(pTBI, cpu))
335 panic("No TBI found!");
338 static void smp_cross_call(cpumask_t callmap, enum ipi_msg_type msg);
340 static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg)
347 local_irq_save(flags);
349 for_each_cpu(cpu, mask) {
350 struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
352 spin_lock(&ipi->lock);
355 * KICK interrupts are queued in hardware so we'll get
356 * multiple interrupts if we call smp_cross_call()
357 * multiple times for one msg. The problem is that we
358 * only have one bit for each message - we can't queue
361 * The first time through ipi_handler() we'll clear
362 * the msg bit, having done all the work. But when we
363 * return we'll get _another_ interrupt (and another,
364 * and another until we've handled all the queued
365 * KICKs). Running ipi_handler() when there's no work
366 * to do is bad because that's how kick handler
367 * chaining detects who the KICK was intended for.
368 * See arch/metag/kernel/kick.c for more details.
370 * So only add 'cpu' to 'map' if we haven't already
371 * queued a KICK interrupt for 'msg'.
373 if (!(ipi->bits & (1 << msg))) {
374 ipi->bits |= 1 << msg;
375 cpumask_set_cpu(cpu, &map);
378 spin_unlock(&ipi->lock);
382 * Call the platform specific cross-CPU call function.
384 smp_cross_call(map, msg);
386 local_irq_restore(flags);
389 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
391 send_ipi_message(mask, IPI_CALL_FUNC);
394 void arch_send_call_function_single_ipi(int cpu)
396 send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
399 void show_ipi_list(struct seq_file *p)
405 for_each_present_cpu(cpu)
406 seq_printf(p, " %10lu", per_cpu(ipi_data, cpu).ipi_count);
411 static DEFINE_SPINLOCK(stop_lock);
414 * Main handler for inter-processor interrupts
416 * For Meta, the ipimask now only identifies a single
417 * category of IPI (Bit 1 IPIs have been replaced by a
418 * different mechanism):
420 * Bit 0 - Inter-processor function call
422 static int do_IPI(struct pt_regs *regs)
424 unsigned int cpu = smp_processor_id();
425 struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
426 struct pt_regs *old_regs = set_irq_regs(regs);
427 unsigned long msgs, nextmsg;
432 spin_lock(&ipi->lock);
434 nextmsg = msgs & -msgs;
435 ipi->bits &= ~nextmsg;
436 spin_unlock(&ipi->lock);
441 nextmsg = ffz(~nextmsg);
448 generic_smp_call_function_interrupt();
451 case IPI_CALL_FUNC_SINGLE:
452 generic_smp_call_function_single_interrupt();
456 pr_crit("CPU%u: Unknown IPI message 0x%lx\n",
462 set_irq_regs(old_regs);
467 void smp_send_reschedule(int cpu)
469 send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
472 static void stop_this_cpu(void *data)
474 unsigned int cpu = smp_processor_id();
476 if (system_state == SYSTEM_BOOTING ||
477 system_state == SYSTEM_RUNNING) {
478 spin_lock(&stop_lock);
479 pr_crit("CPU%u: stopping\n", cpu);
481 spin_unlock(&stop_lock);
484 set_cpu_online(cpu, false);
488 hard_processor_halt(HALT_OK);
491 void smp_send_stop(void)
493 smp_call_function(stop_this_cpu, NULL, 0);
499 int setup_profiling_timer(unsigned int multiplier)
505 * We use KICKs for inter-processor interrupts.
507 * For every CPU in "callmap" the IPI data must already have been
508 * stored in that CPU's "ipi_data" member prior to calling this
511 static void kick_raise_softirq(cpumask_t callmap, unsigned int irq)
515 for_each_cpu(cpu, &callmap) {
518 thread = cpu_2_hwthread_id[cpu];
520 BUG_ON(thread == BAD_HWTHREAD_ID);
522 metag_out32(1, T0KICKI + (thread * TnXKICK_STRIDE));
526 static TBIRES ipi_handler(TBIRES State, int SigNum, int Triggers,
527 int Inst, PTBI pTBI, int *handled)
529 *handled = do_IPI((struct pt_regs *)State.Sig.pCtx);
534 static struct kick_irq_handler ipi_irq = {
538 static void smp_cross_call(cpumask_t callmap, enum ipi_msg_type msg)
540 kick_raise_softirq(callmap, 1);
543 static inline unsigned int get_core_count(void)
546 unsigned int ret = 0;
548 for (i = 0; i < CONFIG_NR_CPUS; i++) {
549 if (core_reg_read(TXUCT_ID, TXENABLE_REGNUM, i))
557 * Initialise the CPU possible map early - this describes the CPUs
558 * which may be present or become present in the system.
560 void __init smp_init_cpus(void)
562 unsigned int i, ncores = get_core_count();
564 /* If no hwthread_map early param was set use default mapping */
565 for (i = 0; i < NR_CPUS; i++)
566 if (cpu_2_hwthread_id[i] == BAD_HWTHREAD_ID) {
567 cpu_2_hwthread_id[i] = i;
568 hwthread_id_2_cpu[i] = i;
571 for (i = 0; i < ncores; i++)
572 set_cpu_possible(i, true);
574 kick_register_func(&ipi_irq);