1 /***************************************************************************/
4 * linux/arch/m68knommu/platform/523x/config.c
6 * Sub-architcture dependant initialization code for the Freescale
9 * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
10 * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
13 /***************************************************************************/
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/init.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <asm/machdep.h>
22 #include <asm/coldfire.h>
23 #include <asm/mcfsim.h>
24 #include <asm/mcfuart.h>
25 #include <asm/mcfqspi.h>
27 /***************************************************************************/
29 static struct mcf_platform_uart m523x_uart_platform[] = {
31 .mapbase = MCFUART_BASE1,
32 .irq = MCFINT_VECBASE + MCFINT_UART0,
35 .mapbase = MCFUART_BASE2,
36 .irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
39 .mapbase = MCFUART_BASE3,
40 .irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
45 static struct platform_device m523x_uart = {
48 .dev.platform_data = m523x_uart_platform,
51 static struct resource m523x_fec_resources[] = {
54 .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
55 .flags = IORESOURCE_MEM,
60 .flags = IORESOURCE_IRQ,
65 .flags = IORESOURCE_IRQ,
70 .flags = IORESOURCE_IRQ,
74 static struct platform_device m523x_fec = {
77 .num_resources = ARRAY_SIZE(m523x_fec_resources),
78 .resource = m523x_fec_resources,
81 #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
82 static struct resource m523x_qspi_resources[] = {
84 .start = MCFQSPI_IOBASE,
85 .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
86 .flags = IORESOURCE_MEM,
89 .start = MCFINT_VECBASE + MCFINT_QSPI,
90 .end = MCFINT_VECBASE + MCFINT_QSPI,
91 .flags = IORESOURCE_IRQ,
95 #define MCFQSPI_CS0 91
96 #define MCFQSPI_CS1 92
97 #define MCFQSPI_CS2 103
98 #define MCFQSPI_CS3 99
100 static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control)
104 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
106 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
109 status = gpio_direction_output(MCFQSPI_CS0, 1);
111 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
115 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
117 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
120 status = gpio_direction_output(MCFQSPI_CS1, 1);
122 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
126 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
128 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
131 status = gpio_direction_output(MCFQSPI_CS2, 1);
133 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
137 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
139 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
142 status = gpio_direction_output(MCFQSPI_CS3, 1);
144 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
151 gpio_free(MCFQSPI_CS3);
153 gpio_free(MCFQSPI_CS2);
155 gpio_free(MCFQSPI_CS1);
157 gpio_free(MCFQSPI_CS0);
162 static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control)
164 gpio_free(MCFQSPI_CS3);
165 gpio_free(MCFQSPI_CS2);
166 gpio_free(MCFQSPI_CS1);
167 gpio_free(MCFQSPI_CS0);
170 static void m523x_cs_select(struct mcfqspi_cs_control *cs_control,
171 u8 chip_select, bool cs_high)
173 switch (chip_select) {
175 gpio_set_value(MCFQSPI_CS0, cs_high);
178 gpio_set_value(MCFQSPI_CS1, cs_high);
181 gpio_set_value(MCFQSPI_CS2, cs_high);
184 gpio_set_value(MCFQSPI_CS3, cs_high);
189 static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control,
190 u8 chip_select, bool cs_high)
192 switch (chip_select) {
194 gpio_set_value(MCFQSPI_CS0, !cs_high);
197 gpio_set_value(MCFQSPI_CS1, !cs_high);
200 gpio_set_value(MCFQSPI_CS2, !cs_high);
203 gpio_set_value(MCFQSPI_CS3, !cs_high);
208 static struct mcfqspi_cs_control m523x_cs_control = {
209 .setup = m523x_cs_setup,
210 .teardown = m523x_cs_teardown,
211 .select = m523x_cs_select,
212 .deselect = m523x_cs_deselect,
215 static struct mcfqspi_platform_data m523x_qspi_data = {
218 .cs_control = &m523x_cs_control,
221 static struct platform_device m523x_qspi = {
224 .num_resources = ARRAY_SIZE(m523x_qspi_resources),
225 .resource = m523x_qspi_resources,
226 .dev.platform_data = &m523x_qspi_data,
229 static void __init m523x_qspi_init(void)
233 /* setup QSPS pins for QSPI with gpio CS control */
234 writeb(0x1f, MCFGPIO_PAR_QSPI);
235 /* and CS2 & CS3 as gpio */
236 par = readw(MCFGPIO_PAR_TIMER);
238 writew(par, MCFGPIO_PAR_TIMER);
240 #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
242 static struct platform_device *m523x_devices[] __initdata = {
245 #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
250 /***************************************************************************/
252 static void __init m523x_fec_init(void)
257 /* Set multi-function pins to ethernet use */
258 par = readw(MCF_IPSBAR + 0x100082);
259 writew(par | 0xf00, MCF_IPSBAR + 0x100082);
260 v = readb(MCF_IPSBAR + 0x100078);
261 writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
264 /***************************************************************************/
266 static void m523x_cpu_reset(void)
269 __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
272 /***************************************************************************/
274 void __init config_BSP(char *commandp, int size)
276 mach_reset = m523x_cpu_reset;
279 /***************************************************************************/
281 static int __init init_BSP(void)
284 #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
287 platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
291 arch_initcall(init_BSP);
293 /***************************************************************************/