4 #include <linux/linkage.h>
5 #include <linux/kernel.h>
6 #include <linux/irqflags.h>
7 #include <asm/segment.h>
13 * switch_to(n) should switch tasks to task ptr, first checking that
14 * ptr isn't the current task, in which case it does nothing. This
15 * also clears the TS-flag if the task we switched to has used the
16 * math co-processor latest.
19 * switch_to() saves the extra registers, that are not saved
20 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
21 * a0-a1. Some of these are used by schedule() and its predecessors
22 * and so we might get see unexpected behaviors when a task returns
23 * with unexpected register values.
25 * syscall stores these registers itself and none of them are used
26 * by syscall after the function in the syscall has been called.
28 * Beware that resume now expects *next to be in d1 and the offset of
29 * tss to be in a1. This saves a few instructions as we no longer have
30 * to push them onto the stack and read them back right after.
32 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
34 * Changed 96/09/19 by Andreas Schwab
35 * pass prev in a0, next in a1
37 asmlinkage void resume(void);
38 #define switch_to(prev,next,last) do { \
39 register void *_prev __asm__ ("a0") = (prev); \
40 register void *_next __asm__ ("a1") = (next); \
41 register void *_last __asm__ ("d1"); \
42 __asm__ __volatile__("jbsr resume" \
43 : "=a" (_prev), "=a" (_next), "=d" (_last) \
44 : "0" (_prev), "1" (_next) \
45 : "d0", "d2", "d3", "d4", "d5"); \
51 * Force strict CPU ordering.
52 * Not really required on m68k...
54 #define nop() do { asm volatile ("nop"); barrier(); } while (0)
55 #define mb() barrier()
56 #define rmb() barrier()
57 #define wmb() barrier()
58 #define read_barrier_depends() ((void)0)
59 #define set_mb(var, value) ({ (var) = (value); wmb(); })
61 #define smp_mb() barrier()
62 #define smp_rmb() barrier()
63 #define smp_wmb() barrier()
64 #define smp_read_barrier_depends() ((void)0)
66 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
68 struct __xchg_dummy { unsigned long a[100]; };
69 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
71 #ifndef CONFIG_RMW_INSNS
72 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
74 unsigned long flags, tmp;
76 local_irq_save(flags);
98 local_irq_restore(flags);
102 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
111 : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
119 : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
127 : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
134 #include <asm-generic/cmpxchg-local.h>
136 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
139 * Atomic compare and exchange. Compare OLD with MEM, if identical,
140 * store NEW in MEM. Return the initial value in MEM. Success is
141 * indicated by comparing RETURN with OLD.
143 #ifdef CONFIG_RMW_INSNS
144 #define __HAVE_ARCH_CMPXCHG 1
146 static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
147 unsigned long new, int size)
151 __asm__ __volatile__ ("casb %0,%2,%1"
152 : "=d" (old), "=m" (*(char *)p)
153 : "d" (new), "0" (old), "m" (*(char *)p));
156 __asm__ __volatile__ ("casw %0,%2,%1"
157 : "=d" (old), "=m" (*(short *)p)
158 : "d" (new), "0" (old), "m" (*(short *)p));
161 __asm__ __volatile__ ("casl %0,%2,%1"
162 : "=d" (old), "=m" (*(int *)p)
163 : "d" (new), "0" (old), "m" (*(int *)p));
169 #define cmpxchg(ptr, o, n) \
170 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
171 (unsigned long)(n), sizeof(*(ptr))))
172 #define cmpxchg_local(ptr, o, n) \
173 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
174 (unsigned long)(n), sizeof(*(ptr))))
178 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
181 #define cmpxchg_local(ptr, o, n) \
182 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
183 (unsigned long)(n), sizeof(*(ptr))))
185 #include <asm-generic/cmpxchg.h>
189 #define arch_align_stack(x) (x)
191 #endif /* __KERNEL__ */
193 #endif /* _M68K_SYSTEM_H */