2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2008 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <linux/rculist.h>
15 #include <linux/slab.h>
16 #include <asm/sn/addrs.h>
17 #include <asm/sn/arch.h>
18 #include <asm/sn/intr.h>
19 #include <asm/sn/pcibr_provider.h>
20 #include <asm/sn/pcibus_provider_defs.h>
21 #include <asm/sn/pcidev.h>
22 #include <asm/sn/shub_mmr.h>
23 #include <asm/sn/sn_sal.h>
24 #include <asm/sn/sn_feature_sets.h>
26 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
27 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
29 extern int sn_ioif_inited;
30 struct list_head **sn_irq_lh;
31 static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
33 u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
34 struct sn_irq_info *sn_irq_info,
35 int req_irq, nasid_t req_nasid,
38 struct ia64_sal_retval ret_stuff;
42 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
43 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
44 (u64) local_widget, __pa(sn_irq_info), (u64) req_irq,
45 (u64) req_nasid, (u64) req_slice);
47 return ret_stuff.status;
50 void sn_intr_free(nasid_t local_nasid, int local_widget,
51 struct sn_irq_info *sn_irq_info)
53 struct ia64_sal_retval ret_stuff;
57 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
58 (u64) SAL_INTR_FREE, (u64) local_nasid,
59 (u64) local_widget, (u64) sn_irq_info->irq_irq,
60 (u64) sn_irq_info->irq_cookie, 0, 0);
63 u64 sn_intr_redirect(nasid_t local_nasid, int local_widget,
64 struct sn_irq_info *sn_irq_info,
65 nasid_t req_nasid, int req_slice)
67 struct ia64_sal_retval ret_stuff;
71 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
72 (u64) SAL_INTR_REDIRECT, (u64) local_nasid,
73 (u64) local_widget, __pa(sn_irq_info),
74 (u64) req_nasid, (u64) req_slice, 0);
76 return ret_stuff.status;
79 static unsigned int sn_startup_irq(struct irq_data *data)
84 static void sn_shutdown_irq(struct irq_data *data)
88 extern void ia64_mca_register_cpev(int);
90 static void sn_disable_irq(struct irq_data *data)
92 if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR))
93 ia64_mca_register_cpev(0);
96 static void sn_enable_irq(struct irq_data *data)
98 if (data->irq == local_vector_to_irq(IA64_CPE_VECTOR))
99 ia64_mca_register_cpev(data->irq);
102 static void sn_ack_irq(struct irq_data *data)
104 u64 event_occurred, mask;
105 unsigned int irq = data->irq & 0xff;
107 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
108 mask = event_occurred & SH_ALL_INT_MASK;
109 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
110 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
115 struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
116 nasid_t nasid, int slice)
124 int local_widget, status;
126 struct sn_irq_info *new_irq_info;
127 struct sn_pcibus_provider *pci_provider;
129 bridge = (u64) sn_irq_info->irq_bridge;
131 return NULL; /* irq is not a device interrupt */
134 local_nasid = NASID_GET(bridge);
137 local_widget = TIO_SWIN_WIDGETNUM(bridge);
139 local_widget = SWIN_WIDGETNUM(bridge);
140 vector = sn_irq_info->irq_irq;
142 /* Make use of SAL_INTR_REDIRECT if PROM supports it */
143 status = sn_intr_redirect(local_nasid, local_widget, sn_irq_info, nasid, slice);
145 new_irq_info = sn_irq_info;
150 * PROM does not support SAL_INTR_REDIRECT, or it failed.
151 * Revert to old method.
153 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
154 if (new_irq_info == NULL)
157 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
159 /* Free the old PROM new_irq_info structure */
160 sn_intr_free(local_nasid, local_widget, new_irq_info);
161 unregister_intr_pda(new_irq_info);
163 /* allocate a new PROM new_irq_info struct */
164 status = sn_intr_alloc(local_nasid, local_widget,
165 new_irq_info, vector,
168 /* SAL call failed */
174 register_intr_pda(new_irq_info);
175 spin_lock(&sn_irq_info_lock);
176 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
177 spin_unlock(&sn_irq_info_lock);
178 kfree_rcu(sn_irq_info, rcu);
182 /* Update kernels new_irq_info with new target info */
183 cpuid = nasid_slice_to_cpuid(new_irq_info->irq_nasid,
184 new_irq_info->irq_slice);
185 new_irq_info->irq_cpuid = cpuid;
187 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
190 * If this represents a line interrupt, target it. If it's
191 * an msi (irq_int_bit < 0), it's already targeted.
193 if (new_irq_info->irq_int_bit >= 0 &&
194 pci_provider && pci_provider->target_interrupt)
195 (pci_provider->target_interrupt)(new_irq_info);
198 cpuphys = cpu_physical_id(cpuid);
199 set_irq_affinity_info((vector & 0xff), cpuphys, 0);
205 static int sn_set_affinity_irq(struct irq_data *data,
206 const struct cpumask *mask, bool force)
208 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
209 unsigned int irq = data->irq;
213 nasid = cpuid_to_nasid(cpumask_first(mask));
214 slice = cpuid_to_slice(cpumask_first(mask));
216 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
217 sn_irq_lh[irq], list)
218 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
224 void sn_set_err_irq_affinity(unsigned int irq)
227 * On systems which support CPU disabling (SHub2), all error interrupts
228 * are targeted at the boot CPU.
230 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT))
231 set_irq_affinity_info(irq, cpu_physical_id(0), 0);
234 void sn_set_err_irq_affinity(unsigned int irq) { }
238 sn_mask_irq(struct irq_data *data)
243 sn_unmask_irq(struct irq_data *data)
247 struct irq_chip irq_type_sn = {
249 .irq_startup = sn_startup_irq,
250 .irq_shutdown = sn_shutdown_irq,
251 .irq_enable = sn_enable_irq,
252 .irq_disable = sn_disable_irq,
253 .irq_ack = sn_ack_irq,
254 .irq_mask = sn_mask_irq,
255 .irq_unmask = sn_unmask_irq,
256 .irq_set_affinity = sn_set_affinity_irq
259 ia64_vector sn_irq_to_vector(int irq)
261 if (irq >= IA64_NUM_VECTORS)
263 return (ia64_vector)irq;
266 unsigned int sn_local_vector_to_irq(u8 vector)
268 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
271 void sn_irq_init(void)
275 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
276 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
278 for (i = 0; i < NR_IRQS; i++) {
279 if (irq_get_chip(i) == &no_irq_chip)
280 irq_set_chip(i, &irq_type_sn);
284 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
286 int irq = sn_irq_info->irq_irq;
287 int cpu = sn_irq_info->irq_cpuid;
289 if (pdacpu(cpu)->sn_last_irq < irq) {
290 pdacpu(cpu)->sn_last_irq = irq;
293 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
294 pdacpu(cpu)->sn_first_irq = irq;
297 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
299 int irq = sn_irq_info->irq_irq;
300 int cpu = sn_irq_info->irq_cpuid;
301 struct sn_irq_info *tmp_irq_info;
305 if (pdacpu(cpu)->sn_last_irq == irq) {
307 for (i = pdacpu(cpu)->sn_last_irq - 1;
308 i && !foundmatch; i--) {
309 list_for_each_entry_rcu(tmp_irq_info,
312 if (tmp_irq_info->irq_cpuid == cpu) {
318 pdacpu(cpu)->sn_last_irq = i;
321 if (pdacpu(cpu)->sn_first_irq == irq) {
323 for (i = pdacpu(cpu)->sn_first_irq + 1;
324 i < NR_IRQS && !foundmatch; i++) {
325 list_for_each_entry_rcu(tmp_irq_info,
328 if (tmp_irq_info->irq_cpuid == cpu) {
334 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
339 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
341 nasid_t nasid = sn_irq_info->irq_nasid;
342 int slice = sn_irq_info->irq_slice;
343 int cpu = nasid_slice_to_cpuid(nasid, slice);
348 pci_dev_get(pci_dev);
349 sn_irq_info->irq_cpuid = cpu;
350 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
352 /* link it into the sn_irq[irq] list */
353 spin_lock(&sn_irq_info_lock);
354 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
355 reserve_irq_vector(sn_irq_info->irq_irq);
356 spin_unlock(&sn_irq_info_lock);
358 register_intr_pda(sn_irq_info);
360 cpuphys = cpu_physical_id(cpu);
361 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
363 * Affinity was set by the PROM, prevent it from
364 * being reset by the request_irq() path.
366 irqd_mark_affinity_was_set(irq_get_irq_data(sn_irq_info->irq_irq));
370 void sn_irq_unfixup(struct pci_dev *pci_dev)
372 struct sn_irq_info *sn_irq_info;
374 /* Only cleanup IRQ stuff if this device has a host bus context */
375 if (!SN_PCIDEV_BUSSOFT(pci_dev))
378 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
381 if (!sn_irq_info->irq_irq) {
386 unregister_intr_pda(sn_irq_info);
387 spin_lock(&sn_irq_info_lock);
388 list_del_rcu(&sn_irq_info->list);
389 spin_unlock(&sn_irq_info_lock);
390 if (list_empty(sn_irq_lh[sn_irq_info->irq_irq]))
391 free_irq_vector(sn_irq_info->irq_irq);
392 kfree_rcu(sn_irq_info, rcu);
393 pci_dev_put(pci_dev);
398 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
400 struct sn_pcibus_provider *pci_provider;
402 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
404 /* Don't force an interrupt if the irq has been disabled */
405 if (!irqd_irq_disabled(irq_get_irq_data(sn_irq_info->irq_irq)) &&
406 pci_provider && pci_provider->force_interrupt)
407 (*pci_provider->force_interrupt)(sn_irq_info);
411 * Check for lost interrupts. If the PIC int_status reg. says that
412 * an interrupt has been sent, but not handled, and the interrupt
413 * is not pending in either the cpu irr regs or in the soft irr regs,
414 * and the interrupt is not in service, then the interrupt may have
415 * been lost. Force an interrupt on that pin. It is possible that
416 * the interrupt is in flight, so we may generate a spurious interrupt,
417 * but we should never miss a real lost interrupt.
419 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
422 struct pcidev_info *pcidev_info;
423 struct pcibus_info *pcibus_info;
426 * Bridge types attached to TIO (anything but PIC) do not need this WAR
427 * since they do not target Shub II interrupt registers. If that
428 * ever changes, this check needs to accommodate.
430 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
433 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
438 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
440 regval = pcireg_intr_status_get(pcibus_info);
442 if (!ia64_get_irr(irq_to_vector(irq))) {
443 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
445 if (sn_irq_info->irq_int_bit & regval &
446 sn_irq_info->irq_last_intr) {
447 regval &= ~(sn_irq_info->irq_int_bit & regval);
448 sn_call_force_intr_provider(sn_irq_info);
452 sn_irq_info->irq_last_intr = regval;
455 void sn_lb_int_war_check(void)
457 struct sn_irq_info *sn_irq_info;
460 if (!sn_ioif_inited || pda->sn_first_irq == 0)
464 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
465 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
466 sn_check_intr(i, sn_irq_info);
472 void __init sn_irq_lh_init(void)
476 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
478 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
480 for (i = 0; i < NR_IRQS; i++) {
481 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
483 panic("SN PCI INIT: Failed IRQ memory allocation\n");
485 INIT_LIST_HEAD(sn_irq_lh[i]);