arch/ia64/kernel/mca.c

   1 /*
   2  * File:        mca.c
   3  * Purpose:     Generic MCA handling layer
   4  *
   5  * Updated for latest kernel
   6  * Copyright (C) 2003 Hewlett-Packard Co
   7  *      David Mosberger-Tang <davidm@hpl.hp.com>
   8  *
   9  * Copyright (C) 2002 Dell Inc.
  10  * Copyright (C) Matt Domsch (Matt_Domsch@dell.com)
  11  *
  12  * Copyright (C) 2002 Intel
  13  * Copyright (C) Jenna Hall (jenna.s.hall@intel.com)
  14  *
  15  * Copyright (C) 2001 Intel
  16  * Copyright (C) Fred Lewis (frederick.v.lewis@intel.com)
  17  *
  18  * Copyright (C) 2000 Intel
  19  * Copyright (C) Chuck Fleckenstein (cfleck@co.intel.com)
  20  *
  21  * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
  22  * Copyright (C) Vijay Chander(vijay@engr.sgi.com)
  23  *
  24  * 03/04/15 D. Mosberger Added INIT backtrace support.
  25  * 02/03/25 M. Domsch   GUID cleanups
  26  *
  27  * 02/01/04 J. Hall     Aligned MCA stack to 16 bytes, added platform vs. CPU
  28  *                      error flag, set SAL default return values, changed
  29  *                      error record structure to linked list, added init call
  30  *                      to sal_get_state_info_size().
  31  *
  32  * 01/01/03 F. Lewis    Added setup of CMCI and CPEI IRQs, logging of corrected
  33  *                      platform errors, completed code for logging of
  34  *                      corrected & uncorrected machine check errors, and
  35  *                      updated for conformance with Nov. 2000 revision of the
  36  *                      SAL 3.0 spec.
  37  * 00/03/29 C. Fleckenstein  Fixed PAL/SAL update issues, began MCA bug fixes, logging issues,
  38  *                           added min save state dump, added INIT handler.
  39  *
  40  * 2003-12-08 Keith Owens <kaos@sgi.com>
  41  *            smp_call_function() must not be called from interrupt context (can
  42  *            deadlock on tasklist_lock).  Use keventd to call smp_call_function().
  43  *
  44  * 2004-02-01 Keith Owens <kaos@sgi.com>
  45  *            Avoid deadlock when using printk() for MCA and INIT records.
  46  *            Delete all record printing code, moved to salinfo_decode in user space.
  47  *            Mark variables and functions static where possible.
  48  *            Delete dead variables and functions.
  49  *            Reorder to remove the need for forward declarations and to consolidate
  50  *            related code.
  51  *
  52  * 2005-08-12 Keith Owens <kaos@sgi.com>
  53  *            Convert MCA/INIT handlers to use per event stacks and SAL/OS state.
  54  *
  55  * 2005-10-07 Keith Owens <kaos@sgi.com>
  56  *            Add notify_die() hooks.
  57  *
  58  * 2006-09-15 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
  59  *            Add printing support for MCA/INIT.
  60  */
  61 #include <linux/types.h>
  62 #include <linux/init.h>
  63 #include <linux/sched.h>
  64 #include <linux/interrupt.h>
  65 #include <linux/irq.h>
  66 #include <linux/smp_lock.h>
  67 #include <linux/bootmem.h>
  68 #include <linux/acpi.h>
  69 #include <linux/timer.h>
  70 #include <linux/module.h>
  71 #include <linux/kernel.h>
  72 #include <linux/smp.h>
  73 #include <linux/workqueue.h>
  74 #include <linux/cpumask.h>
  75
  76 #include <asm/delay.h>
  77 #include <asm/kdebug.h>
  78 #include <asm/machvec.h>
  79 #include <asm/meminit.h>
  80 #include <asm/page.h>
  81 #include <asm/ptrace.h>
  82 #include <asm/system.h>
  83 #include <asm/sal.h>
  84 #include <asm/mca.h>
  85
  86 #include <asm/irq.h>
  87 #include <asm/hw_irq.h>
  88
  89 #include "mca_drv.h"
  90 #include "entry.h"
  91
  92 #if defined(IA64_MCA_DEBUG_INFO)
  93 # define IA64_MCA_DEBUG(fmt...) printk(fmt)
  94 #else
  95 # define IA64_MCA_DEBUG(fmt...)
  96 #endif
  97
  98 /* Used by mca_asm.S */
  99 u32                             ia64_mca_serialize;
 100 DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */
 101 DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
 102 DEFINE_PER_CPU(u64, ia64_mca_pal_pte);      /* PTE to map PAL code */
 103 DEFINE_PER_CPU(u64, ia64_mca_pal_base);    /* vaddr PAL code granule */
 104
 105 unsigned long __per_cpu_mca[NR_CPUS];
 106
 107 /* In mca_asm.S */
 108 extern void                     ia64_os_init_dispatch_monarch (void);
 109 extern void                     ia64_os_init_dispatch_slave (void);
 110
 111 static int monarch_cpu = -1;
 112
 113 static ia64_mc_info_t           ia64_mc_info;
 114
 115 #define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
 116 #define MIN_CPE_POLL_INTERVAL (2*60*HZ)  /* 2 minutes */
 117 #define CMC_POLL_INTERVAL     (1*60*HZ)  /* 1 minute */
 118 #define CPE_HISTORY_LENGTH    5
 119 #define CMC_HISTORY_LENGTH    5
 120
 121 static struct timer_list cpe_poll_timer;
 122 static struct timer_list cmc_poll_timer;
 123 /*
 124  * This variable tells whether we are currently in polling mode.
 125  * Start with this in the wrong state so we won't play w/ timers
 126  * before the system is ready.
 127  */
 128 static int cmc_polling_enabled = 1;
 129
 130 /*
 131  * Clearing this variable prevents CPE polling from getting activated
 132  * in mca_late_init.  Use it if your system doesn't provide a CPEI,
 133  * but encounters problems retrieving CPE logs.  This should only be
 134  * necessary for debugging.
 135  */
 136 static int cpe_poll_enabled = 1;
 137
 138 extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
 139
 140 static int mca_init __initdata;
 141
 142 /*
 143  * limited & delayed printing support for MCA/INIT handler
 144  */
 145
 146 #define mprintk(fmt...) ia64_mca_printk(fmt)
 147
 148 #define MLOGBUF_SIZE (512+256*NR_CPUS)
 149 #define MLOGBUF_MSGMAX 256
 150 static char mlogbuf[MLOGBUF_SIZE];
 151 static DEFINE_SPINLOCK(mlogbuf_wlock);  /* mca context only */
 152 static DEFINE_SPINLOCK(mlogbuf_rlock);  /* normal context only */
 153 static unsigned long mlogbuf_start;
 154 static unsigned long mlogbuf_end;
 155 static unsigned int mlogbuf_finished = 0;
 156 static unsigned long mlogbuf_timestamp = 0;
 157
 158 static int loglevel_save = -1;
 159 #define BREAK_LOGLEVEL(__console_loglevel)              \
 160         oops_in_progress = 1;                           \
 161         if (loglevel_save < 0)                          \
 162                 loglevel_save = __console_loglevel;     \
 163         __console_loglevel = 15;
 164
 165 #define RESTORE_LOGLEVEL(__console_loglevel)            \
 166         if (loglevel_save >= 0) {                       \
 167                 __console_loglevel = loglevel_save;     \
 168                 loglevel_save = -1;                     \
 169         }                                               \
 170         mlogbuf_finished = 0;                           \
 171         oops_in_progress = 0;
 172
 173 /*
 174  * Push messages into buffer, print them later if not urgent.
 175  */
 176 void ia64_mca_printk(const char *fmt, ...)
 177 {
 178         va_list args;
 179         int printed_len;
 180         char temp_buf[MLOGBUF_MSGMAX];
 181         char *p;
 182
 183         va_start(args, fmt);
 184         printed_len = vscnprintf(temp_buf, sizeof(temp_buf), fmt, args);
 185         va_end(args);
 186
 187         /* Copy the output into mlogbuf */
 188         if (oops_in_progress) {
 189                 /* mlogbuf was abandoned, use printk directly instead. */
 190                 printk(temp_buf);
 191         } else {
 192                 spin_lock(&mlogbuf_wlock);
 193                 for (p = temp_buf; *p; p++) {
 194                         unsigned long next = (mlogbuf_end + 1) % MLOGBUF_SIZE;
 195                         if (next != mlogbuf_start) {
 196                                 mlogbuf[mlogbuf_end] = *p;
 197                                 mlogbuf_end = next;
 198                         } else {
 199                                 /* buffer full */
 200                                 break;
 201                         }
 202                 }
 203                 mlogbuf[mlogbuf_end] = '\0';
 204                 spin_unlock(&mlogbuf_wlock);
 205         }
 206 }
 207 EXPORT_SYMBOL(ia64_mca_printk);
 208
 209 /*
 210  * Print buffered messages.
 211  *  NOTE: call this after returning normal context. (ex. from salinfod)
 212  */
 213 void ia64_mlogbuf_dump(void)
 214 {
 215         char temp_buf[MLOGBUF_MSGMAX];
 216         char *p;
 217         unsigned long index;
 218         unsigned long flags;
 219         unsigned int printed_len;
 220
 221         /* Get output from mlogbuf */
 222         while (mlogbuf_start != mlogbuf_end) {
 223                 temp_buf[0] = '\0';
 224                 p = temp_buf;
 225                 printed_len = 0;
 226
 227                 spin_lock_irqsave(&mlogbuf_rlock, flags);
 228
 229                 index = mlogbuf_start;
 230                 while (index != mlogbuf_end) {
 231                         *p = mlogbuf[index];
 232                         index = (index + 1) % MLOGBUF_SIZE;
 233                         if (!*p)
 234                                 break;
 235                         p++;
 236                         if (++printed_len >= MLOGBUF_MSGMAX - 1)
 237                                 break;
 238                 }
 239                 *p = '\0';
 240                 if (temp_buf[0])
 241                         printk(temp_buf);
 242                 mlogbuf_start = index;
 243
 244                 mlogbuf_timestamp = 0;
 245                 spin_unlock_irqrestore(&mlogbuf_rlock, flags);
 246         }
 247 }
 248 EXPORT_SYMBOL(ia64_mlogbuf_dump);
 249
 250 /*
 251  * Call this if system is going to down or if immediate flushing messages to
 252  * console is required. (ex. recovery was failed, crash dump is going to be
 253  * invoked, long-wait rendezvous etc.)
 254  *  NOTE: this should be called from monarch.
 255  */
 256 static void ia64_mlogbuf_finish(int wait)
 257 {
 258         BREAK_LOGLEVEL(console_loglevel);
 259
 260         spin_lock_init(&mlogbuf_rlock);
 261         ia64_mlogbuf_dump();
 262         printk(KERN_EMERG "mlogbuf_finish: printing switched to urgent mode, "
 263                 "MCA/INIT might be dodgy or fail.\n");
 264
 265         if (!wait)
 266                 return;
 267
 268         /* wait for console */
 269         printk("Delaying for 5 seconds...\n");
 270         udelay(5*1000000);
 271
 272         mlogbuf_finished = 1;
 273 }
 274 EXPORT_SYMBOL(ia64_mlogbuf_finish);
 275
 276 /*
 277  * Print buffered messages from INIT context.
 278  */
 279 static void ia64_mlogbuf_dump_from_init(void)
 280 {
 281         if (mlogbuf_finished)
 282                 return;
 283
 284         if (mlogbuf_timestamp && (mlogbuf_timestamp + 30*HZ > jiffies)) {
 285                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT "
 286                         " and the system seems to be messed up.\n");
 287                 ia64_mlogbuf_finish(0);
 288                 return;
 289         }
 290
 291         if (!spin_trylock(&mlogbuf_rlock)) {
 292                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT. "
 293                         "Generated messages other than stack dump will be "
 294                         "buffered to mlogbuf and will be printed later.\n");
 295                 printk(KERN_ERR "INIT: If messages would not printed after "
 296                         "this INIT, wait 30sec and assert INIT again.\n");
 297                 if (!mlogbuf_timestamp)
 298                         mlogbuf_timestamp = jiffies;
 299                 return;
 300         }
 301         spin_unlock(&mlogbuf_rlock);
 302         ia64_mlogbuf_dump();
 303 }
 304
 305 static void inline
 306 ia64_mca_spin(const char *func)
 307 {
 308         if (monarch_cpu == smp_processor_id())
 309                 ia64_mlogbuf_finish(0);
 310         mprintk(KERN_EMERG "%s: spinning here, not returning to SAL\n", func);
 311         while (1)
 312                 cpu_relax();
 313 }
 314 /*
 315  * IA64_MCA log support
 316  */
 317 #define IA64_MAX_LOGS           2       /* Double-buffering for nested MCAs */
 318 #define IA64_MAX_LOG_TYPES      4   /* MCA, INIT, CMC, CPE */
 319
 320 typedef struct ia64_state_log_s
 321 {
 322         spinlock_t      isl_lock;
 323         int             isl_index;
 324         unsigned long   isl_count;
 325         ia64_err_rec_t  *isl_log[IA64_MAX_LOGS]; /* need space to store header + error log */
 326 } ia64_state_log_t;
 327
 328 static ia64_state_log_t ia64_state_log[IA64_MAX_LOG_TYPES];
 329
 330 #define IA64_LOG_ALLOCATE(it, size) \
 331         {ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)] = \
 332                 (ia64_err_rec_t *)alloc_bootmem(size); \
 333         ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)] = \
 334                 (ia64_err_rec_t *)alloc_bootmem(size);}
 335 #define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock)
 336 #define IA64_LOG_LOCK(it)      spin_lock_irqsave(&ia64_state_log[it].isl_lock, s)
 337 #define IA64_LOG_UNLOCK(it)    spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s)
 338 #define IA64_LOG_NEXT_INDEX(it)    ia64_state_log[it].isl_index
 339 #define IA64_LOG_CURR_INDEX(it)    1 - ia64_state_log[it].isl_index
 340 #define IA64_LOG_INDEX_INC(it) \
 341     {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
 342     ia64_state_log[it].isl_count++;}
 343 #define IA64_LOG_INDEX_DEC(it) \
 344     ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
 345 #define IA64_LOG_NEXT_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
 346 #define IA64_LOG_CURR_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
 347 #define IA64_LOG_COUNT(it)         ia64_state_log[it].isl_count
 348
 349 /*
 350  * ia64_log_init
 351  *      Reset the OS ia64 log buffer
 352  * Inputs   :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
 353  * Outputs      :       None
 354  */
 355 static void __init
 356 ia64_log_init(int sal_info_type)
 357 {
 358         u64     max_size = 0;
 359
 360         IA64_LOG_NEXT_INDEX(sal_info_type) = 0;
 361         IA64_LOG_LOCK_INIT(sal_info_type);
 362
 363         // SAL will tell us the maximum size of any error record of this type
 364         max_size = ia64_sal_get_state_info_size(sal_info_type);
 365         if (!max_size)
 366                 /* alloc_bootmem() doesn't like zero-sized allocations! */
 367                 return;
 368
 369         // set up OS data structures to hold error info
 370         IA64_LOG_ALLOCATE(sal_info_type, max_size);
 371         memset(IA64_LOG_CURR_BUFFER(sal_info_type), 0, max_size);
 372         memset(IA64_LOG_NEXT_BUFFER(sal_info_type), 0, max_size);
 373 }
 374
 375 /*
 376  * ia64_log_get
 377  *
 378  *      Get the current MCA log from SAL and copy it into the OS log buffer.
 379  *
 380  *  Inputs  :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
 381  *              irq_safe    whether you can use printk at this point
 382  *  Outputs :   size        (total record length)
 383  *              *buffer     (ptr to error record)
 384  *
 385  */
 386 static u64
 387 ia64_log_get(int sal_info_type, u8 **buffer, int irq_safe)
 388 {
 389         sal_log_record_header_t     *log_buffer;
 390         u64                         total_len = 0;
 391         int                         s;
 392
 393         IA64_LOG_LOCK(sal_info_type);
 394
 395         /* Get the process state information */
 396         log_buffer = IA64_LOG_NEXT_BUFFER(sal_info_type);
 397
 398         total_len = ia64_sal_get_state_info(sal_info_type, (u64 *)log_buffer);
 399
 400         if (total_len) {
 401                 IA64_LOG_INDEX_INC(sal_info_type);
 402                 IA64_LOG_UNLOCK(sal_info_type);
 403                 if (irq_safe) {
 404                         IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. "
 405                                        "Record length = %ld\n", __FUNCTION__, sal_info_type, total_len);
 406                 }
 407                 *buffer = (u8 *) log_buffer;
 408                 return total_len;
 409         } else {
 410                 IA64_LOG_UNLOCK(sal_info_type);
 411                 return 0;
 412         }
 413 }
 414
 415 /*
 416  *  ia64_mca_log_sal_error_record
 417  *
 418  *  This function retrieves a specified error record type from SAL
 419  *  and wakes up any processes waiting for error records.
 420  *
 421  *  Inputs  :   sal_info_type   (Type of error record MCA/CMC/CPE)
 422  *              FIXME: remove MCA and irq_safe.
 423  */
 424 static void
 425 ia64_mca_log_sal_error_record(int sal_info_type)
 426 {
 427         u8 *buffer;
 428         sal_log_record_header_t *rh;
 429         u64 size;
 430         int irq_safe = sal_info_type != SAL_INFO_TYPE_MCA;
 431 #ifdef IA64_MCA_DEBUG_INFO
 432         static const char * const rec_name[] = { "MCA", "INIT", "CMC", "CPE" };
 433 #endif
 434
 435         size = ia64_log_get(sal_info_type, &buffer, irq_safe);
 436         if (!size)
 437                 return;
 438
 439         salinfo_log_wakeup(sal_info_type, buffer, size, irq_safe);
 440
 441         if (irq_safe)
 442                 IA64_MCA_DEBUG("CPU %d: SAL log contains %s error record\n",
 443                         smp_processor_id(),
 444                         sal_info_type < ARRAY_SIZE(rec_name) ? rec_name[sal_info_type] : "UNKNOWN");
 445
 446         /* Clear logs from corrected errors in case there's no user-level logger */
 447         rh = (sal_log_record_header_t *)buffer;
 448         if (rh->severity == sal_log_severity_corrected)
 449                 ia64_sal_clear_state_info(sal_info_type);
 450 }
 451
 452 /*
 453  * search_mca_table
 454  *  See if the MCA surfaced in an instruction range
 455  *  that has been tagged as recoverable.
 456  *
 457  *  Inputs
 458  *      first   First address range to check
 459  *      last    Last address range to check
 460  *      ip      Instruction pointer, address we are looking for
 461  *
 462  * Return value:
 463  *      1 on Success (in the table)/ 0 on Failure (not in the  table)
 464  */
 465 int
 466 search_mca_table (const struct mca_table_entry *first,
 467                 const struct mca_table_entry *last,
 468                 unsigned long ip)
 469 {
 470         const struct mca_table_entry *curr;
 471         u64 curr_start, curr_end;
 472
 473         curr = first;
 474         while (curr <= last) {
 475                 curr_start = (u64) &curr->start_addr + curr->start_addr;
 476                 curr_end = (u64) &curr->end_addr + curr->end_addr;
 477
 478                 if ((ip >= curr_start) && (ip <= curr_end)) {
 479                         return 1;
 480                 }
 481                 curr++;
 482         }
 483         return 0;
 484 }
 485
 486 /* Given an address, look for it in the mca tables. */
 487 int mca_recover_range(unsigned long addr)
 488 {
 489         extern struct mca_table_entry __start___mca_table[];
 490         extern struct mca_table_entry __stop___mca_table[];
 491
 492         return search_mca_table(__start___mca_table, __stop___mca_table-1, addr);
 493 }
 494 EXPORT_SYMBOL_GPL(mca_recover_range);
 495
 496 #ifdef CONFIG_ACPI
 497
 498 int cpe_vector = -1;
 499 int ia64_cpe_irq = -1;
 500
 501 static irqreturn_t
 502 ia64_mca_cpe_int_handler (int cpe_irq, void *arg, struct pt_regs *ptregs)
 503 {
 504         static unsigned long    cpe_history[CPE_HISTORY_LENGTH];
 505         static int              index;
 506         static DEFINE_SPINLOCK(cpe_history_lock);
 507
 508         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
 509                        __FUNCTION__, cpe_irq, smp_processor_id());
 510
 511         /* SAL spec states this should run w/ interrupts enabled */
 512         local_irq_enable();
 513
 514         /* Get the CPE error record and log it */
 515         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE);
 516
 517         spin_lock(&cpe_history_lock);
 518         if (!cpe_poll_enabled && cpe_vector >= 0) {
 519
 520                 int i, count = 1; /* we know 1 happened now */
 521                 unsigned long now = jiffies;
 522
 523                 for (i = 0; i < CPE_HISTORY_LENGTH; i++) {
 524                         if (now - cpe_history[i] <= HZ)
 525                                 count++;
 526                 }
 527
 528                 IA64_MCA_DEBUG(KERN_INFO "CPE threshold %d/%d\n", count, CPE_HISTORY_LENGTH);
 529                 if (count >= CPE_HISTORY_LENGTH) {
 530
 531                         cpe_poll_enabled = 1;
 532                         spin_unlock(&cpe_history_lock);
 533                         disable_irq_nosync(local_vector_to_irq(IA64_CPE_VECTOR));
 534
 535                         /*
 536                          * Corrected errors will still be corrected, but
 537                          * make sure there's a log somewhere that indicates
 538                          * something is generating more than we can handle.
 539                          */
 540                         printk(KERN_WARNING "WARNING: Switching to polling CPE handler; error records may be lost\n");
 541
 542                         mod_timer(&cpe_poll_timer, jiffies + MIN_CPE_POLL_INTERVAL);
 543
 544                         /* lock already released, get out now */
 545                         return IRQ_HANDLED;
 546                 } else {
 547                         cpe_history[index++] = now;
 548                         if (index == CPE_HISTORY_LENGTH)
 549                                 index = 0;
 550                 }
 551         }
 552         spin_unlock(&cpe_history_lock);
 553         return IRQ_HANDLED;
 554 }
 555
 556 #endif /* CONFIG_ACPI */
 557
 558 #ifdef CONFIG_ACPI
 559 /*
 560  * ia64_mca_register_cpev
 561  *
 562  *  Register the corrected platform error vector with SAL.
 563  *
 564  *  Inputs
 565  *      cpev        Corrected Platform Error Vector number
 566  *
 567  *  Outputs
 568  *      None
 569  */
 570 static void __init
 571 ia64_mca_register_cpev (int cpev)
 572 {
 573         /* Register the CPE interrupt vector with SAL */
 574         struct ia64_sal_retval isrv;
 575
 576         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT, SAL_MC_PARAM_MECHANISM_INT, cpev, 0, 0);
 577         if (isrv.status) {
 578                 printk(KERN_ERR "Failed to register Corrected Platform "
 579                        "Error interrupt vector with SAL (status %ld)\n", isrv.status);
 580                 return;
 581         }
 582
 583         IA64_MCA_DEBUG("%s: corrected platform error "
 584                        "vector %#x registered\n", __FUNCTION__, cpev);
 585 }
 586 #endif /* CONFIG_ACPI */
 587
 588 /*
 589  * ia64_mca_cmc_vector_setup
 590  *
 591  *  Setup the corrected machine check vector register in the processor.
 592  *  (The interrupt is masked on boot. ia64_mca_late_init unmask this.)
 593  *  This function is invoked on a per-processor basis.
 594  *
 595  * Inputs
 596  *      None
 597  *
 598  * Outputs
 599  *      None
 600  */
 601 void __cpuinit
 602 ia64_mca_cmc_vector_setup (void)
 603 {
 604         cmcv_reg_t      cmcv;
 605
 606         cmcv.cmcv_regval        = 0;
 607         cmcv.cmcv_mask          = 1;        /* Mask/disable interrupt at first */
 608         cmcv.cmcv_vector        = IA64_CMC_VECTOR;
 609         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 610
 611         IA64_MCA_DEBUG("%s: CPU %d corrected "
 612                        "machine check vector %#x registered.\n",
 613                        __FUNCTION__, smp_processor_id(), IA64_CMC_VECTOR);
 614
 615         IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
 616                        __FUNCTION__, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV));
 617 }
 618
 619 /*
 620  * ia64_mca_cmc_vector_disable
 621  *
 622  *  Mask the corrected machine check vector register in the processor.
 623  *  This function is invoked on a per-processor basis.
 624  *
 625  * Inputs
 626  *      dummy(unused)
 627  *
 628  * Outputs
 629  *      None
 630  */
 631 static void
 632 ia64_mca_cmc_vector_disable (void *dummy)
 633 {
 634         cmcv_reg_t      cmcv;
 635
 636         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
 637
 638         cmcv.cmcv_mask = 1; /* Mask/disable interrupt */
 639         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 640
 641         IA64_MCA_DEBUG("%s: CPU %d corrected "
 642                        "machine check vector %#x disabled.\n",
 643                        __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
 644 }
 645
 646 /*
 647  * ia64_mca_cmc_vector_enable
 648  *
 649  *  Unmask the corrected machine check vector register in the processor.
 650  *  This function is invoked on a per-processor basis.
 651  *
 652  * Inputs
 653  *      dummy(unused)
 654  *
 655  * Outputs
 656  *      None
 657  */
 658 static void
 659 ia64_mca_cmc_vector_enable (void *dummy)
 660 {
 661         cmcv_reg_t      cmcv;
 662
 663         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
 664
 665         cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
 666         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
 667
 668         IA64_MCA_DEBUG("%s: CPU %d corrected "
 669                        "machine check vector %#x enabled.\n",
 670                        __FUNCTION__, smp_processor_id(), cmcv.cmcv_vector);
 671 }
 672
 673 /*
 674  * ia64_mca_cmc_vector_disable_keventd
 675  *
 676  * Called via keventd (smp_call_function() is not safe in interrupt context) to
 677  * disable the cmc interrupt vector.
 678  */
 679 static void
 680 ia64_mca_cmc_vector_disable_keventd(void *unused)
 681 {
 682         on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 1, 0);
 683 }
 684
 685 /*
 686  * ia64_mca_cmc_vector_enable_keventd
 687  *
 688  * Called via keventd (smp_call_function() is not safe in interrupt context) to
 689  * enable the cmc interrupt vector.
 690  */
 691 static void
 692 ia64_mca_cmc_vector_enable_keventd(void *unused)
 693 {
 694         on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 1, 0);
 695 }
 696
 697 /*
 698  * ia64_mca_wakeup
 699  *
 700  *      Send an inter-cpu interrupt to wake-up a particular cpu
 701  *      and mark that cpu to be out of rendez.
 702  *
 703  *  Inputs  :   cpuid
 704  *  Outputs :   None
 705  */
 706 static void
 707 ia64_mca_wakeup(int cpu)
 708 {
 709         platform_send_ipi(cpu, IA64_MCA_WAKEUP_VECTOR, IA64_IPI_DM_INT, 0);
 710         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
 711
 712 }
 713
 714 /*
 715  * ia64_mca_wakeup_all
 716  *
 717  *      Wakeup all the cpus which have rendez'ed previously.
 718  *
 719  *  Inputs  :   None
 720  *  Outputs :   None
 721  */
 722 static void
 723 ia64_mca_wakeup_all(void)
 724 {
 725         int cpu;
 726
 727         /* Clear the Rendez checkin flag for all cpus */
 728         for_each_online_cpu(cpu) {
 729                 if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE)
 730                         ia64_mca_wakeup(cpu);
 731         }
 732
 733 }
 734
 735 /*
 736  * ia64_mca_rendez_interrupt_handler
 737  *
 738  *      This is handler used to put slave processors into spinloop
 739  *      while the monarch processor does the mca handling and later
 740  *      wake each slave up once the monarch is done.
 741  *
 742  *  Inputs  :   None
 743  *  Outputs :   None
 744  */
 745 static irqreturn_t
 746 ia64_mca_rendez_int_handler(int rendez_irq, void *arg, struct pt_regs *regs)
 747 {
 748         unsigned long flags;
 749         int cpu = smp_processor_id();
 750         struct ia64_mca_notify_die nd =
 751                 { .sos = NULL, .monarch_cpu = &monarch_cpu };
 752
 753         /* Mask all interrupts */
 754         local_irq_save(flags);
 755         if (notify_die(DIE_MCA_RENDZVOUS_ENTER, "MCA", regs, (long)&nd, 0, 0)
 756                         == NOTIFY_STOP)
 757                 ia64_mca_spin(__FUNCTION__);
 758
 759         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_DONE;
 760         /* Register with the SAL monarch that the slave has
 761          * reached SAL
 762          */
 763         ia64_sal_mc_rendez();
 764
 765         if (notify_die(DIE_MCA_RENDZVOUS_PROCESS, "MCA", regs, (long)&nd, 0, 0)
 766                         == NOTIFY_STOP)
 767                 ia64_mca_spin(__FUNCTION__);
 768
 769         /* Wait for the monarch cpu to exit. */
 770         while (monarch_cpu != -1)
 771                cpu_relax();     /* spin until monarch leaves */
 772
 773         if (notify_die(DIE_MCA_RENDZVOUS_LEAVE, "MCA", regs, (long)&nd, 0, 0)
 774                         == NOTIFY_STOP)
 775                 ia64_mca_spin(__FUNCTION__);
 776
 777         /* Enable all interrupts */
 778         local_irq_restore(flags);
 779         return IRQ_HANDLED;
 780 }
 781
 782 /*
 783  * ia64_mca_wakeup_int_handler
 784  *
 785  *      The interrupt handler for processing the inter-cpu interrupt to the
 786  *      slave cpu which was spinning in the rendez loop.
 787  *      Since this spinning is done by turning off the interrupts and
 788  *      polling on the wakeup-interrupt bit in the IRR, there is
 789  *      nothing useful to be done in the handler.
 790  *
 791  *  Inputs  :   wakeup_irq  (Wakeup-interrupt bit)
 792  *      arg             (Interrupt handler specific argument)
 793  *      ptregs          (Exception frame at the time of the interrupt)
 794  *  Outputs :   None
 795  *
 796  */
 797 static irqreturn_t
 798 ia64_mca_wakeup_int_handler(int wakeup_irq, void *arg, struct pt_regs *ptregs)
 799 {
 800         return IRQ_HANDLED;
 801 }
 802
 803 /* Function pointer for extra MCA recovery */
 804 int (*ia64_mca_ucmc_extension)
 805         (void*,struct ia64_sal_os_state*)
 806         = NULL;
 807
 808 int
 809 ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *))
 810 {
 811         if (ia64_mca_ucmc_extension)
 812                 return 1;
 813
 814         ia64_mca_ucmc_extension = fn;
 815         return 0;
 816 }
 817
 818 void
 819 ia64_unreg_MCA_extension(void)
 820 {
 821         if (ia64_mca_ucmc_extension)
 822                 ia64_mca_ucmc_extension = NULL;
 823 }
 824
 825 EXPORT_SYMBOL(ia64_reg_MCA_extension);
 826 EXPORT_SYMBOL(ia64_unreg_MCA_extension);
 827
 828
 829 static inline void
 830 copy_reg(const u64 *fr, u64 fnat, u64 *tr, u64 *tnat)
 831 {
 832         u64 fslot, tslot, nat;
 833         *tr = *fr;
 834         fslot = ((unsigned long)fr >> 3) & 63;
 835         tslot = ((unsigned long)tr >> 3) & 63;
 836         *tnat &= ~(1UL << tslot);
 837         nat = (fnat >> fslot) & 1;
 838         *tnat |= (nat << tslot);
 839 }
 840
 841 /* Change the comm field on the MCA/INT task to include the pid that
 842  * was interrupted, it makes for easier debugging.  If that pid was 0
 843  * (swapper or nested MCA/INIT) then use the start of the previous comm
 844  * field suffixed with its cpu.
 845  */
 846
 847 static void
 848 ia64_mca_modify_comm(const struct task_struct *previous_current)
 849 {
 850         char *p, comm[sizeof(current->comm)];
 851         if (previous_current->pid)
 852                 snprintf(comm, sizeof(comm), "%s %d",
 853                         current->comm, previous_current->pid);
 854         else {
 855                 int l;
 856                 if ((p = strchr(previous_current->comm, ' ')))
 857                         l = p - previous_current->comm;
 858                 else
 859                         l = strlen(previous_current->comm);
 860                 snprintf(comm, sizeof(comm), "%s %*s %d",
 861                         current->comm, l, previous_current->comm,
 862                         task_thread_info(previous_current)->cpu);
 863         }
 864         memcpy(current->comm, comm, sizeof(current->comm));
 865 }
 866
 867 /* On entry to this routine, we are running on the per cpu stack, see
 868  * mca_asm.h.  The original stack has not been touched by this event.  Some of
 869  * the original stack's registers will be in the RBS on this stack.  This stack
 870  * also contains a partial pt_regs and switch_stack, the rest of the data is in
 871  * PAL minstate.
 872  *
 873  * The first thing to do is modify the original stack to look like a blocked
 874  * task so we can run backtrace on the original task.  Also mark the per cpu
 875  * stack as current to ensure that we use the correct task state, it also means
 876  * that we can do backtrace on the MCA/INIT handler code itself.
 877  */
 878
 879 static struct task_struct *
 880 ia64_mca_modify_original_stack(struct pt_regs *regs,
 881                 const struct switch_stack *sw,
 882                 struct ia64_sal_os_state *sos,
 883                 const char *type)
 884 {
 885         char *p;
 886         ia64_va va;
 887         extern char ia64_leave_kernel[];        /* Need asm address, not function descriptor */
 888         const pal_min_state_area_t *ms = sos->pal_min_state;
 889         struct task_struct *previous_current;
 890         struct pt_regs *old_regs;
 891         struct switch_stack *old_sw;
 892         unsigned size = sizeof(struct pt_regs) +
 893                         sizeof(struct switch_stack) + 16;
 894         u64 *old_bspstore, *old_bsp;
 895         u64 *new_bspstore, *new_bsp;
 896         u64 old_unat, old_rnat, new_rnat, nat;
 897         u64 slots, loadrs = regs->loadrs;
 898         u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1];
 899         u64 ar_bspstore = regs->ar_bspstore;
 900         u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16);
 901         const u64 *bank;
 902         const char *msg;
 903         int cpu = smp_processor_id();
 904
 905         previous_current = curr_task(cpu);
 906         set_curr_task(cpu, current);
 907         if ((p = strchr(current->comm, ' ')))
 908                 *p = '\0';
 909
 910         /* Best effort attempt to cope with MCA/INIT delivered while in
 911          * physical mode.
 912          */
 913         regs->cr_ipsr = ms->pmsa_ipsr;
 914         if (ia64_psr(regs)->dt == 0) {
 915                 va.l = r12;
 916                 if (va.f.reg == 0) {
 917                         va.f.reg = 7;
 918                         r12 = va.l;
 919                 }
 920                 va.l = r13;
 921                 if (va.f.reg == 0) {
 922                         va.f.reg = 7;
 923                         r13 = va.l;
 924                 }
 925         }
 926         if (ia64_psr(regs)->rt == 0) {
 927                 va.l = ar_bspstore;
 928                 if (va.f.reg == 0) {
 929                         va.f.reg = 7;
 930                         ar_bspstore = va.l;
 931                 }
 932                 va.l = ar_bsp;
 933                 if (va.f.reg == 0) {
 934                         va.f.reg = 7;
 935                         ar_bsp = va.l;
 936                 }
 937         }
 938
 939         /* mca_asm.S ia64_old_stack() cannot assume that the dirty registers
 940          * have been copied to the old stack, the old stack may fail the
 941          * validation tests below.  So ia64_old_stack() must restore the dirty
 942          * registers from the new stack.  The old and new bspstore probably
 943          * have different alignments, so loadrs calculated on the old bsp
 944          * cannot be used to restore from the new bsp.  Calculate a suitable
 945          * loadrs for the new stack and save it in the new pt_regs, where
 946          * ia64_old_stack() can get it.
 947          */
 948         old_bspstore = (u64 *)ar_bspstore;
 949         old_bsp = (u64 *)ar_bsp;
 950         slots = ia64_rse_num_regs(old_bspstore, old_bsp);
 951         new_bspstore = (u64 *)((u64)current + IA64_RBS_OFFSET);
 952         new_bsp = ia64_rse_skip_regs(new_bspstore, slots);
 953         regs->loadrs = (new_bsp - new_bspstore) * 8 << 16;
 954
 955         /* Verify the previous stack state before we change it */
 956         if (user_mode(regs)) {
 957                 msg = "occurred in user space";
 958                 /* previous_current is guaranteed to be valid when the task was
 959                  * in user space, so ...
 960                  */
 961                 ia64_mca_modify_comm(previous_current);
 962                 goto no_mod;
 963         }
 964
 965         if (!mca_recover_range(ms->pmsa_iip)) {
 966                 if (r13 != sos->prev_IA64_KR_CURRENT) {
 967                         msg = "inconsistent previous current and r13";
 968                         goto no_mod;
 969                 }
 970                 if ((r12 - r13) >= KERNEL_STACK_SIZE) {
 971                         msg = "inconsistent r12 and r13";
 972                         goto no_mod;
 973                 }
 974                 if ((ar_bspstore - r13) >= KERNEL_STACK_SIZE) {
 975                         msg = "inconsistent ar.bspstore and r13";
 976                         goto no_mod;
 977                 }
 978                 va.p = old_bspstore;
 979                 if (va.f.reg < 5) {
 980                         msg = "old_bspstore is in the wrong region";
 981                         goto no_mod;
 982                 }
 983                 if ((ar_bsp - r13) >= KERNEL_STACK_SIZE) {
 984                         msg = "inconsistent ar.bsp and r13";
 985                         goto no_mod;
 986                 }
 987                 size += (ia64_rse_skip_regs(old_bspstore, slots) - old_bspstore) * 8;
 988                 if (ar_bspstore + size > r12) {
 989                         msg = "no room for blocked state";
 990                         goto no_mod;
 991                 }
 992         }
 993
 994         ia64_mca_modify_comm(previous_current);
 995
 996         /* Make the original task look blocked.  First stack a struct pt_regs,
 997          * describing the state at the time of interrupt.  mca_asm.S built a
 998          * partial pt_regs, copy it and fill in the blanks using minstate.
 999          */
1000         p = (char *)r12 - sizeof(*regs);
1001         old_regs = (struct pt_regs *)p;
1002         memcpy(old_regs, regs, sizeof(*regs));
1003         /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
1004          * pmsa_{xip,xpsr,xfs}
1005          */
1006         if (ia64_psr(regs)->ic) {
1007                 old_regs->cr_iip = ms->pmsa_iip;
1008                 old_regs->cr_ipsr = ms->pmsa_ipsr;
1009                 old_regs->cr_ifs = ms->pmsa_ifs;
1010         } else {
1011                 old_regs->cr_iip = ms->pmsa_xip;
1012                 old_regs->cr_ipsr = ms->pmsa_xpsr;
1013                 old_regs->cr_ifs = ms->pmsa_xfs;
1014         }
1015         old_regs->pr = ms->pmsa_pr;
1016         old_regs->b0 = ms->pmsa_br0;
1017         old_regs->loadrs = loadrs;
1018         old_regs->ar_rsc = ms->pmsa_rsc;
1019         old_unat = old_regs->ar_unat;
1020         copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &old_regs->r1, &old_unat);
1021         copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &old_regs->r2, &old_unat);
1022         copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &old_regs->r3, &old_unat);
1023         copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &old_regs->r8, &old_unat);
1024         copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &old_regs->r9, &old_unat);
1025         copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &old_regs->r10, &old_unat);
1026         copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &old_regs->r11, &old_unat);
1027         copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &old_regs->r12, &old_unat);
1028         copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &old_regs->r13, &old_unat);
1029         copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &old_regs->r14, &old_unat);
1030         copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &old_regs->r15, &old_unat);
1031         if (ia64_psr(old_regs)->bn)
1032                 bank = ms->pmsa_bank1_gr;
1033         else
1034                 bank = ms->pmsa_bank0_gr;
1035         copy_reg(&bank[16-16], ms->pmsa_nat_bits, &old_regs->r16, &old_unat);
1036         copy_reg(&bank[17-16], ms->pmsa_nat_bits, &old_regs->r17, &old_unat);
1037         copy_reg(&bank[18-16], ms->pmsa_nat_bits, &old_regs->r18, &old_unat);
1038         copy_reg(&bank[19-16], ms->pmsa_nat_bits, &old_regs->r19, &old_unat);
1039         copy_reg(&bank[20-16], ms->pmsa_nat_bits, &old_regs->r20, &old_unat);
1040         copy_reg(&bank[21-16], ms->pmsa_nat_bits, &old_regs->r21, &old_unat);
1041         copy_reg(&bank[22-16], ms->pmsa_nat_bits, &old_regs->r22, &old_unat);
1042         copy_reg(&bank[23-16], ms->pmsa_nat_bits, &old_regs->r23, &old_unat);
1043         copy_reg(&bank[24-16], ms->pmsa_nat_bits, &old_regs->r24, &old_unat);
1044         copy_reg(&bank[25-16], ms->pmsa_nat_bits, &old_regs->r25, &old_unat);
1045         copy_reg(&bank[26-16], ms->pmsa_nat_bits, &old_regs->r26, &old_unat);
1046         copy_reg(&bank[27-16], ms->pmsa_nat_bits, &old_regs->r27, &old_unat);
1047         copy_reg(&bank[28-16], ms->pmsa_nat_bits, &old_regs->r28, &old_unat);
1048         copy_reg(&bank[29-16], ms->pmsa_nat_bits, &old_regs->r29, &old_unat);
1049         copy_reg(&bank[30-16], ms->pmsa_nat_bits, &old_regs->r30, &old_unat);
1050         copy_reg(&bank[31-16], ms->pmsa_nat_bits, &old_regs->r31, &old_unat);
1051
1052         /* Next stack a struct switch_stack.  mca_asm.S built a partial
1053          * switch_stack, copy it and fill in the blanks using pt_regs and
1054          * minstate.
1055          *
1056          * In the synthesized switch_stack, b0 points to ia64_leave_kernel,
1057          * ar.pfs is set to 0.
1058          *
1059          * unwind.c::unw_unwind() does special processing for interrupt frames.
1060          * It checks if the PRED_NON_SYSCALL predicate is set, if the predicate
1061          * is clear then unw_unwind() does _not_ adjust bsp over pt_regs.  Not
1062          * that this is documented, of course.  Set PRED_NON_SYSCALL in the
1063          * switch_stack on the original stack so it will unwind correctly when
1064          * unwind.c reads pt_regs.
1065          *
1066          * thread.ksp is updated to point to the synthesized switch_stack.
1067          */
1068         p -= sizeof(struct switch_stack);
1069         old_sw = (struct switch_stack *)p;
1070         memcpy(old_sw, sw, sizeof(*sw));
1071         old_sw->caller_unat = old_unat;
1072         old_sw->ar_fpsr = old_regs->ar_fpsr;
1073         copy_reg(&ms->pmsa_gr[4-1], ms->pmsa_nat_bits, &old_sw->r4, &old_unat);
1074         copy_reg(&ms->pmsa_gr[5-1], ms->pmsa_nat_bits, &old_sw->r5, &old_unat);
1075         copy_reg(&ms->pmsa_gr[6-1], ms->pmsa_nat_bits, &old_sw->r6, &old_unat);
1076         copy_reg(&ms->pmsa_gr[7-1], ms->pmsa_nat_bits, &old_sw->r7, &old_unat);
1077         old_sw->b0 = (u64)ia64_leave_kernel;
1078         old_sw->b1 = ms->pmsa_br1;
1079         old_sw->ar_pfs = 0;
1080         old_sw->ar_unat = old_unat;
1081         old_sw->pr = old_regs->pr | (1UL << PRED_NON_SYSCALL);
1082         previous_current->thread.ksp = (u64)p - 16;
1083
1084         /* Finally copy the original stack's registers back to its RBS.
1085          * Registers from ar.bspstore through ar.bsp at the time of the event
1086          * are in the current RBS, copy them back to the original stack.  The
1087          * copy must be done register by register because the original bspstore
1088          * and the current one have different alignments, so the saved RNAT
1089          * data occurs at different places.
1090          *
1091          * mca_asm does cover, so the old_bsp already includes all registers at
1092          * the time of MCA/INIT.  It also does flushrs, so all registers before
1093          * this function have been written to backing store on the MCA/INIT
1094          * stack.
1095          */
1096         new_rnat = ia64_get_rnat(ia64_rse_rnat_addr(new_bspstore));
1097         old_rnat = regs->ar_rnat;
1098         while (slots--) {
1099                 if (ia64_rse_is_rnat_slot(new_bspstore)) {
1100                         new_rnat = ia64_get_rnat(new_bspstore++);
1101                 }
1102                 if (ia64_rse_is_rnat_slot(old_bspstore)) {
1103                         *old_bspstore++ = old_rnat;
1104                         old_rnat = 0;
1105                 }
1106                 nat = (new_rnat >> ia64_rse_slot_num(new_bspstore)) & 1UL;
1107                 old_rnat &= ~(1UL << ia64_rse_slot_num(old_bspstore));
1108                 old_rnat |= (nat << ia64_rse_slot_num(old_bspstore));
1109                 *old_bspstore++ = *new_bspstore++;
1110         }
1111         old_sw->ar_bspstore = (unsigned long)old_bspstore;
1112         old_sw->ar_rnat = old_rnat;
1113
1114         sos->prev_task = previous_current;
1115         return previous_current;
1116
1117 no_mod:
1118         printk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
1119                         smp_processor_id(), type, msg);
1120         return previous_current;
1121 }
1122
1123 /* The monarch/slave interaction is based on monarch_cpu and requires that all
1124  * slaves have entered rendezvous before the monarch leaves.  If any cpu has
1125  * not entered rendezvous yet then wait a bit.  The assumption is that any
1126  * slave that has not rendezvoused after a reasonable time is never going to do
1127  * so.  In this context, slave includes cpus that respond to the MCA rendezvous
1128  * interrupt, as well as cpus that receive the INIT slave event.
1129  */
1130
1131 static void
1132 ia64_wait_for_slaves(int monarch, const char *type)
1133 {
1134         int c, wait = 0, missing = 0;
1135         for_each_online_cpu(c) {
1136                 if (c == monarch)
1137                         continue;
1138                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE) {
1139                         udelay(1000);           /* short wait first */
1140                         wait = 1;
1141                         break;
1142                 }
1143         }
1144         if (!wait)
1145                 goto all_in;
1146         for_each_online_cpu(c) {
1147                 if (c == monarch)
1148                         continue;
1149                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE) {
1150                         udelay(5*1000000);      /* wait 5 seconds for slaves (arbitrary) */
1151                         if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE)
1152                                 missing = 1;
1153                         break;
1154                 }
1155         }
1156         if (!missing)
1157                 goto all_in;
1158         /*
1159          * Maybe slave(s) dead. Print buffered messages immediately.
1160          */
1161         ia64_mlogbuf_finish(0);
1162         mprintk(KERN_INFO "OS %s slave did not rendezvous on cpu", type);
1163         for_each_online_cpu(c) {
1164                 if (c == monarch)
1165                         continue;
1166                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE)
1167                         mprintk(" %d", c);
1168         }
1169         mprintk("\n");
1170         return;
1171
1172 all_in:
1173         mprintk(KERN_INFO "All OS %s slaves have reached rendezvous\n", type);
1174         return;
1175 }
1176
1177 /*
1178  * ia64_mca_handler
1179  *
1180  *      This is uncorrectable machine check handler called from OS_MCA
1181  *      dispatch code which is in turn called from SAL_CHECK().
1182  *      This is the place where the core of OS MCA handling is done.
1183  *      Right now the logs are extracted and displayed in a well-defined
1184  *      format. This handler code is supposed to be run only on the
1185  *      monarch processor. Once the monarch is done with MCA handling
1186  *      further MCA logging is enabled by clearing logs.
1187  *      Monarch also has the duty of sending wakeup-IPIs to pull the
1188  *      slave processors out of rendezvous spinloop.
1189  */
1190 void
1191 ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1192                  struct ia64_sal_os_state *sos)
1193 {
1194         pal_processor_state_info_t *psp = (pal_processor_state_info_t *)
1195                 &sos->proc_state_param;
1196         int recover, cpu = smp_processor_id();
1197         struct task_struct *previous_current;
1198         struct ia64_mca_notify_die nd =
1199                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1200
1201         mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d "
1202                 "monarch=%ld\n", sos->proc_state_param, cpu, sos->monarch);
1203
1204         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
1205         monarch_cpu = cpu;
1206         if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, (long)&nd, 0, 0)
1207                         == NOTIFY_STOP)
1208                 ia64_mca_spin(__FUNCTION__);
1209         ia64_wait_for_slaves(cpu, "MCA");
1210
1211         /* Wakeup all the processors which are spinning in the rendezvous loop.
1212          * They will leave SAL, then spin in the OS with interrupts disabled
1213          * until this monarch cpu leaves the MCA handler.  That gets control
1214          * back to the OS so we can backtrace the other cpus, backtrace when
1215          * spinning in SAL does not work.
1216          */
1217         ia64_mca_wakeup_all();
1218         if (notify_die(DIE_MCA_MONARCH_PROCESS, "MCA", regs, (long)&nd, 0, 0)
1219                         == NOTIFY_STOP)
1220                 ia64_mca_spin(__FUNCTION__);
1221
1222         /* Get the MCA error record and log it */
1223         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
1224
1225         /* TLB error is only exist in this SAL error record */
1226         recover = (psp->tc && !(psp->cc || psp->bc || psp->rc || psp->uc))
1227         /* other error recovery */
1228            || (ia64_mca_ucmc_extension
1229                 && ia64_mca_ucmc_extension(
1230                         IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA),
1231                         sos));
1232
1233         if (recover) {
1234                 sal_log_record_header_t *rh = IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA);
1235                 rh->severity = sal_log_severity_corrected;
1236                 ia64_sal_clear_state_info(SAL_INFO_TYPE_MCA);
1237                 sos->os_status = IA64_MCA_CORRECTED;
1238         } else {
1239                 /* Dump buffered message to console */
1240                 ia64_mlogbuf_finish(1);
1241         }
1242         if (notify_die(DIE_MCA_MONARCH_LEAVE, "MCA", regs, (long)&nd, 0, recover)
1243                         == NOTIFY_STOP)
1244                 ia64_mca_spin(__FUNCTION__);
1245
1246         set_curr_task(cpu, previous_current);
1247         monarch_cpu = -1;
1248 }
1249
1250 static DECLARE_WORK(cmc_disable_work, ia64_mca_cmc_vector_disable_keventd, NULL);
1251 static DECLARE_WORK(cmc_enable_work, ia64_mca_cmc_vector_enable_keventd, NULL);
1252
1253 /*
1254  * ia64_mca_cmc_int_handler
1255  *
1256  *  This is corrected machine check interrupt handler.
1257  *      Right now the logs are extracted and displayed in a well-defined
1258  *      format.
1259  *
1260  * Inputs
1261  *      interrupt number
1262  *      client data arg ptr
1263  *      saved registers ptr
1264  *
1265  * Outputs
1266  *      None
1267  */
1268 static irqreturn_t
1269 ia64_mca_cmc_int_handler(int cmc_irq, void *arg, struct pt_regs *ptregs)
1270 {
1271         static unsigned long    cmc_history[CMC_HISTORY_LENGTH];
1272         static int              index;
1273         static DEFINE_SPINLOCK(cmc_history_lock);
1274
1275         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
1276                        __FUNCTION__, cmc_irq, smp_processor_id());
1277
1278         /* SAL spec states this should run w/ interrupts enabled */
1279         local_irq_enable();
1280
1281         /* Get the CMC error record and log it */
1282         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC);
1283
1284         spin_lock(&cmc_history_lock);
1285         if (!cmc_polling_enabled) {
1286                 int i, count = 1; /* we know 1 happened now */
1287                 unsigned long now = jiffies;
1288
1289                 for (i = 0; i < CMC_HISTORY_LENGTH; i++) {
1290                         if (now - cmc_history[i] <= HZ)
1291                                 count++;
1292                 }
1293
1294                 IA64_MCA_DEBUG(KERN_INFO "CMC threshold %d/%d\n", count, CMC_HISTORY_LENGTH);
1295                 if (count >= CMC_HISTORY_LENGTH) {
1296
1297                         cmc_polling_enabled = 1;
1298                         spin_unlock(&cmc_history_lock);
1299                         /* If we're being hit with CMC interrupts, we won't
1300                          * ever execute the schedule_work() below.  Need to
1301                          * disable CMC interrupts on this processor now.
1302                          */
1303                         ia64_mca_cmc_vector_disable(NULL);
1304                         schedule_work(&cmc_disable_work);
1305
1306                         /*
1307                          * Corrected errors will still be corrected, but
1308                          * make sure there's a log somewhere that indicates
1309                          * something is generating more than we can handle.
1310                          */
1311                         printk(KERN_WARNING "WARNING: Switching to polling CMC handler; error records may be lost\n");
1312
1313                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1314
1315                         /* lock already released, get out now */
1316                         return IRQ_HANDLED;
1317                 } else {
1318                         cmc_history[index++] = now;
1319                         if (index == CMC_HISTORY_LENGTH)
1320                                 index = 0;
1321                 }
1322         }
1323         spin_unlock(&cmc_history_lock);
1324         return IRQ_HANDLED;
1325 }
1326
1327 /*
1328  *  ia64_mca_cmc_int_caller
1329  *
1330  *      Triggered by sw interrupt from CMC polling routine.  Calls
1331  *      real interrupt handler and either triggers a sw interrupt
1332  *      on the next cpu or does cleanup at the end.
1333  *
1334  * Inputs
1335  *      interrupt number
1336  *      client data arg ptr
1337  *      saved registers ptr
1338  * Outputs
1339  *      handled
1340  */
1341 static irqreturn_t
1342 ia64_mca_cmc_int_caller(int cmc_irq, void *arg, struct pt_regs *ptregs)
1343 {
1344         static int start_count = -1;
1345         unsigned int cpuid;
1346
1347         cpuid = smp_processor_id();
1348
1349         /* If first cpu, update count */
1350         if (start_count == -1)
1351                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CMC);
1352
1353         ia64_mca_cmc_int_handler(cmc_irq, arg, ptregs);
1354
1355         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1356
1357         if (cpuid < NR_CPUS) {
1358                 platform_send_ipi(cpuid, IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1359         } else {
1360                 /* If no log record, switch out of polling mode */
1361                 if (start_count == IA64_LOG_COUNT(SAL_INFO_TYPE_CMC)) {
1362
1363                         printk(KERN_WARNING "Returning to interrupt driven CMC handler\n");
1364                         schedule_work(&cmc_enable_work);
1365                         cmc_polling_enabled = 0;
1366
1367                 } else {
1368
1369                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1370                 }
1371
1372                 start_count = -1;
1373         }
1374
1375         return IRQ_HANDLED;
1376 }
1377
1378 /*
1379  *  ia64_mca_cmc_poll
1380  *
1381  *      Poll for Corrected Machine Checks (CMCs)
1382  *
1383  * Inputs   :   dummy(unused)
1384  * Outputs  :   None
1385  *
1386  */
1387 static void
1388 ia64_mca_cmc_poll (unsigned long dummy)
1389 {
1390         /* Trigger a CMC interrupt cascade  */
1391         platform_send_ipi(first_cpu(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1392 }
1393
1394 /*
1395  *  ia64_mca_cpe_int_caller
1396  *
1397  *      Triggered by sw interrupt from CPE polling routine.  Calls
1398  *      real interrupt handler and either triggers a sw interrupt
1399  *      on the next cpu or does cleanup at the end.
1400  *
1401  * Inputs
1402  *      interrupt number
1403  *      client data arg ptr
1404  *      saved registers ptr
1405  * Outputs
1406  *      handled
1407  */
1408 #ifdef CONFIG_ACPI
1409
1410 static irqreturn_t
1411 ia64_mca_cpe_int_caller(int cpe_irq, void *arg, struct pt_regs *ptregs)
1412 {
1413         static int start_count = -1;
1414         static int poll_time = MIN_CPE_POLL_INTERVAL;
1415         unsigned int cpuid;
1416
1417         cpuid = smp_processor_id();
1418
1419         /* If first cpu, update count */
1420         if (start_count == -1)
1421                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CPE);
1422
1423         ia64_mca_cpe_int_handler(cpe_irq, arg, ptregs);
1424
1425         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1426
1427         if (cpuid < NR_CPUS) {
1428                 platform_send_ipi(cpuid, IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1429         } else {
1430                 /*
1431                  * If a log was recorded, increase our polling frequency,
1432                  * otherwise, backoff or return to interrupt mode.
1433                  */
1434                 if (start_count != IA64_LOG_COUNT(SAL_INFO_TYPE_CPE)) {
1435                         poll_time = max(MIN_CPE_POLL_INTERVAL, poll_time / 2);
1436                 } else if (cpe_vector < 0) {
1437                         poll_time = min(MAX_CPE_POLL_INTERVAL, poll_time * 2);
1438                 } else {
1439                         poll_time = MIN_CPE_POLL_INTERVAL;
1440
1441                         printk(KERN_WARNING "Returning to interrupt driven CPE handler\n");
1442                         enable_irq(local_vector_to_irq(IA64_CPE_VECTOR));
1443                         cpe_poll_enabled = 0;
1444                 }
1445
1446                 if (cpe_poll_enabled)
1447                         mod_timer(&cpe_poll_timer, jiffies + poll_time);
1448                 start_count = -1;
1449         }
1450
1451         return IRQ_HANDLED;
1452 }
1453
1454 /*
1455  *  ia64_mca_cpe_poll
1456  *
1457  *      Poll for Corrected Platform Errors (CPEs), trigger interrupt
1458  *      on first cpu, from there it will trickle through all the cpus.
1459  *
1460  * Inputs   :   dummy(unused)
1461  * Outputs  :   None
1462  *
1463  */
1464 static void
1465 ia64_mca_cpe_poll (unsigned long dummy)
1466 {
1467         /* Trigger a CPE interrupt cascade  */
1468         platform_send_ipi(first_cpu(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1469 }
1470
1471 #endif /* CONFIG_ACPI */
1472
1473 static int
1474 default_monarch_init_process(struct notifier_block *self, unsigned long val, void *data)
1475 {
1476         int c;
1477         struct task_struct *g, *t;
1478         if (val != DIE_INIT_MONARCH_PROCESS)
1479                 return NOTIFY_DONE;
1480
1481         /*
1482          * FIXME: mlogbuf will brim over with INIT stack dumps.
1483          * To enable show_stack from INIT, we use oops_in_progress which should
1484          * be used in real oops. This would cause something wrong after INIT.
1485          */
1486         BREAK_LOGLEVEL(console_loglevel);
1487         ia64_mlogbuf_dump_from_init();
1488
1489         printk(KERN_ERR "Processes interrupted by INIT -");
1490         for_each_online_cpu(c) {
1491                 struct ia64_sal_os_state *s;
1492                 t = __va(__per_cpu_mca[c] + IA64_MCA_CPU_INIT_STACK_OFFSET);
1493                 s = (struct ia64_sal_os_state *)((char *)t + MCA_SOS_OFFSET);
1494                 g = s->prev_task;
1495                 if (g) {
1496                         if (g->pid)
1497                                 printk(" %d", g->pid);
1498                         else
1499                                 printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);
1500                 }
1501         }
1502         printk("\n\n");
1503         if (read_trylock(&tasklist_lock)) {
1504                 do_each_thread (g, t) {
1505                         printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);
1506                         show_stack(t, NULL);
1507                 } while_each_thread (g, t);
1508                 read_unlock(&tasklist_lock);
1509         }
1510         /* FIXME: This will not restore zapped printk locks. */
1511         RESTORE_LOGLEVEL(console_loglevel);
1512         return NOTIFY_DONE;
1513 }
1514
1515 /*
1516  * C portion of the OS INIT handler
1517  *
1518  * Called from ia64_os_init_dispatch
1519  *
1520  * Inputs: pointer to pt_regs where processor info was saved.  SAL/OS state for
1521  * this event.  This code is used for both monarch and slave INIT events, see
1522  * sos->monarch.
1523  *
1524  * All INIT events switch to the INIT stack and change the previous process to
1525  * blocked status.  If one of the INIT events is the monarch then we are
1526  * probably processing the nmi button/command.  Use the monarch cpu to dump all
1527  * the processes.  The slave INIT events all spin until the monarch cpu
1528  * returns.  We can also get INIT slave events for MCA, in which case the MCA
1529  * process is the monarch.
1530  */
1531
1532 void
1533 ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
1534                   struct ia64_sal_os_state *sos)
1535 {
1536         static atomic_t slaves;
1537         static atomic_t monarchs;
1538         struct task_struct *previous_current;
1539         int cpu = smp_processor_id();
1540         struct ia64_mca_notify_die nd =
1541                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1542
1543         (void) notify_die(DIE_INIT_ENTER, "INIT", regs, (long)&nd, 0, 0);
1544
1545         mprintk(KERN_INFO "Entered OS INIT handler. PSP=%lx cpu=%d monarch=%ld\n",
1546                 sos->proc_state_param, cpu, sos->monarch);
1547         salinfo_log_wakeup(SAL_INFO_TYPE_INIT, NULL, 0, 0);
1548
1549         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "INIT");
1550         sos->os_status = IA64_INIT_RESUME;
1551
1552         /* FIXME: Workaround for broken proms that drive all INIT events as
1553          * slaves.  The last slave that enters is promoted to be a monarch.
1554          * Remove this code in September 2006, that gives platforms a year to
1555          * fix their proms and get their customers updated.
1556          */
1557         if (!sos->monarch && atomic_add_return(1, &slaves) == num_online_cpus()) {
1558                 mprintk(KERN_WARNING "%s: Promoting cpu %d to monarch.\n",
1559                        __FUNCTION__, cpu);
1560                 atomic_dec(&slaves);
1561                 sos->monarch = 1;
1562         }
1563
1564         /* FIXME: Workaround for broken proms that drive all INIT events as
1565          * monarchs.  Second and subsequent monarchs are demoted to slaves.
1566          * Remove this code in September 2006, that gives platforms a year to
1567          * fix their proms and get their customers updated.
1568          */
1569         if (sos->monarch && atomic_add_return(1, &monarchs) > 1) {
1570                 mprintk(KERN_WARNING "%s: Demoting cpu %d to slave.\n",
1571                                __FUNCTION__, cpu);
1572                 atomic_dec(&monarchs);
1573                 sos->monarch = 0;
1574         }
1575
1576         if (!sos->monarch) {
1577                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
1578                 while (monarch_cpu == -1)
1579                        cpu_relax();     /* spin until monarch enters */
1580                 if (notify_die(DIE_INIT_SLAVE_ENTER, "INIT", regs, (long)&nd, 0, 0)
1581                                 == NOTIFY_STOP)
1582                         ia64_mca_spin(__FUNCTION__);
1583                 if (notify_die(DIE_INIT_SLAVE_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1584                                 == NOTIFY_STOP)
1585                         ia64_mca_spin(__FUNCTION__);
1586                 while (monarch_cpu != -1)
1587                        cpu_relax();     /* spin until monarch leaves */
1588                 if (notify_die(DIE_INIT_SLAVE_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1589                                 == NOTIFY_STOP)
1590                         ia64_mca_spin(__FUNCTION__);
1591                 mprintk("Slave on cpu %d returning to normal service.\n", cpu);
1592                 set_curr_task(cpu, previous_current);
1593                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1594                 atomic_dec(&slaves);
1595                 return;
1596         }
1597
1598         monarch_cpu = cpu;
1599         if (notify_die(DIE_INIT_MONARCH_ENTER, "INIT", regs, (long)&nd, 0, 0)
1600                         == NOTIFY_STOP)
1601                 ia64_mca_spin(__FUNCTION__);
1602
1603         /*
1604          * Wait for a bit.  On some machines (e.g., HP's zx2000 and zx6000, INIT can be
1605          * generated via the BMC's command-line interface, but since the console is on the
1606          * same serial line, the user will need some time to switch out of the BMC before
1607          * the dump begins.
1608          */
1609         mprintk("Delaying for 5 seconds...\n");
1610         udelay(5*1000000);
1611         ia64_wait_for_slaves(cpu, "INIT");
1612         /* If nobody intercepts DIE_INIT_MONARCH_PROCESS then we drop through
1613          * to default_monarch_init_process() above and just print all the
1614          * tasks.
1615          */
1616         if (notify_die(DIE_INIT_MONARCH_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1617                         == NOTIFY_STOP)
1618                 ia64_mca_spin(__FUNCTION__);
1619         if (notify_die(DIE_INIT_MONARCH_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1620                         == NOTIFY_STOP)
1621                 ia64_mca_spin(__FUNCTION__);
1622         mprintk("\nINIT dump complete.  Monarch on cpu %d returning to normal service.\n", cpu);
1623         atomic_dec(&monarchs);
1624         set_curr_task(cpu, previous_current);
1625         monarch_cpu = -1;
1626         return;
1627 }
1628
1629 static int __init
1630 ia64_mca_disable_cpe_polling(char *str)
1631 {
1632         cpe_poll_enabled = 0;
1633         return 1;
1634 }
1635
1636 __setup("disable_cpe_poll", ia64_mca_disable_cpe_polling);
1637
1638 static struct irqaction cmci_irqaction = {
1639         .handler =      ia64_mca_cmc_int_handler,
1640         .flags =        IRQF_DISABLED,
1641         .name =         "cmc_hndlr"
1642 };
1643
1644 static struct irqaction cmcp_irqaction = {
1645         .handler =      ia64_mca_cmc_int_caller,
1646         .flags =        IRQF_DISABLED,
1647         .name =         "cmc_poll"
1648 };
1649
1650 static struct irqaction mca_rdzv_irqaction = {
1651         .handler =      ia64_mca_rendez_int_handler,
1652         .flags =        IRQF_DISABLED,
1653         .name =         "mca_rdzv"
1654 };
1655
1656 static struct irqaction mca_wkup_irqaction = {
1657         .handler =      ia64_mca_wakeup_int_handler,
1658         .flags =        IRQF_DISABLED,
1659         .name =         "mca_wkup"
1660 };
1661
1662 #ifdef CONFIG_ACPI
1663 static struct irqaction mca_cpe_irqaction = {
1664         .handler =      ia64_mca_cpe_int_handler,
1665         .flags =        IRQF_DISABLED,
1666         .name =         "cpe_hndlr"
1667 };
1668
1669 static struct irqaction mca_cpep_irqaction = {
1670         .handler =      ia64_mca_cpe_int_caller,
1671         .flags =        IRQF_DISABLED,
1672         .name =         "cpe_poll"
1673 };
1674 #endif /* CONFIG_ACPI */
1675
1676 /* Minimal format of the MCA/INIT stacks.  The pseudo processes that run on
1677  * these stacks can never sleep, they cannot return from the kernel to user
1678  * space, they do not appear in a normal ps listing.  So there is no need to
1679  * format most of the fields.
1680  */
1681
1682 static void __cpuinit
1683 format_mca_init_stack(void *mca_data, unsigned long offset,
1684                 const char *type, int cpu)
1685 {
1686         struct task_struct *p = (struct task_struct *)((char *)mca_data + offset);
1687         struct thread_info *ti;
1688         memset(p, 0, KERNEL_STACK_SIZE);
1689         ti = task_thread_info(p);
1690         ti->flags = _TIF_MCA_INIT;
1691         ti->preempt_count = 1;
1692         ti->task = p;
1693         ti->cpu = cpu;
1694         p->thread_info = ti;
1695         p->state = TASK_UNINTERRUPTIBLE;
1696         cpu_set(cpu, p->cpus_allowed);
1697         INIT_LIST_HEAD(&p->tasks);
1698         p->parent = p->real_parent = p->group_leader = p;
1699         INIT_LIST_HEAD(&p->children);
1700         INIT_LIST_HEAD(&p->sibling);
1701         strncpy(p->comm, type, sizeof(p->comm)-1);
1702 }
1703
1704 /* Do per-CPU MCA-related initialization.  */
1705
1706 void __cpuinit
1707 ia64_mca_cpu_init(void *cpu_data)
1708 {
1709         void *pal_vaddr;
1710         static int first_time = 1;
1711
1712         if (first_time) {
1713                 void *mca_data;
1714                 int cpu;
1715
1716                 first_time = 0;
1717                 mca_data = alloc_bootmem(sizeof(struct ia64_mca_cpu)
1718                                          * NR_CPUS + KERNEL_STACK_SIZE);
1719                 mca_data = (void *)(((unsigned long)mca_data +
1720                                         KERNEL_STACK_SIZE - 1) &
1721                                 (-KERNEL_STACK_SIZE));
1722                 for (cpu = 0; cpu < NR_CPUS; cpu++) {
1723                         format_mca_init_stack(mca_data,
1724                                         offsetof(struct ia64_mca_cpu, mca_stack),
1725                                         "MCA", cpu);
1726                         format_mca_init_stack(mca_data,
1727                                         offsetof(struct ia64_mca_cpu, init_stack),
1728                                         "INIT", cpu);
1729                         __per_cpu_mca[cpu] = __pa(mca_data);
1730                         mca_data += sizeof(struct ia64_mca_cpu);
1731                 }
1732         }
1733
1734         /*
1735          * The MCA info structure was allocated earlier and its
1736          * physical address saved in __per_cpu_mca[cpu].  Copy that
1737          * address * to ia64_mca_data so we can access it as a per-CPU
1738          * variable.
1739          */
1740         __get_cpu_var(ia64_mca_data) = __per_cpu_mca[smp_processor_id()];
1741
1742         /*
1743          * Stash away a copy of the PTE needed to map the per-CPU page.
1744          * We may need it during MCA recovery.
1745          */
1746         __get_cpu_var(ia64_mca_per_cpu_pte) =
1747                 pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL));
1748
1749         /*
1750          * Also, stash away a copy of the PAL address and the PTE
1751          * needed to map it.
1752          */
1753         pal_vaddr = efi_get_pal_addr();
1754         if (!pal_vaddr)
1755                 return;
1756         __get_cpu_var(ia64_mca_pal_base) =
1757                 GRANULEROUNDDOWN((unsigned long) pal_vaddr);
1758         __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr),
1759                                                               PAGE_KERNEL));
1760 }
1761
1762 /*
1763  * ia64_mca_init
1764  *
1765  *  Do all the system level mca specific initialization.
1766  *
1767  *      1. Register spinloop and wakeup request interrupt vectors
1768  *
1769  *      2. Register OS_MCA handler entry point
1770  *
1771  *      3. Register OS_INIT handler entry point
1772  *
1773  *  4. Initialize MCA/CMC/INIT related log buffers maintained by the OS.
1774  *
1775  *  Note that this initialization is done very early before some kernel
1776  *  services are available.
1777  *
1778  *  Inputs  :   None
1779  *
1780  *  Outputs :   None
1781  */
1782 void __init
1783 ia64_mca_init(void)
1784 {
1785         ia64_fptr_t *init_hldlr_ptr_monarch = (ia64_fptr_t *)ia64_os_init_dispatch_monarch;
1786         ia64_fptr_t *init_hldlr_ptr_slave = (ia64_fptr_t *)ia64_os_init_dispatch_slave;
1787         ia64_fptr_t *mca_hldlr_ptr = (ia64_fptr_t *)ia64_os_mca_dispatch;
1788         int i;
1789         s64 rc;
1790         struct ia64_sal_retval isrv;
1791         u64 timeout = IA64_MCA_RENDEZ_TIMEOUT;  /* platform specific */
1792         static struct notifier_block default_init_monarch_nb = {
1793                 .notifier_call = default_monarch_init_process,
1794                 .priority = 0/* we need to notified last */
1795         };
1796
1797         IA64_MCA_DEBUG("%s: begin\n", __FUNCTION__);
1798
1799         /* Clear the Rendez checkin flag for all cpus */
1800         for(i = 0 ; i < NR_CPUS; i++)
1801                 ia64_mc_info.imi_rendez_checkin[i] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1802
1803         /*
1804          * Register the rendezvous spinloop and wakeup mechanism with SAL
1805          */
1806
1807         /* Register the rendezvous interrupt vector with SAL */
1808         while (1) {
1809                 isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT,
1810                                               SAL_MC_PARAM_MECHANISM_INT,
1811                                               IA64_MCA_RENDEZ_VECTOR,
1812                                               timeout,
1813                                               SAL_MC_PARAM_RZ_ALWAYS);
1814                 rc = isrv.status;
1815                 if (rc == 0)
1816                         break;
1817                 if (rc == -2) {
1818                         printk(KERN_INFO "Increasing MCA rendezvous timeout from "
1819                                 "%ld to %ld milliseconds\n", timeout, isrv.v0);
1820                         timeout = isrv.v0;
1821                         (void) notify_die(DIE_MCA_NEW_TIMEOUT, "MCA", NULL, timeout, 0, 0);
1822                         continue;
1823                 }
1824                 printk(KERN_ERR "Failed to register rendezvous interrupt "
1825                        "with SAL (status %ld)\n", rc);
1826                 return;
1827         }
1828
1829         /* Register the wakeup interrupt vector with SAL */
1830         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP,
1831                                       SAL_MC_PARAM_MECHANISM_INT,
1832                                       IA64_MCA_WAKEUP_VECTOR,
1833                                       0, 0);
1834         rc = isrv.status;
1835         if (rc) {
1836                 printk(KERN_ERR "Failed to register wakeup interrupt with SAL "
1837                        "(status %ld)\n", rc);
1838                 return;
1839         }
1840
1841         IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __FUNCTION__);
1842
1843         ia64_mc_info.imi_mca_handler        = ia64_tpa(mca_hldlr_ptr->fp);
1844         /*
1845          * XXX - disable SAL checksum by setting size to 0; should be
1846          *      ia64_tpa(ia64_os_mca_dispatch_end) - ia64_tpa(ia64_os_mca_dispatch);
1847          */
1848         ia64_mc_info.imi_mca_handler_size       = 0;
1849
1850         /* Register the os mca handler with SAL */
1851         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_MCA,
1852                                        ia64_mc_info.imi_mca_handler,
1853                                        ia64_tpa(mca_hldlr_ptr->gp),
1854                                        ia64_mc_info.imi_mca_handler_size,
1855                                        0, 0, 0)))
1856         {
1857                 printk(KERN_ERR "Failed to register OS MCA handler with SAL "
1858                        "(status %ld)\n", rc);
1859                 return;
1860         }
1861
1862         IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __FUNCTION__,
1863                        ia64_mc_info.imi_mca_handler, ia64_tpa(mca_hldlr_ptr->gp));
1864
1865         /*
1866          * XXX - disable SAL checksum by setting size to 0, should be
1867          * size of the actual init handler in mca_asm.S.
1868          */
1869         ia64_mc_info.imi_monarch_init_handler           = ia64_tpa(init_hldlr_ptr_monarch->fp);
1870         ia64_mc_info.imi_monarch_init_handler_size      = 0;
1871         ia64_mc_info.imi_slave_init_handler             = ia64_tpa(init_hldlr_ptr_slave->fp);
1872         ia64_mc_info.imi_slave_init_handler_size        = 0;
1873
1874         IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __FUNCTION__,
1875                        ia64_mc_info.imi_monarch_init_handler);
1876
1877         /* Register the os init handler with SAL */
1878         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_INIT,
1879                                        ia64_mc_info.imi_monarch_init_handler,
1880                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1881                                        ia64_mc_info.imi_monarch_init_handler_size,
1882                                        ia64_mc_info.imi_slave_init_handler,
1883                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1884                                        ia64_mc_info.imi_slave_init_handler_size)))
1885         {
1886                 printk(KERN_ERR "Failed to register m/s INIT handlers with SAL "
1887                        "(status %ld)\n", rc);
1888                 return;
1889         }
1890         if (register_die_notifier(&default_init_monarch_nb)) {
1891                 printk(KERN_ERR "Failed to register default monarch INIT process\n");
1892                 return;
1893         }
1894
1895         IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __FUNCTION__);
1896
1897         /*
1898          *  Configure the CMCI/P vector and handler. Interrupts for CMC are
1899          *  per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
1900          */
1901         register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
1902         register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
1903         ia64_mca_cmc_vector_setup();       /* Setup vector on BSP */
1904
1905         /* Setup the MCA rendezvous interrupt vector */
1906         register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
1907
1908         /* Setup the MCA wakeup interrupt vector */
1909         register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
1910
1911 #ifdef CONFIG_ACPI
1912         /* Setup the CPEI/P handler */
1913         register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
1914 #endif
1915
1916         /* Initialize the areas set aside by the OS to buffer the
1917          * platform/processor error states for MCA/INIT/CMC
1918          * handling.
1919          */
1920         ia64_log_init(SAL_INFO_TYPE_MCA);
1921         ia64_log_init(SAL_INFO_TYPE_INIT);
1922         ia64_log_init(SAL_INFO_TYPE_CMC);
1923         ia64_log_init(SAL_INFO_TYPE_CPE);
1924
1925         mca_init = 1;
1926         printk(KERN_INFO "MCA related initialization done\n");
1927 }
1928
1929 /*
1930  * ia64_mca_late_init
1931  *
1932  *      Opportunity to setup things that require initialization later
1933  *      than ia64_mca_init.  Setup a timer to poll for CPEs if the
1934  *      platform doesn't support an interrupt driven mechanism.
1935  *
1936  *  Inputs  :   None
1937  *  Outputs :   Status
1938  */
1939 static int __init
1940 ia64_mca_late_init(void)
1941 {
1942         if (!mca_init)
1943                 return 0;
1944
1945         /* Setup the CMCI/P vector and handler */
1946         init_timer(&cmc_poll_timer);
1947         cmc_poll_timer.function = ia64_mca_cmc_poll;
1948
1949         /* Unmask/enable the vector */
1950         cmc_polling_enabled = 0;
1951         schedule_work(&cmc_enable_work);
1952
1953         IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __FUNCTION__);
1954
1955 #ifdef CONFIG_ACPI
1956         /* Setup the CPEI/P vector and handler */
1957         cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
1958         init_timer(&cpe_poll_timer);
1959         cpe_poll_timer.function = ia64_mca_cpe_poll;
1960
1961         {
1962                 irq_desc_t *desc;
1963                 unsigned int irq;
1964
1965                 if (cpe_vector >= 0) {
1966                         /* If platform supports CPEI, enable the irq. */
1967                         cpe_poll_enabled = 0;
1968                         for (irq = 0; irq < NR_IRQS; ++irq)
1969                                 if (irq_to_vector(irq) == cpe_vector) {
1970                                         desc = irq_desc + irq;
1971                                         desc->status |= IRQ_PER_CPU;
1972                                         setup_irq(irq, &mca_cpe_irqaction);
1973                                         ia64_cpe_irq = irq;
1974                                 }
1975                         ia64_mca_register_cpev(cpe_vector);
1976                         IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n", __FUNCTION__);
1977                 } else {
1978                         /* If platform doesn't support CPEI, get the timer going. */
1979                         if (cpe_poll_enabled) {
1980                                 ia64_mca_cpe_poll(0UL);
1981                                 IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __FUNCTION__);
1982                         }
1983                 }
1984         }
1985 #endif
1986
1987         return 0;
1988 }
1989
1990 device_initcall(ia64_mca_late_init);