1 #ifndef _ASM_IA64_ASMMACRO_H
2 #define _ASM_IA64_ASMMACRO_H
5 * Copyright (C) 2000-2001, 2003-2004 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
15 #define ENTRY_MIN_ALIGN(name) \
20 #define GLOBAL_ENTRY(name) \
28 * Helper macros to make unwind directives more readable:
32 #define ASM_UNW_PRLG_RP 0x8
33 #define ASM_UNW_PRLG_PFS 0x4
34 #define ASM_UNW_PRLG_PSP 0x2
35 #define ASM_UNW_PRLG_PR 0x1
36 #define ASM_UNW_PRLG_GRSAVE(ninputs) (32+(ninputs))
39 * Helper macros for accessing user memory.
41 * When adding any new .section/.previous entries here, make sure to
42 * also add it to the DISCARD section in arch/ia64/kernel/gate.lds.S or
43 * unpleasant things will happen.
46 .section "__ex_table", "a" // declare section & section attributes
50 .xdata4 "__ex_table", 99f-., y-.; \
52 # define EXCLR(y,x...) \
53 .xdata4 "__ex_table", 99f-., y-.+4; \
57 * Tag MCA recoverable instruction ranges.
60 .section "__mca_table", "a" // declare section & section attributes
63 # define MCA_RECOVER_RANGE(y) \
64 .xdata4 "__mca_table", y-., 99f-.; \
68 * Mark instructions that need a load of a virtual address patched to be
69 * a load of a physical address. We use this either in critical performance
70 * path (ivt.S - TLB miss processing) or in places where it might not be
71 * safe to use a "tpa" instruction (mca_asm.S - error recovery).
73 .section ".data..patch.vtop", "a" // declare section & section attributes
76 #define LOAD_PHYSICAL(pr, reg, obj) \
77 [1:](pr)movl reg = obj; \
78 .xdata4 ".data..patch.vtop", 1b-.
81 * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it,
82 * we'll patch out the work-around bundles with NOPs, so their impact is minimal.
84 #define DO_MCKINLEY_E9_WORKAROUND
86 #ifdef DO_MCKINLEY_E9_WORKAROUND
87 .section ".data..patch.mckinley_e9", "a"
89 /* workaround for Itanium 2 Errata 9: */
90 # define FSYS_RETURN \
91 .xdata4 ".data..patch.mckinley_e9", 1f-.; \
95 br.call.sptk.many b7=2f;; \
100 br.ret.sptk.many b6;; \
103 # define FSYS_RETURN br.ret.sptk.many b6
107 * If physical stack register size is different from DEF_NUM_STACK_REG,
108 * dynamically patch the kernel for correct size.
110 .section ".data..patch.phys_stack_reg", "a"
112 #define LOAD_PHYS_STACK_REG_SIZE(reg) \
113 [1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \
114 .xdata4 ".data..patch.phys_stack_reg", 1b-.
117 * Up until early 2004, use of .align within a function caused bad unwind info.
118 * TEXT_ALIGN(n) expands into ".align n" if a fixed GAS is available or into nothing
121 #ifdef HAVE_WORKING_TEXT_ALIGN
122 # define TEXT_ALIGN(n) .align n
124 # define TEXT_ALIGN(n)
127 #ifdef HAVE_SERIALIZE_DIRECTIVE
128 # define dv_serialize_data .serialize.data
129 # define dv_serialize_instruction .serialize.instruction
131 # define dv_serialize_data
132 # define dv_serialize_instruction
135 #endif /* _ASM_IA64_ASMMACRO_H */