arch/blackfin/mach-bf537/boards/minotaur.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *           2008-2009 Cambridge Signal Processing
   4  *                2005 National ICT Australia (NICTA)
   5  *                      Aidan Williams <aidan@nicta.com.au>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  17 #include <linux/usb/isp1362.h>
  18 #endif
  19 #include <linux/ata_platform.h>
  20 #include <linux/irq.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/usb/sl811.h>
  23 #include <asm/dma.h>
  24 #include <asm/bfin5xx_spi.h>
  25 #include <asm/reboot.h>
  26 #include <linux/spi/ad7877.h>
  27
  28 /*
  29  * Name the Board for the /proc/cpuinfo
  30  */
  31 char *bfin_board_name = "CamSig Minotaur BF537";
  32
  33 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  34 static struct resource bfin_pcmcia_cf_resources[] = {
  35         {
  36                 .start = 0x20310000, /* IO PORT */
  37                 .end = 0x20312000,
  38                 .flags = IORESOURCE_MEM,
  39         }, {
  40                 .start = 0x20311000, /* Attribute Memory */
  41                 .end = 0x20311FFF,
  42                 .flags = IORESOURCE_MEM,
  43         }, {
  44                 .start = IRQ_PF4,
  45                 .end = IRQ_PF4,
  46                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  47         }, {
  48                 .start = IRQ_PF6, /* Card Detect PF6 */
  49                 .end = IRQ_PF6,
  50                 .flags = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct platform_device bfin_pcmcia_cf_device = {
  55         .name = "bfin_cf_pcmcia",
  56         .id = -1,
  57         .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  58         .resource = bfin_pcmcia_cf_resources,
  59 };
  60 #endif
  61
  62 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  63 static struct platform_device rtc_device = {
  64         .name = "rtc-bfin",
  65         .id   = -1,
  66 };
  67 #endif
  68
  69 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  70 static struct platform_device bfin_mii_bus = {
  71         .name = "bfin_mii_bus",
  72 };
  73
  74 static struct platform_device bfin_mac_device = {
  75         .name = "bfin_mac",
  76         .dev.platform_data = &bfin_mii_bus,
  77 };
  78 #endif
  79
  80 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  81 static struct resource net2272_bfin_resources[] = {
  82         {
  83                 .start = 0x20300000,
  84                 .end = 0x20300000 + 0x100,
  85                 .flags = IORESOURCE_MEM,
  86         }, {
  87                 .start = IRQ_PF7,
  88                 .end = IRQ_PF7,
  89                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  90         },
  91 };
  92
  93 static struct platform_device net2272_bfin_device = {
  94         .name = "net2272",
  95         .id = -1,
  96         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  97         .resource = net2272_bfin_resources,
  98 };
  99 #endif
 100
 101 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 102 /* all SPI peripherals info goes here */
 103
 104 #if defined(CONFIG_MTD_M25P80) \
 105         || defined(CONFIG_MTD_M25P80_MODULE)
 106
 107 /* Partition sizes */
 108 #define FLASH_SIZE       0x00400000
 109 #define PSIZE_UBOOT      0x00030000
 110 #define PSIZE_INITRAMFS  0x00240000
 111
 112 static struct mtd_partition bfin_spi_flash_partitions[] = {
 113         {
 114                 .name       = "bootloader(spi)",
 115                 .size       = PSIZE_UBOOT,
 116                 .offset     = 0x000000,
 117                 .mask_flags = MTD_CAP_ROM
 118         }, {
 119                 .name       = "initramfs(spi)",
 120                 .size       = PSIZE_INITRAMFS,
 121                 .offset     = PSIZE_UBOOT
 122         }, {
 123                 .name       = "opt(spi)",
 124                 .size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
 125                 .offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
 126         }
 127 };
 128
 129 static struct flash_platform_data bfin_spi_flash_data = {
 130         .name = "m25p80",
 131         .parts = bfin_spi_flash_partitions,
 132         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 133         .type = "m25p64",
 134 };
 135
 136 /* SPI flash chip (m25p64) */
 137 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 138         .enable_dma = 0,         /* use dma transfer with this chip*/
 139         .bits_per_word = 8,
 140 };
 141 #endif
 142
 143 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 144 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 145         .enable_dma = 0,
 146         .bits_per_word = 8,
 147 };
 148 #endif
 149
 150 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 151 #if defined(CONFIG_MTD_M25P80) \
 152         || defined(CONFIG_MTD_M25P80_MODULE)
 153         {
 154                 /* the modalias must be the same as spi device driver name */
 155                 .modalias = "m25p80", /* Name of spi_driver for this device */
 156                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 157                 .bus_num = 0, /* Framework bus number */
 158                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 159                 .platform_data = &bfin_spi_flash_data,
 160                 .controller_data = &spi_flash_chip_info,
 161                 .mode = SPI_MODE_3,
 162         },
 163 #endif
 164
 165 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 166         {
 167                 .modalias = "mmc_spi",
 168                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 169                 .bus_num = 0,
 170                 .chip_select = 5,
 171                 .controller_data = &mmc_spi_chip_info,
 172                 .mode = SPI_MODE_3,
 173         },
 174 #endif
 175 };
 176
 177 /* SPI controller data */
 178 static struct bfin5xx_spi_master bfin_spi0_info = {
 179         .num_chipselect = 8,
 180         .enable_dma = 1,  /* master has the ability to do dma transfer */
 181 };
 182
 183 /* SPI (0) */
 184 static struct resource bfin_spi0_resource[] = {
 185         [0] = {
 186                 .start = SPI0_REGBASE,
 187                 .end   = SPI0_REGBASE + 0xFF,
 188                 .flags = IORESOURCE_MEM,
 189                 },
 190         [1] = {
 191                 .start = CH_SPI,
 192                 .end   = CH_SPI,
 193                 .flags = IORESOURCE_DMA,
 194         },
 195         [2] = {
 196                 .start = IRQ_SPI,
 197                 .end   = IRQ_SPI,
 198                 .flags = IORESOURCE_IRQ,
 199         },
 200 };
 201
 202 static struct platform_device bfin_spi0_device = {
 203         .name = "bfin-spi",
 204         .id = 0, /* Bus number */
 205         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 206         .resource = bfin_spi0_resource,
 207         .dev = {
 208                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 209         },
 210 };
 211 #endif  /* spi master and devices */
 212
 213 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 214 #ifdef CONFIG_SERIAL_BFIN_UART0
 215 static struct resource bfin_uart0_resources[] = {
 216         {
 217                 .start = UART0_THR,
 218                 .end = UART0_GCTL+2,
 219                 .flags = IORESOURCE_MEM,
 220         },
 221         {
 222                 .start = IRQ_UART0_RX,
 223                 .end = IRQ_UART0_RX+1,
 224                 .flags = IORESOURCE_IRQ,
 225         },
 226         {
 227                 .start = IRQ_UART0_ERROR,
 228                 .end = IRQ_UART0_ERROR,
 229                 .flags = IORESOURCE_IRQ,
 230         },
 231         {
 232                 .start = CH_UART0_TX,
 233                 .end = CH_UART0_TX,
 234                 .flags = IORESOURCE_DMA,
 235         },
 236         {
 237                 .start = CH_UART0_RX,
 238                 .end = CH_UART0_RX,
 239                 .flags = IORESOURCE_DMA,
 240         },
 241 };
 242
 243 unsigned short bfin_uart0_peripherals[] = {
 244         P_UART0_TX, P_UART0_RX, 0
 245 };
 246
 247 static struct platform_device bfin_uart0_device = {
 248         .name = "bfin-uart",
 249         .id = 0,
 250         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 251         .resource = bfin_uart0_resources,
 252         .dev = {
 253                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 254         },
 255 };
 256 #endif
 257 #ifdef CONFIG_SERIAL_BFIN_UART1
 258 static struct resource bfin_uart1_resources[] = {
 259         {
 260                 .start = UART1_THR,
 261                 .end = UART1_GCTL+2,
 262                 .flags = IORESOURCE_MEM,
 263         },
 264         {
 265                 .start = IRQ_UART1_RX,
 266                 .end = IRQ_UART1_RX+1,
 267                 .flags = IORESOURCE_IRQ,
 268         },
 269         {
 270                 .start = IRQ_UART1_ERROR,
 271                 .end = IRQ_UART1_ERROR,
 272                 .flags = IORESOURCE_IRQ,
 273         },
 274         {
 275                 .start = CH_UART1_TX,
 276                 .end = CH_UART1_TX,
 277                 .flags = IORESOURCE_DMA,
 278         },
 279         {
 280                 .start = CH_UART1_RX,
 281                 .end = CH_UART1_RX,
 282                 .flags = IORESOURCE_DMA,
 283         },
 284 };
 285
 286 unsigned short bfin_uart1_peripherals[] = {
 287         P_UART1_TX, P_UART1_RX, 0
 288 };
 289
 290 static struct platform_device bfin_uart1_device = {
 291         .name = "bfin-uart",
 292         .id = 1,
 293         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 294         .resource = bfin_uart1_resources,
 295         .dev = {
 296                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 297         },
 298 };
 299 #endif
 300 #endif
 301
 302 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 303 #ifdef CONFIG_BFIN_SIR0
 304 static struct resource bfin_sir0_resources[] = {
 305         {
 306                 .start = 0xFFC00400,
 307                 .end = 0xFFC004FF,
 308                 .flags = IORESOURCE_MEM,
 309         },
 310         {
 311                 .start = IRQ_UART0_RX,
 312                 .end = IRQ_UART0_RX+1,
 313                 .flags = IORESOURCE_IRQ,
 314         },
 315         {
 316                 .start = CH_UART0_RX,
 317                 .end = CH_UART0_RX+1,
 318                 .flags = IORESOURCE_DMA,
 319         },
 320 };
 321
 322 static struct platform_device bfin_sir0_device = {
 323         .name = "bfin_sir",
 324         .id = 0,
 325         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 326         .resource = bfin_sir0_resources,
 327 };
 328 #endif
 329 #ifdef CONFIG_BFIN_SIR1
 330 static struct resource bfin_sir1_resources[] = {
 331         {
 332                 .start = 0xFFC02000,
 333                 .end = 0xFFC020FF,
 334                 .flags = IORESOURCE_MEM,
 335         },
 336         {
 337                 .start = IRQ_UART1_RX,
 338                 .end = IRQ_UART1_RX+1,
 339                 .flags = IORESOURCE_IRQ,
 340         },
 341         {
 342                 .start = CH_UART1_RX,
 343                 .end = CH_UART1_RX+1,
 344                 .flags = IORESOURCE_DMA,
 345         },
 346 };
 347
 348 static struct platform_device bfin_sir1_device = {
 349         .name = "bfin_sir",
 350         .id = 1,
 351         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 352         .resource = bfin_sir1_resources,
 353 };
 354 #endif
 355 #endif
 356
 357 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 358 static struct resource bfin_twi0_resource[] = {
 359         [0] = {
 360                 .start = TWI0_REGBASE,
 361                 .end   = TWI0_REGBASE + 0xFF,
 362                 .flags = IORESOURCE_MEM,
 363         },
 364         [1] = {
 365                 .start = IRQ_TWI,
 366                 .end   = IRQ_TWI,
 367                 .flags = IORESOURCE_IRQ,
 368         },
 369 };
 370
 371 static struct platform_device i2c_bfin_twi_device = {
 372         .name = "i2c-bfin-twi",
 373         .id = 0,
 374         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 375         .resource = bfin_twi0_resource,
 376 };
 377 #endif
 378
 379 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 380 static struct platform_device bfin_sport0_uart_device = {
 381         .name = "bfin-sport-uart",
 382         .id = 0,
 383 };
 384
 385 static struct platform_device bfin_sport1_uart_device = {
 386         .name = "bfin-sport-uart",
 387         .id = 1,
 388 };
 389 #endif
 390
 391 static struct platform_device *minotaur_devices[] __initdata = {
 392 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 393         &bfin_pcmcia_cf_device,
 394 #endif
 395
 396 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 397         &rtc_device,
 398 #endif
 399
 400 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 401         &bfin_mii_bus,
 402         &bfin_mac_device,
 403 #endif
 404
 405 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 406         &net2272_bfin_device,
 407 #endif
 408
 409 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 410         &bfin_spi0_device,
 411 #endif
 412
 413 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 414 #ifdef CONFIG_SERIAL_BFIN_UART0
 415         &bfin_uart0_device,
 416 #endif
 417 #ifdef CONFIG_SERIAL_BFIN_UART1
 418         &bfin_uart1_device,
 419 #endif
 420 #endif
 421
 422 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 423 #ifdef CONFIG_BFIN_SIR0
 424         &bfin_sir0_device,
 425 #endif
 426 #ifdef CONFIG_BFIN_SIR1
 427         &bfin_sir1_device,
 428 #endif
 429 #endif
 430
 431 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 432         &i2c_bfin_twi_device,
 433 #endif
 434
 435 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 436         &bfin_sport0_uart_device,
 437         &bfin_sport1_uart_device,
 438 #endif
 439
 440 };
 441
 442 static int __init minotaur_init(void)
 443 {
 444         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 445         platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
 446 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 447         spi_register_board_info(bfin_spi_board_info,
 448                                 ARRAY_SIZE(bfin_spi_board_info));
 449 #endif
 450
 451         return 0;
 452 }
 453
 454 arch_initcall(minotaur_init);
 455
 456 void native_machine_restart(char *cmd)
 457 {
 458         /* workaround reboot hang when booting from SPI */
 459         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 460                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 461 }