arch/blackfin/mach-bf537/boards/dnp5370.c

   1 /*
   2  * This is the configuration for SSV Dil/NetPC DNP/5370 board.
   3  *
   4  * DIL module:         http://www.dilnetpc.com/dnp0086.htm
   5  * SK28 (starter kit): http://www.dilnetpc.com/dnp0088.htm
   6  *
   7  * Copyright 2010 3ality Digital Systems
   8  * Copyright 2005 National ICT Australia (NICTA)
   9  * Copyright 2004-2006 Analog Devices Inc.
  10  *
  11  * Licensed under the GPL-2 or later.
  12  */
  13
  14 #include <linux/device.h>
  15 #include <linux/kernel.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/io.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/mtd/plat-ram.h>
  22 #include <linux/mtd/physmap.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/spi/flash.h>
  25 #include <linux/irq.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/i2c.h>
  28 #include <linux/spi/mmc_spi.h>
  29 #include <linux/phy.h>
  30 #include <asm/dma.h>
  31 #include <asm/bfin5xx_spi.h>
  32 #include <asm/reboot.h>
  33 #include <asm/portmux.h>
  34 #include <asm/dpmc.h>
  35
  36 /*
  37  * Name the Board for the /proc/cpuinfo
  38  */
  39 const char bfin_board_name[] = "DNP/5370";
  40 #define FLASH_MAC               0x202f0000
  41 #define CONFIG_MTD_PHYSMAP_LEN  0x300000
  42
  43 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  44 static struct platform_device rtc_device = {
  45         .name = "rtc-bfin",
  46         .id   = -1,
  47 };
  48 #endif
  49
  50 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  51 #include <linux/bfin_mac.h>
  52 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  53
  54 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  55         {
  56                 .addr = 1,
  57                 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  58         },
  59 };
  60
  61 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  62         .phydev_number   = 1,
  63         .phydev_data     = bfin_phydev_data,
  64         .phy_mode        = PHY_INTERFACE_MODE_RMII,
  65         .mac_peripherals = bfin_mac_peripherals,
  66 };
  67
  68 static struct platform_device bfin_mii_bus = {
  69         .name = "bfin_mii_bus",
  70         .dev = {
  71                 .platform_data = &bfin_mii_bus_data,
  72         }
  73 };
  74
  75 static struct platform_device bfin_mac_device = {
  76         .name = "bfin_mac",
  77         .dev = {
  78                 .platform_data = &bfin_mii_bus,
  79         }
  80 };
  81 #endif
  82
  83 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  84 static struct mtd_partition asmb_flash_partitions[] = {
  85         {
  86                 .name       = "bootloader(nor)",
  87                 .size       = 0x30000,
  88                 .offset     = 0,
  89         }, {
  90                 .name       = "linux kernel and rootfs(nor)",
  91                 .size       = 0x300000 - 0x30000 - 0x10000,
  92                 .offset     = MTDPART_OFS_APPEND,
  93         }, {
  94                 .name       = "MAC address(nor)",
  95                 .size       = 0x10000,
  96                 .offset     = MTDPART_OFS_APPEND,
  97                 .mask_flags = MTD_WRITEABLE,
  98         }
  99 };
 100
 101 static struct physmap_flash_data asmb_flash_data = {
 102         .width      = 1,
 103         .parts      = asmb_flash_partitions,
 104         .nr_parts   = ARRAY_SIZE(asmb_flash_partitions),
 105 };
 106
 107 static struct resource asmb_flash_resource = {
 108         .start = 0x20000000,
 109         .end   = 0x202fffff,
 110         .flags = IORESOURCE_MEM,
 111 };
 112
 113 /* 4 MB NOR flash attached to async memory banks 0-2,
 114  * therefore only 3 MB visible.
 115  */
 116 static struct platform_device asmb_flash_device = {
 117         .name     = "physmap-flash",
 118         .id       = 0,
 119         .dev = {
 120                 .platform_data = &asmb_flash_data,
 121         },
 122         .num_resources = 1,
 123         .resource      = &asmb_flash_resource,
 124 };
 125 #endif
 126
 127 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 128
 129 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 130
 131 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 132         .enable_dma    = 0,      /* use no dma transfer with this chip*/
 133         .bits_per_word = 8,
 134 };
 135
 136 #endif
 137
 138 #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
 139 /* This mapping is for at45db642 it has 1056 page size,
 140  * partition size and offset should be page aligned
 141  */
 142 static struct mtd_partition bfin_spi_dataflash_partitions[] = {
 143         {
 144                 .name   = "JFFS2 dataflash(nor)",
 145 #ifdef CONFIG_MTD_PAGESIZE_1024
 146                 .offset = 0x40000,
 147                 .size   = 0x7C0000,
 148 #else
 149                 .offset = 0x0,
 150                 .size   = 0x840000,
 151 #endif
 152         }
 153 };
 154
 155 static struct flash_platform_data bfin_spi_dataflash_data = {
 156         .name     = "mtd_dataflash",
 157         .parts    = bfin_spi_dataflash_partitions,
 158         .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
 159         .type     = "mtd_dataflash",
 160 };
 161
 162 static struct bfin5xx_spi_chip spi_dataflash_chip_info = {
 163         .enable_dma    = 0,      /* use no dma transfer with this chip*/
 164         .bits_per_word = 8,
 165 };
 166 #endif
 167
 168 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 169 /* SD/MMC card reader at SPI bus */
 170 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 171         {
 172                 .modalias        = "mmc_spi",
 173                 .max_speed_hz    = 20000000,
 174                 .bus_num         = 0,
 175                 .chip_select     = 1,
 176                 .controller_data = &mmc_spi_chip_info,
 177                 .mode            = SPI_MODE_3,
 178         },
 179 #endif
 180
 181 /* 8 Megabyte Atmel NOR flash chip at SPI bus */
 182 #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
 183         {
 184         .modalias        = "mtd_dataflash",
 185         .max_speed_hz    = 16700000,
 186         .bus_num         = 0,
 187         .chip_select     = 2,
 188         .platform_data   = &bfin_spi_dataflash_data,
 189         .controller_data = &spi_dataflash_chip_info,
 190         .mode            = SPI_MODE_3, /* SPI_CPHA and SPI_CPOL */
 191         },
 192 #endif
 193 };
 194
 195 /* SPI controller data */
 196 /* SPI (0) */
 197 static struct resource bfin_spi0_resource[] = {
 198         [0] = {
 199                 .start = SPI0_REGBASE,
 200                 .end   = SPI0_REGBASE + 0xFF,
 201                 .flags = IORESOURCE_MEM,
 202         },
 203         [1] = {
 204                 .start = CH_SPI,
 205                 .end   = CH_SPI,
 206                 .flags = IORESOURCE_DMA,
 207         },
 208         [2] = {
 209                 .start = IRQ_SPI,
 210                 .end   = IRQ_SPI,
 211                 .flags = IORESOURCE_IRQ,
 212         },
 213 };
 214
 215 static struct bfin5xx_spi_master spi_bfin_master_info = {
 216         .num_chipselect = 8,
 217         .enable_dma     = 1,  /* master has the ability to do dma transfer */
 218         .pin_req        = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 219 };
 220
 221 static struct platform_device spi_bfin_master_device = {
 222         .name          = "bfin-spi",
 223         .id            = 0, /* Bus number */
 224         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 225         .resource      = bfin_spi0_resource,
 226         .dev           = {
 227                 .platform_data = &spi_bfin_master_info, /* Passed to driver */
 228         },
 229 };
 230 #endif
 231
 232 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 233 #ifdef CONFIG_SERIAL_BFIN_UART0
 234 static struct resource bfin_uart0_resources[] = {
 235         {
 236                 .start = UART0_THR,
 237                 .end = UART0_GCTL+2,
 238                 .flags = IORESOURCE_MEM,
 239         },
 240         {
 241                 .start = IRQ_UART0_RX,
 242                 .end = IRQ_UART0_RX+1,
 243                 .flags = IORESOURCE_IRQ,
 244         },
 245         {
 246                 .start = IRQ_UART0_ERROR,
 247                 .end = IRQ_UART0_ERROR,
 248                 .flags = IORESOURCE_IRQ,
 249         },
 250         {
 251                 .start = CH_UART0_TX,
 252                 .end = CH_UART0_TX,
 253                 .flags = IORESOURCE_DMA,
 254         },
 255         {
 256                 .start = CH_UART0_RX,
 257                 .end = CH_UART0_RX,
 258                 .flags = IORESOURCE_DMA,
 259         },
 260 };
 261
 262 static unsigned short bfin_uart0_peripherals[] = {
 263         P_UART0_TX, P_UART0_RX, 0
 264 };
 265
 266 static struct platform_device bfin_uart0_device = {
 267         .name = "bfin-uart",
 268         .id = 0,
 269         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 270         .resource = bfin_uart0_resources,
 271         .dev = {
 272                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 273         },
 274 };
 275 #endif
 276
 277 #ifdef CONFIG_SERIAL_BFIN_UART1
 278 static struct resource bfin_uart1_resources[] = {
 279         {
 280                 .start = UART1_THR,
 281                 .end   = UART1_GCTL+2,
 282                 .flags = IORESOURCE_MEM,
 283         },
 284         {
 285                 .start = IRQ_UART1_RX,
 286                 .end   = IRQ_UART1_RX+1,
 287                 .flags = IORESOURCE_IRQ,
 288         },
 289         {
 290                 .start = IRQ_UART1_ERROR,
 291                 .end   = IRQ_UART1_ERROR,
 292                 .flags = IORESOURCE_IRQ,
 293         },
 294         {
 295                 .start = CH_UART1_TX,
 296                 .end   = CH_UART1_TX,
 297                 .flags = IORESOURCE_DMA,
 298         },
 299         {
 300                 .start = CH_UART1_RX,
 301                 .end   = CH_UART1_RX,
 302                 .flags = IORESOURCE_DMA,
 303         },
 304 };
 305
 306 static unsigned short bfin_uart1_peripherals[] = {
 307         P_UART1_TX, P_UART1_RX, 0
 308 };
 309
 310 static struct platform_device bfin_uart1_device = {
 311         .name          = "bfin-uart",
 312         .id            = 1,
 313         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 314         .resource      = bfin_uart1_resources,
 315         .dev = {
 316                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 317         },
 318 };
 319 #endif
 320 #endif
 321
 322 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 323 static struct resource bfin_twi0_resource[] = {
 324         [0] = {
 325                 .start = TWI0_REGBASE,
 326                 .end   = TWI0_REGBASE + 0xff,
 327                 .flags = IORESOURCE_MEM,
 328         },
 329         [1] = {
 330                 .start = IRQ_TWI,
 331                 .end   = IRQ_TWI,
 332                 .flags = IORESOURCE_IRQ,
 333         },
 334 };
 335
 336 static struct platform_device i2c_bfin_twi_device = {
 337         .name          = "i2c-bfin-twi",
 338         .id            = 0,
 339         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 340         .resource      = bfin_twi0_resource,
 341 };
 342 #endif
 343
 344 static struct platform_device *dnp5370_devices[] __initdata = {
 345
 346 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 347 #ifdef CONFIG_SERIAL_BFIN_UART0
 348         &bfin_uart0_device,
 349 #endif
 350 #ifdef CONFIG_SERIAL_BFIN_UART1
 351         &bfin_uart1_device,
 352 #endif
 353 #endif
 354
 355 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 356         &asmb_flash_device,
 357 #endif
 358
 359 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 360         &bfin_mii_bus,
 361         &bfin_mac_device,
 362 #endif
 363
 364 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 365         &spi_bfin_master_device,
 366 #endif
 367
 368 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 369         &i2c_bfin_twi_device,
 370 #endif
 371
 372 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 373         &rtc_device,
 374 #endif
 375
 376 };
 377
 378 static int __init dnp5370_init(void)
 379 {
 380         printk(KERN_INFO "DNP/5370: registering device resources\n");
 381         platform_add_devices(dnp5370_devices, ARRAY_SIZE(dnp5370_devices));
 382         printk(KERN_INFO "DNP/5370: registering %zu SPI slave devices\n",
 383                ARRAY_SIZE(bfin_spi_board_info));
 384         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 385         printk(KERN_INFO "DNP/5370: MAC %pM\n", (void *)FLASH_MAC);
 386         return 0;
 387 }
 388 arch_initcall(dnp5370_init);
 389
 390 /*
 391  * Currently the MAC address is saved in Flash by U-Boot
 392  */
 393 void bfin_get_ether_addr(char *addr)
 394 {
 395         *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
 396         *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
 397 }
 398 EXPORT_SYMBOL(bfin_get_ether_addr);