2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
7 * Licensed under the GPL-2 or later.
10 #include <linux/device.h>
11 #include <linux/etherdevice.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/mtd/physmap.h>
16 #include <linux/spi/spi.h>
17 #include <linux/spi/flash.h>
18 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
19 #include <linux/usb/isp1362.h>
21 #include <linux/ata_platform.h>
22 #include <linux/irq.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/portmux.h>
29 * Name the Board for the /proc/cpuinfo
31 const char bfin_board_name[] = "Bluetechnix CM BF537E";
33 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
34 /* all SPI peripherals info goes here */
36 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
37 static struct mtd_partition bfin_spi_flash_partitions[] = {
39 .name = "bootloader(spi)",
42 .mask_flags = MTD_CAP_ROM
44 .name = "linux kernel(spi)",
48 .name = "file system(spi)",
54 static struct flash_platform_data bfin_spi_flash_data = {
56 .parts = bfin_spi_flash_partitions,
57 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
61 /* SPI flash chip (m25p64) */
62 static struct bfin5xx_spi_chip spi_flash_chip_info = {
63 .enable_dma = 0, /* use dma transfer with this chip*/
68 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
70 static struct bfin5xx_spi_chip spi_adc_chip_info = {
71 .enable_dma = 1, /* use dma transfer with this chip*/
76 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
77 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
83 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
84 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
90 static struct spi_board_info bfin_spi_board_info[] __initdata = {
91 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
93 /* the modalias must be the same as spi device driver name */
94 .modalias = "m25p80", /* Name of spi_driver for this device */
95 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
96 .bus_num = 0, /* Framework bus number */
97 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
98 .platform_data = &bfin_spi_flash_data,
99 .controller_data = &spi_flash_chip_info,
104 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
106 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
107 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
108 .bus_num = 0, /* Framework bus number */
109 .chip_select = 1, /* Framework chip select. */
110 .platform_data = NULL, /* No spi_driver specific config */
111 .controller_data = &spi_adc_chip_info,
115 #if defined(CONFIG_SND_BLACKFIN_AD183X) || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
117 .modalias = "ad1836",
118 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
120 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
121 .controller_data = &ad1836_spi_chip_info,
125 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
127 .modalias = "mmc_spi",
128 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
131 .controller_data = &mmc_spi_chip_info,
138 static struct resource bfin_spi0_resource[] = {
140 .start = SPI0_REGBASE,
141 .end = SPI0_REGBASE + 0xFF,
142 .flags = IORESOURCE_MEM,
147 .flags = IORESOURCE_DMA,
152 .flags = IORESOURCE_IRQ,
156 /* SPI controller data */
157 static struct bfin5xx_spi_master bfin_spi0_info = {
159 .enable_dma = 1, /* master has the ability to do dma transfer */
160 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
163 static struct platform_device bfin_spi0_device = {
165 .id = 0, /* Bus number */
166 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
167 .resource = bfin_spi0_resource,
169 .platform_data = &bfin_spi0_info, /* Passed to driver */
172 #endif /* spi master and devices */
174 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
175 static struct platform_device rtc_device = {
181 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
182 static struct platform_device hitachi_fb_device = {
183 .name = "hitachi-tx09",
187 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
188 #include <linux/smc91x.h>
190 static struct smc91x_platdata smc91x_info = {
191 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
192 .leda = RPC_LED_100_10,
193 .ledb = RPC_LED_TX_RX,
196 static struct resource smc91x_resources[] = {
199 .end = 0x20200300 + 16,
200 .flags = IORESOURCE_MEM,
204 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
208 static struct platform_device smc91x_device = {
211 .num_resources = ARRAY_SIZE(smc91x_resources),
212 .resource = smc91x_resources,
214 .platform_data = &smc91x_info,
219 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
220 static struct resource isp1362_hcd_resources[] = {
224 .flags = IORESOURCE_MEM,
228 .flags = IORESOURCE_MEM,
232 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
236 static struct isp1362_platform_data isp1362_priv = {
241 .int_edge_triggered = 0,
242 .remote_wakeup_connected = 0,
243 .no_power_switching = 1,
244 .power_switching_mode = 0,
247 static struct platform_device isp1362_hcd_device = {
248 .name = "isp1362-hcd",
251 .platform_data = &isp1362_priv,
253 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
254 .resource = isp1362_hcd_resources,
258 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
259 static struct resource net2272_bfin_resources[] = {
262 .end = 0x20300000 + 0x100,
263 .flags = IORESOURCE_MEM,
267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
271 static struct platform_device net2272_bfin_device = {
274 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
275 .resource = net2272_bfin_resources,
279 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
280 static struct mtd_partition cm_partitions[] = {
282 .name = "bootloader(nor)",
286 .name = "linux kernel(nor)",
288 .offset = MTDPART_OFS_APPEND,
290 .name = "file system(nor)",
291 .size = MTDPART_SIZ_FULL,
292 .offset = MTDPART_OFS_APPEND,
296 static struct physmap_flash_data cm_flash_data = {
298 .parts = cm_partitions,
299 .nr_parts = ARRAY_SIZE(cm_partitions),
302 static unsigned cm_flash_gpios[] = { GPIO_PF4 };
304 static struct resource cm_flash_resource[] = {
309 .flags = IORESOURCE_MEM,
311 .start = (unsigned long)cm_flash_gpios,
312 .end = ARRAY_SIZE(cm_flash_gpios),
313 .flags = IORESOURCE_IRQ,
317 static struct platform_device cm_flash_device = {
318 .name = "gpio-addr-flash",
321 .platform_data = &cm_flash_data,
323 .num_resources = ARRAY_SIZE(cm_flash_resource),
324 .resource = cm_flash_resource,
328 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
329 #ifdef CONFIG_SERIAL_BFIN_UART0
330 static struct resource bfin_uart0_resources[] = {
334 .flags = IORESOURCE_MEM,
337 .start = IRQ_UART0_RX,
338 .end = IRQ_UART0_RX+1,
339 .flags = IORESOURCE_IRQ,
342 .start = IRQ_UART0_ERROR,
343 .end = IRQ_UART0_ERROR,
344 .flags = IORESOURCE_IRQ,
347 .start = CH_UART0_TX,
349 .flags = IORESOURCE_DMA,
352 .start = CH_UART0_RX,
354 .flags = IORESOURCE_DMA,
356 #ifdef CONFIG_BFIN_UART0_CTSRTS
359 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
363 .flags = IORESOURCE_IO,
367 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
371 .flags = IORESOURCE_IO,
376 unsigned short bfin_uart0_peripherals[] = {
377 P_UART0_TX, P_UART0_RX, 0
380 static struct platform_device bfin_uart0_device = {
383 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
384 .resource = bfin_uart0_resources,
386 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
390 #ifdef CONFIG_SERIAL_BFIN_UART1
391 static struct resource bfin_uart1_resources[] = {
395 .flags = IORESOURCE_MEM,
398 .start = IRQ_UART1_RX,
399 .end = IRQ_UART1_RX+1,
400 .flags = IORESOURCE_IRQ,
403 .start = IRQ_UART1_ERROR,
404 .end = IRQ_UART1_ERROR,
405 .flags = IORESOURCE_IRQ,
408 .start = CH_UART1_TX,
410 .flags = IORESOURCE_DMA,
413 .start = CH_UART1_RX,
415 .flags = IORESOURCE_DMA,
417 #ifdef CONFIG_BFIN_UART1_CTSRTS
420 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
424 .flags = IORESOURCE_IO,
428 * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
432 .flags = IORESOURCE_IO,
437 unsigned short bfin_uart1_peripherals[] = {
438 P_UART1_TX, P_UART1_RX, 0
441 static struct platform_device bfin_uart1_device = {
444 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
445 .resource = bfin_uart1_resources,
447 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
453 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
454 #ifdef CONFIG_BFIN_SIR0
455 static struct resource bfin_sir0_resources[] = {
459 .flags = IORESOURCE_MEM,
462 .start = IRQ_UART0_RX,
463 .end = IRQ_UART0_RX+1,
464 .flags = IORESOURCE_IRQ,
467 .start = CH_UART0_RX,
468 .end = CH_UART0_RX+1,
469 .flags = IORESOURCE_DMA,
472 static struct platform_device bfin_sir0_device = {
475 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
476 .resource = bfin_sir0_resources,
479 #ifdef CONFIG_BFIN_SIR1
480 static struct resource bfin_sir1_resources[] = {
484 .flags = IORESOURCE_MEM,
487 .start = IRQ_UART1_RX,
488 .end = IRQ_UART1_RX+1,
489 .flags = IORESOURCE_IRQ,
492 .start = CH_UART1_RX,
493 .end = CH_UART1_RX+1,
494 .flags = IORESOURCE_DMA,
497 static struct platform_device bfin_sir1_device = {
500 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
501 .resource = bfin_sir1_resources,
506 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
507 static struct resource bfin_twi0_resource[] = {
509 .start = TWI0_REGBASE,
511 .flags = IORESOURCE_MEM,
516 .flags = IORESOURCE_IRQ,
520 static struct platform_device i2c_bfin_twi_device = {
521 .name = "i2c-bfin-twi",
523 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
524 .resource = bfin_twi0_resource,
528 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
529 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
530 static struct resource bfin_sport0_uart_resources[] = {
532 .start = SPORT0_TCR1,
533 .end = SPORT0_MRCS3+4,
534 .flags = IORESOURCE_MEM,
537 .start = IRQ_SPORT0_RX,
538 .end = IRQ_SPORT0_RX+1,
539 .flags = IORESOURCE_IRQ,
542 .start = IRQ_SPORT0_ERROR,
543 .end = IRQ_SPORT0_ERROR,
544 .flags = IORESOURCE_IRQ,
548 unsigned short bfin_sport0_peripherals[] = {
549 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
550 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
553 static struct platform_device bfin_sport0_uart_device = {
554 .name = "bfin-sport-uart",
556 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
557 .resource = bfin_sport0_uart_resources,
559 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
563 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
564 static struct resource bfin_sport1_uart_resources[] = {
566 .start = SPORT1_TCR1,
567 .end = SPORT1_MRCS3+4,
568 .flags = IORESOURCE_MEM,
571 .start = IRQ_SPORT1_RX,
572 .end = IRQ_SPORT1_RX+1,
573 .flags = IORESOURCE_IRQ,
576 .start = IRQ_SPORT1_ERROR,
577 .end = IRQ_SPORT1_ERROR,
578 .flags = IORESOURCE_IRQ,
582 unsigned short bfin_sport1_peripherals[] = {
583 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
584 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
587 static struct platform_device bfin_sport1_uart_device = {
588 .name = "bfin-sport-uart",
590 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
591 .resource = bfin_sport1_uart_resources,
593 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
599 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
600 static struct platform_device bfin_mii_bus = {
601 .name = "bfin_mii_bus",
604 static struct platform_device bfin_mac_device = {
606 .dev.platform_data = &bfin_mii_bus,
610 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
611 #define PATA_INT IRQ_PF14
613 static struct pata_platform_info bfin_pata_platform_data = {
615 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
618 static struct resource bfin_pata_resources[] = {
622 .flags = IORESOURCE_MEM,
627 .flags = IORESOURCE_MEM,
632 .flags = IORESOURCE_IRQ,
636 static struct platform_device bfin_pata_device = {
637 .name = "pata_platform",
639 .num_resources = ARRAY_SIZE(bfin_pata_resources),
640 .resource = bfin_pata_resources,
642 .platform_data = &bfin_pata_platform_data,
647 static const unsigned int cclk_vlev_datasheet[] =
649 VRPAIR(VLEV_085, 250000000),
650 VRPAIR(VLEV_090, 376000000),
651 VRPAIR(VLEV_095, 426000000),
652 VRPAIR(VLEV_100, 426000000),
653 VRPAIR(VLEV_105, 476000000),
654 VRPAIR(VLEV_110, 476000000),
655 VRPAIR(VLEV_115, 476000000),
656 VRPAIR(VLEV_120, 500000000),
657 VRPAIR(VLEV_125, 533000000),
658 VRPAIR(VLEV_130, 600000000),
661 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
662 .tuple_tab = cclk_vlev_datasheet,
663 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
664 .vr_settling_time = 25 /* us */,
667 static struct platform_device bfin_dpmc = {
670 .platform_data = &bfin_dmpc_vreg_data,
674 static struct platform_device *cm_bf537e_devices[] __initdata = {
678 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
682 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
686 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
687 #ifdef CONFIG_SERIAL_BFIN_UART0
690 #ifdef CONFIG_SERIAL_BFIN_UART1
695 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
696 #ifdef CONFIG_BFIN_SIR0
699 #ifdef CONFIG_BFIN_SIR1
704 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
705 &i2c_bfin_twi_device,
708 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
709 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
710 &bfin_sport0_uart_device,
712 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
713 &bfin_sport1_uart_device,
717 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
721 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
725 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
730 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
731 &net2272_bfin_device,
734 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
738 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
742 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
747 static int __init cm_bf537e_init(void)
749 printk(KERN_INFO "%s(): registering device resources\n", __func__);
750 platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
751 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
752 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
755 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
756 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
761 arch_initcall(cm_bf537e_init);
763 static struct platform_device *cm_bf537e_early_devices[] __initdata = {
764 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
765 #ifdef CONFIG_SERIAL_BFIN_UART0
768 #ifdef CONFIG_SERIAL_BFIN_UART1
773 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
774 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
775 &bfin_sport0_uart_device,
777 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
778 &bfin_sport1_uart_device,
783 void __init native_machine_early_platform_add_devices(void)
785 printk(KERN_INFO "register early platform devices\n");
786 early_platform_add_devices(cm_bf537e_early_devices,
787 ARRAY_SIZE(cm_bf537e_early_devices));
790 void bfin_get_ether_addr(char *addr)
792 random_ether_addr(addr);
793 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
795 EXPORT_SYMBOL(bfin_get_ether_addr);