2 * simple DMA Implementation for Blackfin
4 * Copyright 2007-2009 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
9 #include <linux/module.h>
11 #include <asm/blackfin.h>
14 struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = {
15 (struct dma_register *) DMA0_NEXT_DESC_PTR,
16 (struct dma_register *) DMA1_NEXT_DESC_PTR,
17 (struct dma_register *) DMA2_NEXT_DESC_PTR,
18 (struct dma_register *) DMA3_NEXT_DESC_PTR,
19 (struct dma_register *) DMA4_NEXT_DESC_PTR,
20 (struct dma_register *) DMA5_NEXT_DESC_PTR,
21 (struct dma_register *) DMA6_NEXT_DESC_PTR,
22 (struct dma_register *) DMA7_NEXT_DESC_PTR,
23 (struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
24 (struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
25 (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
26 (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
28 EXPORT_SYMBOL(dma_io_base_addr);
30 int channel2irq(unsigned int channel)
40 ret_irq = IRQ_SPORT0_RX;
44 ret_irq = IRQ_SPORT0_TX;
48 ret_irq = IRQ_SPORT1_RX;
52 ret_irq = IRQ_SPORT1_TX;
60 ret_irq = IRQ_UART0_RX;
64 ret_irq = IRQ_UART0_TX;
67 case CH_MEM_STREAM0_SRC:
68 case CH_MEM_STREAM0_DEST:
69 ret_irq = IRQ_MEM_DMA0;
72 case CH_MEM_STREAM1_SRC:
73 case CH_MEM_STREAM1_DEST:
74 ret_irq = IRQ_MEM_DMA1;