arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/nand.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF526-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  39 static struct resource musb_resources[] = {
  40         [0] = {
  41                 .start  = 0xffc03800,
  42                 .end    = 0xffc03cff,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = { /* general IRQ */
  46                 .start  = IRQ_USB_INT0,
  47                 .end    = IRQ_USB_INT0,
  48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  49         },
  50         [2] = { /* DMA IRQ */
  51                 .start  = IRQ_USB_DMA,
  52                 .end    = IRQ_USB_DMA,
  53                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  54         },
  55 };
  56
  57 static struct musb_hdrc_config musb_config = {
  58         .multipoint     = 0,
  59         .dyn_fifo       = 0,
  60         .soft_con       = 1,
  61         .dma            = 1,
  62         .num_eps        = 8,
  63         .dma_channels   = 8,
  64         .gpio_vrsel     = GPIO_PG13,
  65         /* Some custom boards need to be active low, just set it to "0"
  66          * if it is the case.
  67          */
  68         .gpio_vrsel_active      = 1,
  69 };
  70
  71 static struct musb_hdrc_platform_data musb_plat = {
  72 #if defined(CONFIG_USB_MUSB_OTG)
  73         .mode           = MUSB_OTG,
  74 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  75         .mode           = MUSB_HOST,
  76 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  77         .mode           = MUSB_PERIPHERAL,
  78 #endif
  79         .config         = &musb_config,
  80 };
  81
  82 static u64 musb_dmamask = ~(u32)0;
  83
  84 static struct platform_device musb_device = {
  85         .name           = "musb_hdrc",
  86         .id             = 0,
  87         .dev = {
  88                 .dma_mask               = &musb_dmamask,
  89                 .coherent_dma_mask      = 0xffffffff,
  90                 .platform_data          = &musb_plat,
  91         },
  92         .num_resources  = ARRAY_SIZE(musb_resources),
  93         .resource       = musb_resources,
  94 };
  95 #endif
  96
  97 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  98 static struct mtd_partition ezbrd_partitions[] = {
  99         {
 100                 .name       = "bootloader(nor)",
 101                 .size       = 0x40000,
 102                 .offset     = 0,
 103         }, {
 104                 .name       = "linux kernel(nor)",
 105                 .size       = 0x1C0000,
 106                 .offset     = MTDPART_OFS_APPEND,
 107         }, {
 108                 .name       = "file system(nor)",
 109                 .size       = MTDPART_SIZ_FULL,
 110                 .offset     = MTDPART_OFS_APPEND,
 111         }
 112 };
 113
 114 static struct physmap_flash_data ezbrd_flash_data = {
 115         .width      = 2,
 116         .parts      = ezbrd_partitions,
 117         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 118 };
 119
 120 static struct resource ezbrd_flash_resource = {
 121         .start = 0x20000000,
 122         .end   = 0x203fffff,
 123         .flags = IORESOURCE_MEM,
 124 };
 125
 126 static struct platform_device ezbrd_flash_device = {
 127         .name          = "physmap-flash",
 128         .id            = 0,
 129         .dev = {
 130                 .platform_data = &ezbrd_flash_data,
 131         },
 132         .num_resources = 1,
 133         .resource      = &ezbrd_flash_resource,
 134 };
 135 #endif
 136
 137 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 138 static struct mtd_partition partition_info[] = {
 139         {
 140                 .name = "linux kernel(nand)",
 141                 .offset = 0,
 142                 .size = 4 * 1024 * 1024,
 143         },
 144         {
 145                 .name = "file system(nand)",
 146                 .offset = MTDPART_OFS_APPEND,
 147                 .size = MTDPART_SIZ_FULL,
 148         },
 149 };
 150
 151 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 152         .data_width = NFC_NWIDTH_8,
 153         .partitions = partition_info,
 154         .nr_partitions = ARRAY_SIZE(partition_info),
 155         .rd_dly = 3,
 156         .wr_dly = 3,
 157 };
 158
 159 static struct resource bf5xx_nand_resources[] = {
 160         {
 161                 .start = NFC_CTL,
 162                 .end = NFC_DATA_RD + 2,
 163                 .flags = IORESOURCE_MEM,
 164         },
 165         {
 166                 .start = CH_NFC,
 167                 .end = CH_NFC,
 168                 .flags = IORESOURCE_IRQ,
 169         },
 170 };
 171
 172 static struct platform_device bf5xx_nand_device = {
 173         .name = "bf5xx-nand",
 174         .id = 0,
 175         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 176         .resource = bf5xx_nand_resources,
 177         .dev = {
 178                 .platform_data = &bf5xx_nand_platform,
 179         },
 180 };
 181 #endif
 182
 183 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 184 static struct platform_device rtc_device = {
 185         .name = "rtc-bfin",
 186         .id   = -1,
 187 };
 188 #endif
 189
 190
 191 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 192 static struct platform_device bfin_mii_bus = {
 193         .name = "bfin_mii_bus",
 194 };
 195
 196 static struct platform_device bfin_mac_device = {
 197         .name = "bfin_mac",
 198         .dev.platform_data = &bfin_mii_bus,
 199 };
 200 #endif
 201
 202 #if defined(CONFIG_MTD_M25P80) \
 203         || defined(CONFIG_MTD_M25P80_MODULE)
 204 static struct mtd_partition bfin_spi_flash_partitions[] = {
 205         {
 206                 .name = "bootloader(spi)",
 207                 .size = 0x00040000,
 208                 .offset = 0,
 209                 .mask_flags = MTD_CAP_ROM
 210         }, {
 211                 .name = "linux kernel(spi)",
 212                 .size = MTDPART_SIZ_FULL,
 213                 .offset = MTDPART_OFS_APPEND,
 214         }
 215 };
 216
 217 static struct flash_platform_data bfin_spi_flash_data = {
 218         .name = "m25p80",
 219         .parts = bfin_spi_flash_partitions,
 220         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 221         .type = "sst25wf040",
 222 };
 223
 224 /* SPI flash chip (sst25wf040) */
 225 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 226         .enable_dma = 0,         /* use dma transfer with this chip*/
 227         .bits_per_word = 8,
 228 };
 229 #endif
 230
 231 #if defined(CONFIG_BFIN_SPI_ADC) \
 232         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 233 /* SPI ADC chip */
 234 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 235         .enable_dma = 1,         /* use dma transfer with this chip*/
 236         .bits_per_word = 16,
 237 };
 238 #endif
 239
 240 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 241 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 242         .enable_dma = 0,
 243         .bits_per_word = 8,
 244 };
 245 #endif
 246
 247 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 248 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 249         .enable_dma = 0,
 250         .bits_per_word = 16,
 251 };
 252
 253 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 254         .model                  = 7877,
 255         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 256         .x_plate_ohms           = 419,
 257         .y_plate_ohms           = 486,
 258         .pressure_max           = 1000,
 259         .pressure_min           = 0,
 260         .stopacq_polarity       = 1,
 261         .first_conversion_delay = 3,
 262         .acquisition_time       = 1,
 263         .averaging              = 1,
 264         .pen_down_acc_interval  = 1,
 265 };
 266 #endif
 267
 268 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 269 #include <linux/spi/ad7879.h>
 270 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 271         .model                  = 7879, /* Model = AD7879 */
 272         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 273         .pressure_max           = 10000,
 274         .pressure_min           = 0,
 275         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 276         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 277         .median                 = 2,    /* do 8 measurements */
 278         .averaging              = 1,    /* take the average of 4 middle samples */
 279         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 280         .gpio_export            = 1,    /* Export GPIO to gpiolib */
 281         .gpio_base              = -1,   /* Dynamic allocation */
 282 };
 283 #endif
 284
 285 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 286 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 287         .enable_dma = 0,
 288         .bits_per_word = 16,
 289 };
 290 #endif
 291
 292 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 293          && defined(CONFIG_SND_SOC_WM8731_SPI)
 294 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 295         .enable_dma = 0,
 296         .bits_per_word = 16,
 297 };
 298 #endif
 299
 300 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 301 static struct bfin5xx_spi_chip spidev_chip_info = {
 302         .enable_dma = 0,
 303         .bits_per_word = 8,
 304 };
 305 #endif
 306
 307 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 308 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 309         .enable_dma = 0,
 310         .bits_per_word = 8,
 311 };
 312 #endif
 313
 314 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 315 #if defined(CONFIG_MTD_M25P80) \
 316         || defined(CONFIG_MTD_M25P80_MODULE)
 317         {
 318                 /* the modalias must be the same as spi device driver name */
 319                 .modalias = "m25p80", /* Name of spi_driver for this device */
 320                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 321                 .bus_num = 0, /* Framework bus number */
 322                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 323                 .platform_data = &bfin_spi_flash_data,
 324                 .controller_data = &spi_flash_chip_info,
 325                 .mode = SPI_MODE_3,
 326         },
 327 #endif
 328
 329 #if defined(CONFIG_BFIN_SPI_ADC) \
 330         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 331         {
 332                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 333                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 334                 .bus_num = 0, /* Framework bus number */
 335                 .chip_select = 1, /* Framework chip select. */
 336                 .platform_data = NULL, /* No spi_driver specific config */
 337                 .controller_data = &spi_adc_chip_info,
 338         },
 339 #endif
 340
 341 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 342         {
 343                 .modalias = "mmc_spi",
 344                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 345                 .bus_num = 0,
 346                 .chip_select = 5,
 347                 .controller_data = &mmc_spi_chip_info,
 348                 .mode = SPI_MODE_3,
 349         },
 350 #endif
 351 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 352         {
 353                 .modalias               = "ad7877",
 354                 .platform_data          = &bfin_ad7877_ts_info,
 355                 .irq                    = IRQ_PF8,
 356                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 357                 .bus_num        = 0,
 358                 .chip_select  = 2,
 359                 .controller_data = &spi_ad7877_chip_info,
 360         },
 361 #endif
 362 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 363         {
 364                 .modalias = "ad7879",
 365                 .platform_data = &bfin_ad7879_ts_info,
 366                 .irq = IRQ_PG0,
 367                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 368                 .bus_num = 0,
 369                 .chip_select = 5,
 370                 .controller_data = &spi_ad7879_chip_info,
 371                 .mode = SPI_CPHA | SPI_CPOL,
 372         },
 373 #endif
 374 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 375          && defined(CONFIG_SND_SOC_WM8731_SPI)
 376         {
 377                 .modalias       = "wm8731",
 378                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 379                 .bus_num        = 0,
 380                 .chip_select    = 5,
 381                 .controller_data = &spi_wm8731_chip_info,
 382                 .mode = SPI_MODE_0,
 383         },
 384 #endif
 385 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 386         {
 387                 .modalias = "spidev",
 388                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 389                 .bus_num = 0,
 390                 .chip_select = 1,
 391                 .controller_data = &spidev_chip_info,
 392         },
 393 #endif
 394 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 395         {
 396                 .modalias = "bfin-lq035q1-spi",
 397                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 398                 .bus_num = 0,
 399                 .chip_select = 1,
 400                 .controller_data = &lq035q1_spi_chip_info,
 401                 .mode = SPI_CPHA | SPI_CPOL,
 402         },
 403 #endif
 404 };
 405
 406 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 407 /* SPI controller data */
 408 static struct bfin5xx_spi_master bfin_spi0_info = {
 409         .num_chipselect = 8,
 410         .enable_dma = 1,  /* master has the ability to do dma transfer */
 411         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 412 };
 413
 414 /* SPI (0) */
 415 static struct resource bfin_spi0_resource[] = {
 416         [0] = {
 417                 .start = SPI0_REGBASE,
 418                 .end   = SPI0_REGBASE + 0xFF,
 419                 .flags = IORESOURCE_MEM,
 420                 },
 421         [1] = {
 422                 .start = CH_SPI,
 423                 .end   = CH_SPI,
 424                 .flags = IORESOURCE_DMA,
 425         },
 426         [2] = {
 427                 .start = IRQ_SPI,
 428                 .end   = IRQ_SPI,
 429                 .flags = IORESOURCE_IRQ,
 430         },
 431 };
 432
 433 static struct platform_device bfin_spi0_device = {
 434         .name = "bfin-spi",
 435         .id = 0, /* Bus number */
 436         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 437         .resource = bfin_spi0_resource,
 438         .dev = {
 439                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 440         },
 441 };
 442 #endif  /* spi master and devices */
 443
 444 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 445 #ifdef CONFIG_SERIAL_BFIN_UART0
 446 static struct resource bfin_uart0_resources[] = {
 447         {
 448                 .start = UART0_THR,
 449                 .end = UART0_GCTL+2,
 450                 .flags = IORESOURCE_MEM,
 451         },
 452         {
 453                 .start = IRQ_UART0_RX,
 454                 .end = IRQ_UART0_RX+1,
 455                 .flags = IORESOURCE_IRQ,
 456         },
 457         {
 458                 .start = IRQ_UART0_ERROR,
 459                 .end = IRQ_UART0_ERROR,
 460                 .flags = IORESOURCE_IRQ,
 461         },
 462         {
 463                 .start = CH_UART0_TX,
 464                 .end = CH_UART0_TX,
 465                 .flags = IORESOURCE_DMA,
 466         },
 467         {
 468                 .start = CH_UART0_RX,
 469                 .end = CH_UART0_RX,
 470                 .flags = IORESOURCE_DMA,
 471         },
 472 };
 473
 474 unsigned short bfin_uart0_peripherals[] = {
 475         P_UART0_TX, P_UART0_RX, 0
 476 };
 477
 478 static struct platform_device bfin_uart0_device = {
 479         .name = "bfin-uart",
 480         .id = 0,
 481         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 482         .resource = bfin_uart0_resources,
 483         .dev = {
 484                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 485         },
 486 };
 487 #endif
 488 #ifdef CONFIG_SERIAL_BFIN_UART1
 489 static struct resource bfin_uart1_resources[] = {
 490         {
 491                 .start = UART1_THR,
 492                 .end = UART1_GCTL+2,
 493                 .flags = IORESOURCE_MEM,
 494         },
 495         {
 496                 .start = IRQ_UART1_RX,
 497                 .end = IRQ_UART1_RX+1,
 498                 .flags = IORESOURCE_IRQ,
 499         },
 500         {
 501                 .start = IRQ_UART1_ERROR,
 502                 .end = IRQ_UART1_ERROR,
 503                 .flags = IORESOURCE_IRQ,
 504         },
 505         {
 506                 .start = CH_UART1_TX,
 507                 .end = CH_UART1_TX,
 508                 .flags = IORESOURCE_DMA,
 509         },
 510         {
 511                 .start = CH_UART1_RX,
 512                 .end = CH_UART1_RX,
 513                 .flags = IORESOURCE_DMA,
 514         },
 515 #ifdef CONFIG_BFIN_UART1_CTSRTS
 516         {       /* CTS pin */
 517                 .start = GPIO_PG0,
 518                 .end = GPIO_PG0,
 519                 .flags = IORESOURCE_IO,
 520         },
 521         {       /* RTS pin */
 522                 .start = GPIO_PF10,
 523                 .end = GPIO_PF10,
 524                 .flags = IORESOURCE_IO,
 525         },
 526 #endif
 527 };
 528
 529 unsigned short bfin_uart1_peripherals[] = {
 530         P_UART1_TX, P_UART1_RX, 0
 531 };
 532
 533 static struct platform_device bfin_uart1_device = {
 534         .name = "bfin-uart",
 535         .id = 1,
 536         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 537         .resource = bfin_uart1_resources,
 538         .dev = {
 539                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 540         },
 541 };
 542 #endif
 543 #endif
 544
 545 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 546 #ifdef CONFIG_BFIN_SIR0
 547 static struct resource bfin_sir0_resources[] = {
 548         {
 549                 .start = 0xFFC00400,
 550                 .end = 0xFFC004FF,
 551                 .flags = IORESOURCE_MEM,
 552         },
 553         {
 554                 .start = IRQ_UART0_RX,
 555                 .end = IRQ_UART0_RX+1,
 556                 .flags = IORESOURCE_IRQ,
 557         },
 558         {
 559                 .start = CH_UART0_RX,
 560                 .end = CH_UART0_RX+1,
 561                 .flags = IORESOURCE_DMA,
 562         },
 563 };
 564
 565 static struct platform_device bfin_sir0_device = {
 566         .name = "bfin_sir",
 567         .id = 0,
 568         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 569         .resource = bfin_sir0_resources,
 570 };
 571 #endif
 572 #ifdef CONFIG_BFIN_SIR1
 573 static struct resource bfin_sir1_resources[] = {
 574         {
 575                 .start = 0xFFC02000,
 576                 .end = 0xFFC020FF,
 577                 .flags = IORESOURCE_MEM,
 578         },
 579         {
 580                 .start = IRQ_UART1_RX,
 581                 .end = IRQ_UART1_RX+1,
 582                 .flags = IORESOURCE_IRQ,
 583         },
 584         {
 585                 .start = CH_UART1_RX,
 586                 .end = CH_UART1_RX+1,
 587                 .flags = IORESOURCE_DMA,
 588         },
 589 };
 590
 591 static struct platform_device bfin_sir1_device = {
 592         .name = "bfin_sir",
 593         .id = 1,
 594         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 595         .resource = bfin_sir1_resources,
 596 };
 597 #endif
 598 #endif
 599
 600 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 601 static struct resource bfin_twi0_resource[] = {
 602         [0] = {
 603                 .start = TWI0_REGBASE,
 604                 .end   = TWI0_REGBASE,
 605                 .flags = IORESOURCE_MEM,
 606         },
 607         [1] = {
 608                 .start = IRQ_TWI,
 609                 .end   = IRQ_TWI,
 610                 .flags = IORESOURCE_IRQ,
 611         },
 612 };
 613
 614 static struct platform_device i2c_bfin_twi_device = {
 615         .name = "i2c-bfin-twi",
 616         .id = 0,
 617         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 618         .resource = bfin_twi0_resource,
 619 };
 620 #endif
 621
 622 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 623 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 624         {
 625                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 626         },
 627 #endif
 628 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 629         {
 630                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 631                 .irq = IRQ_PF8,
 632         },
 633 #endif
 634 };
 635
 636 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 637 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 638 static struct resource bfin_sport0_uart_resources[] = {
 639         {
 640                 .start = SPORT0_TCR1,
 641                 .end = SPORT0_MRCS3+4,
 642                 .flags = IORESOURCE_MEM,
 643         },
 644         {
 645                 .start = IRQ_SPORT0_RX,
 646                 .end = IRQ_SPORT0_RX+1,
 647                 .flags = IORESOURCE_IRQ,
 648         },
 649         {
 650                 .start = IRQ_SPORT0_ERROR,
 651                 .end = IRQ_SPORT0_ERROR,
 652                 .flags = IORESOURCE_IRQ,
 653         },
 654 };
 655
 656 unsigned short bfin_sport0_peripherals[] = {
 657         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 658         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 659 };
 660
 661 static struct platform_device bfin_sport0_uart_device = {
 662         .name = "bfin-sport-uart",
 663         .id = 0,
 664         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 665         .resource = bfin_sport0_uart_resources,
 666         .dev = {
 667                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 668         },
 669 };
 670 #endif
 671 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 672 static struct resource bfin_sport1_uart_resources[] = {
 673         {
 674                 .start = SPORT1_TCR1,
 675                 .end = SPORT1_MRCS3+4,
 676                 .flags = IORESOURCE_MEM,
 677         },
 678         {
 679                 .start = IRQ_SPORT1_RX,
 680                 .end = IRQ_SPORT1_RX+1,
 681                 .flags = IORESOURCE_IRQ,
 682         },
 683         {
 684                 .start = IRQ_SPORT1_ERROR,
 685                 .end = IRQ_SPORT1_ERROR,
 686                 .flags = IORESOURCE_IRQ,
 687         },
 688 };
 689
 690 unsigned short bfin_sport1_peripherals[] = {
 691         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 692         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 693 };
 694
 695 static struct platform_device bfin_sport1_uart_device = {
 696         .name = "bfin-sport-uart",
 697         .id = 1,
 698         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 699         .resource = bfin_sport1_uart_resources,
 700         .dev = {
 701                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 702         },
 703 };
 704 #endif
 705 #endif
 706
 707 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 708 #include <linux/input.h>
 709 #include <linux/gpio_keys.h>
 710
 711 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 712         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 713         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 714 };
 715
 716 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 717         .buttons        = bfin_gpio_keys_table,
 718         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 719 };
 720
 721 static struct platform_device bfin_device_gpiokeys = {
 722         .name      = "gpio-keys",
 723         .dev = {
 724                 .platform_data = &bfin_gpio_keys_data,
 725         },
 726 };
 727 #endif
 728
 729 static const unsigned int cclk_vlev_datasheet[] =
 730 {
 731         VRPAIR(VLEV_100, 400000000),
 732         VRPAIR(VLEV_105, 426000000),
 733         VRPAIR(VLEV_110, 500000000),
 734         VRPAIR(VLEV_115, 533000000),
 735         VRPAIR(VLEV_120, 600000000),
 736 };
 737
 738 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 739         .tuple_tab = cclk_vlev_datasheet,
 740         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 741         .vr_settling_time = 25 /* us */,
 742 };
 743
 744 static struct platform_device bfin_dpmc = {
 745         .name = "bfin dpmc",
 746         .dev = {
 747                 .platform_data = &bfin_dmpc_vreg_data,
 748         },
 749 };
 750
 751 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 752 #include <asm/bfin-lq035q1.h>
 753
 754 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 755         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 756         .ppi_mode = USE_RGB565_16_BIT_PPI,
 757         .use_bl = 1,
 758         .gpio_bl = GPIO_PG12,
 759 };
 760
 761 static struct resource bfin_lq035q1_resources[] = {
 762         {
 763                 .start = IRQ_PPI_ERROR,
 764                 .end = IRQ_PPI_ERROR,
 765                 .flags = IORESOURCE_IRQ,
 766         },
 767 };
 768
 769 static struct platform_device bfin_lq035q1_device = {
 770         .name           = "bfin-lq035q1",
 771         .id             = -1,
 772         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 773         .resource       = bfin_lq035q1_resources,
 774         .dev            = {
 775                 .platform_data = &bfin_lq035q1_data,
 776         },
 777 };
 778 #endif
 779
 780 static struct platform_device *stamp_devices[] __initdata = {
 781
 782         &bfin_dpmc,
 783
 784 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 785         &bf5xx_nand_device,
 786 #endif
 787
 788 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 789         &rtc_device,
 790 #endif
 791
 792 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 793         &musb_device,
 794 #endif
 795
 796 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 797         &bfin_mii_bus,
 798         &bfin_mac_device,
 799 #endif
 800
 801 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 802         &bfin_spi0_device,
 803 #endif
 804
 805 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 806 #ifdef CONFIG_SERIAL_BFIN_UART0
 807         &bfin_uart0_device,
 808 #endif
 809 #ifdef CONFIG_SERIAL_BFIN_UART1
 810         &bfin_uart1_device,
 811 #endif
 812 #endif
 813
 814 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 815         &bfin_lq035q1_device,
 816 #endif
 817
 818 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 819 #ifdef CONFIG_BFIN_SIR0
 820         &bfin_sir0_device,
 821 #endif
 822 #ifdef CONFIG_BFIN_SIR1
 823         &bfin_sir1_device,
 824 #endif
 825 #endif
 826
 827 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 828         &i2c_bfin_twi_device,
 829 #endif
 830
 831 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 832 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 833         &bfin_sport0_uart_device,
 834 #endif
 835 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 836         &bfin_sport1_uart_device,
 837 #endif
 838 #endif
 839
 840 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 841         &bfin_device_gpiokeys,
 842 #endif
 843
 844 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 845         &ezbrd_flash_device,
 846 #endif
 847 };
 848
 849 static int __init ezbrd_init(void)
 850 {
 851         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 852         i2c_register_board_info(0, bfin_i2c_board_info,
 853                                 ARRAY_SIZE(bfin_i2c_board_info));
 854         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 855         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 856         return 0;
 857 }
 858
 859 arch_initcall(ezbrd_init);
 860
 861 static struct platform_device *ezbrd_early_devices[] __initdata = {
 862 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 863 #ifdef CONFIG_SERIAL_BFIN_UART0
 864         &bfin_uart0_device,
 865 #endif
 866 #ifdef CONFIG_SERIAL_BFIN_UART1
 867         &bfin_uart1_device,
 868 #endif
 869 #endif
 870
 871 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 872 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 873         &bfin_sport0_uart_device,
 874 #endif
 875 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 876         &bfin_sport1_uart_device,
 877 #endif
 878 #endif
 879 };
 880
 881 void __init native_machine_early_platform_add_devices(void)
 882 {
 883         printk(KERN_INFO "register early platform devices\n");
 884         early_platform_add_devices(ezbrd_early_devices,
 885                 ARRAY_SIZE(ezbrd_early_devices));
 886 }
 887
 888 void native_machine_restart(char *cmd)
 889 {
 890         /* workaround reboot hang when booting from SPI */
 891         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 892                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 893 }
 894
 895 void bfin_get_ether_addr(char *addr)
 896 {
 897         /* the MAC is stored in OTP memory page 0xDF */
 898         u32 ret;
 899         u64 otp_mac;
 900         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 901
 902         ret = otp_read(0xDF, 0x00, &otp_mac);
 903         if (!(ret & 0x1)) {
 904                 char *otp_mac_p = (char *)&otp_mac;
 905                 for (ret = 0; ret < 6; ++ret)
 906                         addr[ret] = otp_mac_p[5 - ret];
 907         }
 908 }
 909 EXPORT_SYMBOL(bfin_get_ether_addr);