2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
17 #include <linux/i2c.h>
18 #include <linux/irq.h>
19 #include <linux/interrupt.h>
20 #include <linux/usb/musb.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
25 #include <asm/portmux.h>
27 #include <linux/spi/ad7877.h>
30 * Name the Board for the /proc/cpuinfo
32 const char bfin_board_name[] = "ADI BF526-EZBRD";
35 * Driver needs to know address, irq and flag pin.
38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39 static struct resource musb_resources[] = {
43 .flags = IORESOURCE_MEM,
45 [1] = { /* general IRQ */
46 .start = IRQ_USB_INT0,
48 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
53 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
57 static struct musb_hdrc_config musb_config = {
64 .gpio_vrsel = GPIO_PG13,
65 /* Some custom boards need to be active low, just set it to "0"
68 .gpio_vrsel_active = 1,
71 static struct musb_hdrc_platform_data musb_plat = {
72 #if defined(CONFIG_USB_MUSB_OTG)
74 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
76 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
77 .mode = MUSB_PERIPHERAL,
79 .config = &musb_config,
82 static u64 musb_dmamask = ~(u32)0;
84 static struct platform_device musb_device = {
88 .dma_mask = &musb_dmamask,
89 .coherent_dma_mask = 0xffffffff,
90 .platform_data = &musb_plat,
92 .num_resources = ARRAY_SIZE(musb_resources),
93 .resource = musb_resources,
97 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
98 static struct mtd_partition ezbrd_partitions[] = {
100 .name = "bootloader(nor)",
104 .name = "linux kernel(nor)",
106 .offset = MTDPART_OFS_APPEND,
108 .name = "file system(nor)",
109 .size = MTDPART_SIZ_FULL,
110 .offset = MTDPART_OFS_APPEND,
114 static struct physmap_flash_data ezbrd_flash_data = {
116 .parts = ezbrd_partitions,
117 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
120 static struct resource ezbrd_flash_resource = {
123 .flags = IORESOURCE_MEM,
126 static struct platform_device ezbrd_flash_device = {
127 .name = "physmap-flash",
130 .platform_data = &ezbrd_flash_data,
133 .resource = &ezbrd_flash_resource,
137 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
138 static struct mtd_partition partition_info[] = {
140 .name = "bootloader(nand)",
144 .name = "linux kernel(nand)",
145 .offset = MTDPART_OFS_APPEND,
146 .size = 4 * 1024 * 1024,
149 .name = "file system(nand)",
150 .offset = MTDPART_OFS_APPEND,
151 .size = MTDPART_SIZ_FULL,
155 static struct bf5xx_nand_platform bf5xx_nand_platform = {
156 .data_width = NFC_NWIDTH_8,
157 .partitions = partition_info,
158 .nr_partitions = ARRAY_SIZE(partition_info),
163 static struct resource bf5xx_nand_resources[] = {
166 .end = NFC_DATA_RD + 2,
167 .flags = IORESOURCE_MEM,
172 .flags = IORESOURCE_IRQ,
176 static struct platform_device bf5xx_nand_device = {
177 .name = "bf5xx-nand",
179 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
180 .resource = bf5xx_nand_resources,
182 .platform_data = &bf5xx_nand_platform,
187 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
188 static struct platform_device rtc_device = {
195 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
196 #include <linux/bfin_mac.h>
197 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
199 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
202 .irq = IRQ_MAC_PHYINT,
206 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
208 .phydev_data = bfin_phydev_data,
209 .phy_mode = PHY_INTERFACE_MODE_RMII,
210 .mac_peripherals = bfin_mac_peripherals,
213 static struct platform_device bfin_mii_bus = {
214 .name = "bfin_mii_bus",
216 .platform_data = &bfin_mii_bus_data,
220 static struct platform_device bfin_mac_device = {
223 .platform_data = &bfin_mii_bus,
228 #if defined(CONFIG_MTD_M25P80) \
229 || defined(CONFIG_MTD_M25P80_MODULE)
230 static struct mtd_partition bfin_spi_flash_partitions[] = {
232 .name = "bootloader(spi)",
235 .mask_flags = MTD_CAP_ROM
237 .name = "linux kernel(spi)",
238 .size = MTDPART_SIZ_FULL,
239 .offset = MTDPART_OFS_APPEND,
243 static struct flash_platform_data bfin_spi_flash_data = {
245 .parts = bfin_spi_flash_partitions,
246 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
247 .type = "sst25wf040",
250 /* SPI flash chip (sst25wf040) */
251 static struct bfin5xx_spi_chip spi_flash_chip_info = {
252 .enable_dma = 0, /* use dma transfer with this chip*/
257 #if defined(CONFIG_BFIN_SPI_ADC) \
258 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
260 static struct bfin5xx_spi_chip spi_adc_chip_info = {
261 .enable_dma = 1, /* use dma transfer with this chip*/
266 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
267 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
273 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
274 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
279 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
281 .vref_delay_usecs = 50, /* internal, no capacitor */
284 .pressure_max = 1000,
286 .stopacq_polarity = 1,
287 .first_conversion_delay = 3,
288 .acquisition_time = 1,
290 .pen_down_acc_interval = 1,
294 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
295 #include <linux/spi/ad7879.h>
296 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
297 .model = 7879, /* Model = AD7879 */
298 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
299 .pressure_max = 10000,
301 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
302 .acquisition_time = 1, /* 4us acquisition time per sample */
303 .median = 2, /* do 8 measurements */
304 .averaging = 1, /* take the average of 4 middle samples */
305 .pen_down_acc_interval = 255, /* 9.4 ms */
306 .gpio_export = 1, /* Export GPIO to gpiolib */
307 .gpio_base = -1, /* Dynamic allocation */
311 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
312 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
318 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
319 && defined(CONFIG_SND_SOC_WM8731_SPI)
320 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
326 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
327 static struct bfin5xx_spi_chip spidev_chip_info = {
333 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
334 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
340 static struct spi_board_info bfin_spi_board_info[] __initdata = {
341 #if defined(CONFIG_MTD_M25P80) \
342 || defined(CONFIG_MTD_M25P80_MODULE)
344 /* the modalias must be the same as spi device driver name */
345 .modalias = "m25p80", /* Name of spi_driver for this device */
346 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
347 .bus_num = 0, /* Framework bus number */
348 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
349 .platform_data = &bfin_spi_flash_data,
350 .controller_data = &spi_flash_chip_info,
355 #if defined(CONFIG_BFIN_SPI_ADC) \
356 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
358 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
359 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
360 .bus_num = 0, /* Framework bus number */
361 .chip_select = 1, /* Framework chip select. */
362 .platform_data = NULL, /* No spi_driver specific config */
363 .controller_data = &spi_adc_chip_info,
367 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
369 .modalias = "mmc_spi",
370 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
373 .controller_data = &mmc_spi_chip_info,
377 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
379 .modalias = "ad7877",
380 .platform_data = &bfin_ad7877_ts_info,
382 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
385 .controller_data = &spi_ad7877_chip_info,
388 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
390 .modalias = "ad7879",
391 .platform_data = &bfin_ad7879_ts_info,
393 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
396 .controller_data = &spi_ad7879_chip_info,
397 .mode = SPI_CPHA | SPI_CPOL,
400 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
401 && defined(CONFIG_SND_SOC_WM8731_SPI)
403 .modalias = "wm8731",
404 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
407 .controller_data = &spi_wm8731_chip_info,
411 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
413 .modalias = "spidev",
414 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
417 .controller_data = &spidev_chip_info,
420 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
422 .modalias = "bfin-lq035q1-spi",
423 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
426 .controller_data = &lq035q1_spi_chip_info,
427 .mode = SPI_CPHA | SPI_CPOL,
432 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
433 /* SPI controller data */
434 static struct bfin5xx_spi_master bfin_spi0_info = {
436 .enable_dma = 1, /* master has the ability to do dma transfer */
437 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
441 static struct resource bfin_spi0_resource[] = {
443 .start = SPI0_REGBASE,
444 .end = SPI0_REGBASE + 0xFF,
445 .flags = IORESOURCE_MEM,
450 .flags = IORESOURCE_DMA,
455 .flags = IORESOURCE_IRQ,
459 static struct platform_device bfin_spi0_device = {
461 .id = 0, /* Bus number */
462 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
463 .resource = bfin_spi0_resource,
465 .platform_data = &bfin_spi0_info, /* Passed to driver */
468 #endif /* spi master and devices */
470 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
471 #ifdef CONFIG_SERIAL_BFIN_UART0
472 static struct resource bfin_uart0_resources[] = {
476 .flags = IORESOURCE_MEM,
479 .start = IRQ_UART0_RX,
480 .end = IRQ_UART0_RX+1,
481 .flags = IORESOURCE_IRQ,
484 .start = IRQ_UART0_ERROR,
485 .end = IRQ_UART0_ERROR,
486 .flags = IORESOURCE_IRQ,
489 .start = CH_UART0_TX,
491 .flags = IORESOURCE_DMA,
494 .start = CH_UART0_RX,
496 .flags = IORESOURCE_DMA,
500 unsigned short bfin_uart0_peripherals[] = {
501 P_UART0_TX, P_UART0_RX, 0
504 static struct platform_device bfin_uart0_device = {
507 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
508 .resource = bfin_uart0_resources,
510 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
514 #ifdef CONFIG_SERIAL_BFIN_UART1
515 static struct resource bfin_uart1_resources[] = {
519 .flags = IORESOURCE_MEM,
522 .start = IRQ_UART1_RX,
523 .end = IRQ_UART1_RX+1,
524 .flags = IORESOURCE_IRQ,
527 .start = IRQ_UART1_ERROR,
528 .end = IRQ_UART1_ERROR,
529 .flags = IORESOURCE_IRQ,
532 .start = CH_UART1_TX,
534 .flags = IORESOURCE_DMA,
537 .start = CH_UART1_RX,
539 .flags = IORESOURCE_DMA,
541 #ifdef CONFIG_BFIN_UART1_CTSRTS
545 .flags = IORESOURCE_IO,
550 .flags = IORESOURCE_IO,
555 unsigned short bfin_uart1_peripherals[] = {
556 P_UART1_TX, P_UART1_RX, 0
559 static struct platform_device bfin_uart1_device = {
562 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
563 .resource = bfin_uart1_resources,
565 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
571 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
572 #ifdef CONFIG_BFIN_SIR0
573 static struct resource bfin_sir0_resources[] = {
577 .flags = IORESOURCE_MEM,
580 .start = IRQ_UART0_RX,
581 .end = IRQ_UART0_RX+1,
582 .flags = IORESOURCE_IRQ,
585 .start = CH_UART0_RX,
586 .end = CH_UART0_RX+1,
587 .flags = IORESOURCE_DMA,
591 static struct platform_device bfin_sir0_device = {
594 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
595 .resource = bfin_sir0_resources,
598 #ifdef CONFIG_BFIN_SIR1
599 static struct resource bfin_sir1_resources[] = {
603 .flags = IORESOURCE_MEM,
606 .start = IRQ_UART1_RX,
607 .end = IRQ_UART1_RX+1,
608 .flags = IORESOURCE_IRQ,
611 .start = CH_UART1_RX,
612 .end = CH_UART1_RX+1,
613 .flags = IORESOURCE_DMA,
617 static struct platform_device bfin_sir1_device = {
620 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
621 .resource = bfin_sir1_resources,
626 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
627 static struct resource bfin_twi0_resource[] = {
629 .start = TWI0_REGBASE,
631 .flags = IORESOURCE_MEM,
636 .flags = IORESOURCE_IRQ,
640 static struct platform_device i2c_bfin_twi_device = {
641 .name = "i2c-bfin-twi",
643 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
644 .resource = bfin_twi0_resource,
648 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
649 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
651 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
654 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
656 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
662 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
663 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
664 static struct resource bfin_sport0_uart_resources[] = {
666 .start = SPORT0_TCR1,
667 .end = SPORT0_MRCS3+4,
668 .flags = IORESOURCE_MEM,
671 .start = IRQ_SPORT0_RX,
672 .end = IRQ_SPORT0_RX+1,
673 .flags = IORESOURCE_IRQ,
676 .start = IRQ_SPORT0_ERROR,
677 .end = IRQ_SPORT0_ERROR,
678 .flags = IORESOURCE_IRQ,
682 unsigned short bfin_sport0_peripherals[] = {
683 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
684 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
687 static struct platform_device bfin_sport0_uart_device = {
688 .name = "bfin-sport-uart",
690 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
691 .resource = bfin_sport0_uart_resources,
693 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
697 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
698 static struct resource bfin_sport1_uart_resources[] = {
700 .start = SPORT1_TCR1,
701 .end = SPORT1_MRCS3+4,
702 .flags = IORESOURCE_MEM,
705 .start = IRQ_SPORT1_RX,
706 .end = IRQ_SPORT1_RX+1,
707 .flags = IORESOURCE_IRQ,
710 .start = IRQ_SPORT1_ERROR,
711 .end = IRQ_SPORT1_ERROR,
712 .flags = IORESOURCE_IRQ,
716 unsigned short bfin_sport1_peripherals[] = {
717 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
718 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
721 static struct platform_device bfin_sport1_uart_device = {
722 .name = "bfin-sport-uart",
724 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
725 .resource = bfin_sport1_uart_resources,
727 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
733 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
734 #include <linux/input.h>
735 #include <linux/gpio_keys.h>
737 static struct gpio_keys_button bfin_gpio_keys_table[] = {
738 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
739 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
742 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
743 .buttons = bfin_gpio_keys_table,
744 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
747 static struct platform_device bfin_device_gpiokeys = {
750 .platform_data = &bfin_gpio_keys_data,
755 static const unsigned int cclk_vlev_datasheet[] =
757 VRPAIR(VLEV_100, 400000000),
758 VRPAIR(VLEV_105, 426000000),
759 VRPAIR(VLEV_110, 500000000),
760 VRPAIR(VLEV_115, 533000000),
761 VRPAIR(VLEV_120, 600000000),
764 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
765 .tuple_tab = cclk_vlev_datasheet,
766 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
767 .vr_settling_time = 25 /* us */,
770 static struct platform_device bfin_dpmc = {
773 .platform_data = &bfin_dmpc_vreg_data,
777 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
778 #include <asm/bfin-lq035q1.h>
780 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
781 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
782 .ppi_mode = USE_RGB565_16_BIT_PPI,
784 .gpio_bl = GPIO_PG12,
787 static struct resource bfin_lq035q1_resources[] = {
789 .start = IRQ_PPI_ERROR,
790 .end = IRQ_PPI_ERROR,
791 .flags = IORESOURCE_IRQ,
795 static struct platform_device bfin_lq035q1_device = {
796 .name = "bfin-lq035q1",
798 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
799 .resource = bfin_lq035q1_resources,
801 .platform_data = &bfin_lq035q1_data,
806 static struct platform_device *stamp_devices[] __initdata = {
810 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
814 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
818 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
822 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
827 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
831 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
832 #ifdef CONFIG_SERIAL_BFIN_UART0
835 #ifdef CONFIG_SERIAL_BFIN_UART1
840 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
841 &bfin_lq035q1_device,
844 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
845 #ifdef CONFIG_BFIN_SIR0
848 #ifdef CONFIG_BFIN_SIR1
853 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
854 &i2c_bfin_twi_device,
857 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
858 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
859 &bfin_sport0_uart_device,
861 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
862 &bfin_sport1_uart_device,
866 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
867 &bfin_device_gpiokeys,
870 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
875 static int __init ezbrd_init(void)
877 printk(KERN_INFO "%s(): registering device resources\n", __func__);
878 i2c_register_board_info(0, bfin_i2c_board_info,
879 ARRAY_SIZE(bfin_i2c_board_info));
880 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
881 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
885 arch_initcall(ezbrd_init);
887 static struct platform_device *ezbrd_early_devices[] __initdata = {
888 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
889 #ifdef CONFIG_SERIAL_BFIN_UART0
892 #ifdef CONFIG_SERIAL_BFIN_UART1
897 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
898 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
899 &bfin_sport0_uart_device,
901 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
902 &bfin_sport1_uart_device,
907 void __init native_machine_early_platform_add_devices(void)
909 printk(KERN_INFO "register early platform devices\n");
910 early_platform_add_devices(ezbrd_early_devices,
911 ARRAY_SIZE(ezbrd_early_devices));
914 void native_machine_restart(char *cmd)
916 /* workaround reboot hang when booting from SPI */
917 if ((bfin_read_SYSCR() & 0x7) == 0x3)
918 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
921 void bfin_get_ether_addr(char *addr)
923 /* the MAC is stored in OTP memory page 0xDF */
926 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
928 ret = otp_read(0xDF, 0x00, &otp_mac);
930 char *otp_mac_p = (char *)&otp_mac;
931 for (ret = 0; ret < 6; ++ret)
932 addr[ret] = otp_mac_p[5 - ret];
935 EXPORT_SYMBOL(bfin_get_ether_addr);