2 * Copyright 2004-20010 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/export.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #include <linux/i2c.h>
18 #include <linux/irq.h>
19 #include <linux/interrupt.h>
20 #include <linux/usb/musb.h>
21 #include <linux/leds.h>
22 #include <linux/input.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/reboot.h>
27 #include <asm/portmux.h>
32 * Name the Board for the /proc/cpuinfo
34 const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
37 * Driver needs to know address, irq and flag pin.
40 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
41 static struct resource musb_resources[] = {
45 .flags = IORESOURCE_MEM,
47 [1] = { /* general IRQ */
48 .start = IRQ_USB_INT0,
50 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
55 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
59 static struct musb_hdrc_config musb_config = {
66 .gpio_vrsel = GPIO_PG13,
67 /* Some custom boards need to be active low, just set it to "0"
70 .gpio_vrsel_active = 1,
71 .clkin = 24, /* musb CLKIN in MHZ */
74 static struct musb_hdrc_platform_data musb_plat = {
75 #if defined(CONFIG_USB_MUSB_OTG)
77 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
79 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
80 .mode = MUSB_PERIPHERAL,
82 .config = &musb_config,
85 static u64 musb_dmamask = ~(u32)0;
87 static struct platform_device musb_device = {
88 .name = "musb-blackfin",
91 .dma_mask = &musb_dmamask,
92 .coherent_dma_mask = 0xffffffff,
93 .platform_data = &musb_plat,
95 .num_resources = ARRAY_SIZE(musb_resources),
96 .resource = musb_resources,
100 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
101 static struct resource bf52x_ra158z_resources[] = {
103 .start = IRQ_PPI_ERROR,
104 .end = IRQ_PPI_ERROR,
105 .flags = IORESOURCE_IRQ,
109 static struct platform_device bf52x_ra158z_device = {
110 .name = "bfin-ra158z",
112 .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
113 .resource = bf52x_ra158z_resources,
117 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
118 static struct mtd_partition ad7160eval_partitions[] = {
120 .name = "bootloader(nor)",
124 .name = "linux kernel(nor)",
126 .offset = MTDPART_OFS_APPEND,
128 .name = "file system(nor)",
129 .size = MTDPART_SIZ_FULL,
130 .offset = MTDPART_OFS_APPEND,
134 static struct physmap_flash_data ad7160eval_flash_data = {
136 .parts = ad7160eval_partitions,
137 .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
140 static struct resource ad7160eval_flash_resource = {
143 .flags = IORESOURCE_MEM,
146 static struct platform_device ad7160eval_flash_device = {
147 .name = "physmap-flash",
150 .platform_data = &ad7160eval_flash_data,
153 .resource = &ad7160eval_flash_resource,
157 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
158 static struct mtd_partition partition_info[] = {
160 .name = "linux kernel(nand)",
162 .size = 4 * 1024 * 1024,
165 .name = "file system(nand)",
166 .offset = MTDPART_OFS_APPEND,
167 .size = MTDPART_SIZ_FULL,
171 static struct bf5xx_nand_platform bf5xx_nand_platform = {
172 .data_width = NFC_NWIDTH_8,
173 .partitions = partition_info,
174 .nr_partitions = ARRAY_SIZE(partition_info),
179 static struct resource bf5xx_nand_resources[] = {
182 .end = NFC_DATA_RD + 2,
183 .flags = IORESOURCE_MEM,
188 .flags = IORESOURCE_IRQ,
192 static struct platform_device bf5xx_nand_device = {
193 .name = "bf5xx-nand",
195 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
196 .resource = bf5xx_nand_resources,
198 .platform_data = &bf5xx_nand_platform,
203 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
204 static struct platform_device rtc_device = {
210 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
211 #include <linux/bfin_mac.h>
212 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
214 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
217 .irq = IRQ_MAC_PHYINT,
221 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
223 .phydev_data = bfin_phydev_data,
224 .phy_mode = PHY_INTERFACE_MODE_RMII,
225 .mac_peripherals = bfin_mac_peripherals,
228 static struct platform_device bfin_mii_bus = {
229 .name = "bfin_mii_bus",
231 .platform_data = &bfin_mii_bus_data,
235 static struct platform_device bfin_mac_device = {
238 .platform_data = &bfin_mii_bus,
244 #if defined(CONFIG_MTD_M25P80) \
245 || defined(CONFIG_MTD_M25P80_MODULE)
246 static struct mtd_partition bfin_spi_flash_partitions[] = {
248 .name = "bootloader(spi)",
251 .mask_flags = MTD_CAP_ROM
253 .name = "linux kernel(spi)",
254 .size = MTDPART_SIZ_FULL,
255 .offset = MTDPART_OFS_APPEND,
259 static struct flash_platform_data bfin_spi_flash_data = {
261 .parts = bfin_spi_flash_partitions,
262 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
266 /* SPI flash chip (m25p64) */
267 static struct bfin5xx_spi_chip spi_flash_chip_info = {
268 .enable_dma = 0, /* use dma transfer with this chip*/
272 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
273 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
278 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
279 static struct platform_device bfin_i2s = {
281 .id = CONFIG_SND_BF5XX_SPORT_NUM,
282 /* TODO: add platform data here */
286 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
287 static struct platform_device bfin_tdm = {
289 .id = CONFIG_SND_BF5XX_SPORT_NUM,
290 /* TODO: add platform data here */
294 static struct spi_board_info bfin_spi_board_info[] __initdata = {
295 #if defined(CONFIG_MTD_M25P80) \
296 || defined(CONFIG_MTD_M25P80_MODULE)
298 /* the modalias must be the same as spi device driver name */
299 .modalias = "m25p80", /* Name of spi_driver for this device */
300 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
301 .bus_num = 0, /* Framework bus number */
302 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
303 .platform_data = &bfin_spi_flash_data,
304 .controller_data = &spi_flash_chip_info,
308 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
309 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
311 .modalias = "ad183x",
312 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
317 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
319 .modalias = "mmc_spi",
320 .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
322 .chip_select = GPIO_PH3 + MAX_CTRL_CS,
323 .controller_data = &mmc_spi_chip_info,
327 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
329 .modalias = "spidev",
330 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
337 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
338 /* SPI controller data */
339 static struct bfin5xx_spi_master bfin_spi0_info = {
340 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
341 .enable_dma = 1, /* master has the ability to do dma transfer */
342 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
346 static struct resource bfin_spi0_resource[] = {
348 .start = SPI0_REGBASE,
349 .end = SPI0_REGBASE + 0xFF,
350 .flags = IORESOURCE_MEM,
355 .flags = IORESOURCE_DMA,
360 .flags = IORESOURCE_IRQ,
364 static struct platform_device bfin_spi0_device = {
366 .id = 0, /* Bus number */
367 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
368 .resource = bfin_spi0_resource,
370 .platform_data = &bfin_spi0_info, /* Passed to driver */
373 #endif /* spi master and devices */
375 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
376 #ifdef CONFIG_SERIAL_BFIN_UART0
377 static struct resource bfin_uart0_resources[] = {
381 .flags = IORESOURCE_MEM,
384 .start = IRQ_UART0_RX,
385 .end = IRQ_UART0_RX+1,
386 .flags = IORESOURCE_IRQ,
389 .start = IRQ_UART0_ERROR,
390 .end = IRQ_UART0_ERROR,
391 .flags = IORESOURCE_IRQ,
394 .start = CH_UART0_TX,
396 .flags = IORESOURCE_DMA,
399 .start = CH_UART0_RX,
401 .flags = IORESOURCE_DMA,
405 static unsigned short bfin_uart0_peripherals[] = {
406 P_UART0_TX, P_UART0_RX, 0
409 static struct platform_device bfin_uart0_device = {
412 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
413 .resource = bfin_uart0_resources,
415 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
419 #ifdef CONFIG_SERIAL_BFIN_UART1
420 static struct resource bfin_uart1_resources[] = {
424 .flags = IORESOURCE_MEM,
427 .start = IRQ_UART1_RX,
428 .end = IRQ_UART1_RX+1,
429 .flags = IORESOURCE_IRQ,
432 .start = IRQ_UART1_ERROR,
433 .end = IRQ_UART1_ERROR,
434 .flags = IORESOURCE_IRQ,
437 .start = CH_UART1_TX,
439 .flags = IORESOURCE_DMA,
442 .start = CH_UART1_RX,
444 .flags = IORESOURCE_DMA,
446 #ifdef CONFIG_BFIN_UART1_CTSRTS
450 .flags = IORESOURCE_IO,
455 .flags = IORESOURCE_IO,
460 static unsigned short bfin_uart1_peripherals[] = {
461 P_UART1_TX, P_UART1_RX, 0
464 static struct platform_device bfin_uart1_device = {
467 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
468 .resource = bfin_uart1_resources,
470 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
476 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
477 #ifdef CONFIG_BFIN_SIR0
478 static struct resource bfin_sir0_resources[] = {
482 .flags = IORESOURCE_MEM,
485 .start = IRQ_UART0_RX,
486 .end = IRQ_UART0_RX+1,
487 .flags = IORESOURCE_IRQ,
490 .start = CH_UART0_RX,
491 .end = CH_UART0_RX+1,
492 .flags = IORESOURCE_DMA,
496 static struct platform_device bfin_sir0_device = {
499 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
500 .resource = bfin_sir0_resources,
503 #ifdef CONFIG_BFIN_SIR1
504 static struct resource bfin_sir1_resources[] = {
508 .flags = IORESOURCE_MEM,
511 .start = IRQ_UART1_RX,
512 .end = IRQ_UART1_RX+1,
513 .flags = IORESOURCE_IRQ,
516 .start = CH_UART1_RX,
517 .end = CH_UART1_RX+1,
518 .flags = IORESOURCE_DMA,
522 static struct platform_device bfin_sir1_device = {
525 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
526 .resource = bfin_sir1_resources,
531 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
532 #include <linux/input/ad7160.h>
533 static const struct ad7160_platform_data bfin_ad7160_ts_info = {
538 .coord_pref = AD7160_ORIG_TOP_LEFT,
539 .first_touch_window = 5,
541 .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
542 AD7160_EMIT_ABS_MT_PRESSURE |
543 AD7160_TRACKING_ID_ASCENDING,
544 .finger_act_ctrl = 0x64,
545 .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
546 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
547 AD7160_HAPTIC_SLOT_B(60) |
548 AD7160_HAPTIC_SLOT_B_LVL_LOW,
550 .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
551 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
552 AD7160_HAPTIC_SLOT_B(80) |
553 AD7160_HAPTIC_SLOT_B_LVL_LOW |
554 AD7160_HAPTIC_SLOT_C(120) |
555 AD7160_HAPTIC_SLOT_C_LVL_HIGH |
556 AD7160_HAPTIC_SLOT_D(30) |
557 AD7160_HAPTIC_SLOT_D_LVL_LOW,
561 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
562 static struct resource bfin_twi0_resource[] = {
564 .start = TWI0_REGBASE,
566 .flags = IORESOURCE_MEM,
571 .flags = IORESOURCE_IRQ,
575 static struct platform_device i2c_bfin_twi_device = {
576 .name = "i2c-bfin-twi",
578 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
579 .resource = bfin_twi0_resource,
583 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
584 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
586 I2C_BOARD_INFO("ad7160", 0x33),
588 .platform_data = (void *)&bfin_ad7160_ts_info,
593 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
594 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
595 static struct resource bfin_sport0_uart_resources[] = {
597 .start = SPORT0_TCR1,
598 .end = SPORT0_MRCS3+4,
599 .flags = IORESOURCE_MEM,
602 .start = IRQ_SPORT0_RX,
603 .end = IRQ_SPORT0_RX+1,
604 .flags = IORESOURCE_IRQ,
607 .start = IRQ_SPORT0_ERROR,
608 .end = IRQ_SPORT0_ERROR,
609 .flags = IORESOURCE_IRQ,
613 static unsigned short bfin_sport0_peripherals[] = {
614 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
615 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
618 static struct platform_device bfin_sport0_uart_device = {
619 .name = "bfin-sport-uart",
621 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
622 .resource = bfin_sport0_uart_resources,
624 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
628 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
629 static struct resource bfin_sport1_uart_resources[] = {
631 .start = SPORT1_TCR1,
632 .end = SPORT1_MRCS3+4,
633 .flags = IORESOURCE_MEM,
636 .start = IRQ_SPORT1_RX,
637 .end = IRQ_SPORT1_RX+1,
638 .flags = IORESOURCE_IRQ,
641 .start = IRQ_SPORT1_ERROR,
642 .end = IRQ_SPORT1_ERROR,
643 .flags = IORESOURCE_IRQ,
647 static unsigned short bfin_sport1_peripherals[] = {
648 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
649 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
652 static struct platform_device bfin_sport1_uart_device = {
653 .name = "bfin-sport-uart",
655 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
656 .resource = bfin_sport1_uart_resources,
658 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
664 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
665 #include <asm/bfin_rotary.h>
667 static struct bfin_rotary_platform_data bfin_rotary_data = {
668 /*.rotary_up_key = KEY_UP,*/
669 /*.rotary_down_key = KEY_DOWN,*/
670 .rotary_rel_code = REL_WHEEL,
671 .rotary_button_key = KEY_ENTER,
672 .debounce = 10, /* 0..17 */
673 .mode = ROT_QUAD_ENC | ROT_DEBE,
676 static struct resource bfin_rotary_resources[] = {
680 .flags = IORESOURCE_IRQ,
684 static struct platform_device bfin_rotary_device = {
685 .name = "bfin-rotary",
687 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
688 .resource = bfin_rotary_resources,
690 .platform_data = &bfin_rotary_data,
695 static const unsigned int cclk_vlev_datasheet[] = {
696 VRPAIR(VLEV_100, 400000000),
697 VRPAIR(VLEV_105, 426000000),
698 VRPAIR(VLEV_110, 500000000),
699 VRPAIR(VLEV_115, 533000000),
700 VRPAIR(VLEV_120, 600000000),
703 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
704 .tuple_tab = cclk_vlev_datasheet,
705 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
706 .vr_settling_time = 25 /* us */,
709 static struct platform_device bfin_dpmc = {
712 .platform_data = &bfin_dmpc_vreg_data,
716 static struct platform_device *stamp_devices[] __initdata = {
720 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
724 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
728 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
732 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
737 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
741 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
742 #ifdef CONFIG_SERIAL_BFIN_UART0
745 #ifdef CONFIG_SERIAL_BFIN_UART1
750 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
751 &bf52x_ra158z_device,
754 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
755 #ifdef CONFIG_BFIN_SIR0
758 #ifdef CONFIG_BFIN_SIR1
763 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
764 &i2c_bfin_twi_device,
767 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
768 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
769 &bfin_sport0_uart_device,
771 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
772 &bfin_sport1_uart_device,
776 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
780 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
781 &ad7160eval_flash_device,
784 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
788 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
793 static int __init ad7160eval_init(void)
795 printk(KERN_INFO "%s(): registering device resources\n", __func__);
796 i2c_register_board_info(0, bfin_i2c_board_info,
797 ARRAY_SIZE(bfin_i2c_board_info));
798 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
799 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
803 arch_initcall(ad7160eval_init);
805 static struct platform_device *ad7160eval_early_devices[] __initdata = {
806 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
807 #ifdef CONFIG_SERIAL_BFIN_UART0
810 #ifdef CONFIG_SERIAL_BFIN_UART1
815 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
816 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
817 &bfin_sport0_uart_device,
819 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
820 &bfin_sport1_uart_device,
825 void __init native_machine_early_platform_add_devices(void)
827 printk(KERN_INFO "register early platform devices\n");
828 early_platform_add_devices(ad7160eval_early_devices,
829 ARRAY_SIZE(ad7160eval_early_devices));
832 void native_machine_restart(char *cmd)
834 /* workaround reboot hang when booting from SPI */
835 if ((bfin_read_SYSCR() & 0x7) == 0x3)
836 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
839 void bfin_get_ether_addr(char *addr)
841 /* the MAC is stored in OTP memory page 0xDF */
844 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
846 ret = otp_read(0xDF, 0x00, &otp_mac);
848 char *otp_mac_p = (char *)&otp_mac;
849 for (ret = 0; ret < 6; ++ret)
850 addr[ret] = otp_mac_p[5 - ret];
853 EXPORT_SYMBOL(bfin_get_ether_addr);