2 * Copyright 2004-2009 Analog Devices Inc.
3 * Tony Kou (tonyko@lineo.ca)
5 * Licensed under the GPL-2 or later
8 #ifndef _BLACKFIN_SYSTEM_H
9 #define _BLACKFIN_SYSTEM_H
11 #include <linux/linkage.h>
12 #include <linux/irqflags.h>
13 #include <mach/anomaly.h>
14 #include <asm/cache.h>
19 * Force strict CPU ordering.
21 #define nop() __asm__ __volatile__ ("nop;\n\t" : : )
23 #define smp_rmb() rmb()
24 #define smp_wmb() wmb()
25 #define set_mb(var, value) do { var = value; mb(); } while (0)
26 #define smp_read_barrier_depends() read_barrier_depends()
29 asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
30 asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
31 asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
32 asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
33 unsigned long new, unsigned long old);
34 asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
35 unsigned long new, unsigned long old);
36 asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
37 unsigned long new, unsigned long old);
39 #ifdef __ARCH_SYNC_CORE_DCACHE
40 /* Force Core data cache coherence */
41 # define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
42 # define rmb() do { barrier(); smp_check_barrier(); } while (0)
43 # define wmb() do { barrier(); smp_mark_barrier(); } while (0)
44 # define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
46 # define mb() barrier()
47 # define rmb() barrier()
48 # define wmb() barrier()
49 # define read_barrier_depends() do { } while (0)
52 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
59 tmp = __raw_xchg_1_asm(ptr, x);
62 tmp = __raw_xchg_2_asm(ptr, x);
65 tmp = __raw_xchg_4_asm(ptr, x);
73 * Atomic compare and exchange. Compare OLD with MEM, if identical,
74 * store NEW in MEM. Return the initial value in MEM. Success is
75 * indicated by comparing RETURN with OLD.
77 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
78 unsigned long new, int size)
84 tmp = __raw_cmpxchg_1_asm(ptr, new, old);
87 tmp = __raw_cmpxchg_2_asm(ptr, new, old);
90 tmp = __raw_cmpxchg_4_asm(ptr, new, old);
96 #define cmpxchg(ptr, o, n) \
97 ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
98 (unsigned long)(n), sizeof(*(ptr))))
100 #else /* !CONFIG_SMP */
102 #define mb() barrier()
103 #define rmb() barrier()
104 #define wmb() barrier()
105 #define read_barrier_depends() do { } while (0)
107 struct __xchg_dummy {
108 unsigned long a[100];
110 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
112 #include <mach/blackfin.h>
114 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
117 unsigned long tmp = 0;
120 flags = hard_local_irq_save();
127 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
133 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
139 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
142 hard_local_irq_restore(flags);
146 #include <asm-generic/cmpxchg-local.h>
149 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
152 #define cmpxchg_local(ptr, o, n) \
153 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
154 (unsigned long)(n), sizeof(*(ptr))))
155 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
157 #include <asm-generic/cmpxchg.h>
159 #endif /* !CONFIG_SMP */
161 #define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
162 #define tas(ptr) ((void)xchg((ptr), 1))
164 #define prepare_to_switch() do { } while(0)
167 * switch_to(n) should switch tasks to task ptr, first checking that
168 * ptr isn't the current task, in which case it does nothing.
171 #include <asm/l1layout.h>
172 #include <asm/mem_map.h>
174 asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
177 #define switch_to(prev,next,last) \
179 memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
180 sizeof *L1_SCRATCH_TASK_INFO); \
181 memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
182 sizeof *L1_SCRATCH_TASK_INFO); \
183 (last) = resume (prev, next); \
186 #define switch_to(prev, next, last) \
188 (last) = resume(prev, next); \
192 #endif /* _BLACKFIN_SYSTEM_H */