2 * Copyright (C) 2006, 2008 Atmel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include <linux/err.h>
11 #include <linux/init.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/platform_device.h>
15 #include <linux/sysdev.h>
24 struct sys_device sysdev;
27 extern struct platform_device at32_intc0_device;
30 * TODO: We may be able to implement mask/unmask by setting IxM flags
31 * in the status register.
33 static void intc_mask_irq(unsigned int irq)
38 static void intc_unmask_irq(unsigned int irq)
43 static struct intc intc0 = {
46 .mask = intc_mask_irq,
47 .unmask = intc_unmask_irq,
52 * All interrupts go via intc at some point.
54 asmlinkage void do_IRQ(int level, struct pt_regs *regs)
56 struct irq_desc *desc;
57 struct pt_regs *old_regs;
59 unsigned long status_reg;
63 old_regs = set_irq_regs(regs);
67 irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
68 desc = irq_desc + irq;
69 desc->handle_irq(irq, desc);
72 * Clear all interrupt level masks so that we may handle
73 * interrupts during softirq processing. If this is a nested
74 * interrupt, interrupts must stay globally disabled until we
77 status_reg = sysreg_read(SR);
78 status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M)
79 | SYSREG_BIT(I2M) | SYSREG_BIT(I3M));
80 sysreg_write(SR, status_reg);
84 set_irq_regs(old_regs);
87 void __init init_IRQ(void)
89 extern void _evba(void);
90 extern void irq_level0(void);
91 struct resource *regs;
96 regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0);
98 printk(KERN_EMERG "intc: no mmio resource defined\n");
101 pclk = clk_get(&at32_intc0_device.dev, "pclk");
103 printk(KERN_EMERG "intc: no clock defined\n");
109 intc0.regs = ioremap(regs->start, regs->end - regs->start + 1);
111 printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n",
112 (unsigned long)regs->start);
117 * Initialize all interrupts to level 0 (lowest priority). The
118 * priority level may be changed by calling
119 * irq_set_priority().
122 offset = (unsigned long)&irq_level0 - (unsigned long)&_evba;
123 for (i = 0; i < NR_INTERNAL_IRQS; i++) {
124 intc_writel(&intc0, INTPR0 + 4 * i, offset);
125 readback = intc_readl(&intc0, INTPR0 + 4 * i);
126 if (readback == offset)
127 set_irq_chip_and_handler(i, &intc0.chip,
131 /* Unmask all interrupt levels */
132 sysreg_write(SR, (sysreg_read(SR)
133 & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M)));
138 panic("Interrupt controller initialization failed!\n");
141 static struct sysdev_class intc_class = {
145 static int __init intc_init_sysdev(void)
149 ret = sysdev_class_register(&intc_class);
154 intc0.sysdev.cls = &intc_class;
155 ret = sysdev_register(&intc0.sysdev);
159 device_initcall(intc_init_sysdev);
161 unsigned long intc_get_pending(unsigned int group)
163 return intc_readl(&intc0, INTREQ0 + 4 * group);
165 EXPORT_SYMBOL_GPL(intc_get_pending);