2 * Copyright (C) 2004-2007 Atmel Corporation
4 * Based on MIPS implementation arch/mips/kernel/time.c
5 * Copyright 2001 MontaVista Software Inc.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/clk.h>
13 #include <linux/clocksource.h>
14 #include <linux/time.h>
15 #include <linux/module.h>
16 #include <linux/interrupt.h>
17 #include <linux/irq.h>
18 #include <linux/kernel_stat.h>
19 #include <linux/errno.h>
20 #include <linux/init.h>
21 #include <linux/profile.h>
22 #include <linux/sysdev.h>
23 #include <linux/err.h>
25 #include <asm/div64.h>
26 #include <asm/sysreg.h>
28 #include <asm/sections.h>
30 /* how many counter cycles in a jiffy? */
31 static u32 cycles_per_jiffy;
33 /* the count value for the next timer interrupt */
36 cycle_t __weak read_cycle_count(void)
38 return (cycle_t)sysreg_read(COUNT);
42 * The architectural cycle count registers are a fine clocksource unless
43 * the system idle loop use sleep states like "idle": the CPU cycles
44 * measured by COUNT (and COMPARE) don't happen during sleep states.
45 * So we rate the clocksource using COUNT as very low quality.
47 struct clocksource __weak clocksource_avr32 = {
50 .read = read_cycle_count,
51 .mask = CLOCKSOURCE_MASK(32),
53 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
56 irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
58 struct irqaction timer_irqaction = {
59 .handler = timer_interrupt,
60 .flags = IRQF_DISABLED,
64 static void avr32_timer_ack(void)
68 /* Ack this timer interrupt and set the next one */
69 expirelo += cycles_per_jiffy;
70 /* setting COMPARE to 0 stops the COUNT-COMPARE */
72 sysreg_write(COMPARE, expirelo + 1);
74 sysreg_write(COMPARE, expirelo);
77 /* Check to see if we have missed any timer interrupts */
78 count = sysreg_read(COUNT);
79 if ((count - expirelo) < 0x7fffffff) {
80 expirelo = count + cycles_per_jiffy;
81 sysreg_write(COMPARE, expirelo);
85 int __weak avr32_hpt_init(void)
88 unsigned long mult, shift, count_hz;
90 count_hz = clk_get_rate(boot_cpu_data.clk);
91 shift = clocksource_avr32.shift;
92 mult = clocksource_hz2mult(count_hz, shift);
93 clocksource_avr32.mult = mult;
103 cycles_per_jiffy = tmp;
106 ret = setup_irq(0, &timer_irqaction);
108 pr_debug("timer: could not request IRQ 0: %d\n", ret);
112 printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
114 ((count_hz + 500) / 1000) / 1000,
115 ((count_hz + 500) / 1000) % 1000);
121 * Taken from MIPS c0_hpt_timer_init().
123 * The reason COUNT is written twice is probably to make sure we don't get any
124 * timer interrupts while we are messing with the counter.
126 int __weak avr32_hpt_start(void)
128 u32 count = sysreg_read(COUNT);
129 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
130 sysreg_write(COUNT, expirelo - cycles_per_jiffy);
131 sysreg_write(COMPARE, expirelo);
132 sysreg_write(COUNT, count);
138 * local_timer_interrupt() does profiling and process accounting on a
141 * In UP mode, it is invoked from the (global) timer_interrupt.
143 void local_timer_interrupt(int irq, void *dev_id)
146 profile_tick(CPU_PROFILING);
147 update_process_times(user_mode(get_irq_regs()));
150 irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
152 /* ack timer interrupt and try to set next interrupt */
156 * Call the generic timer interrupt handler
158 write_seqlock(&xtime_lock);
160 write_sequnlock(&xtime_lock);
163 * In UP mode, we call local_timer_interrupt() to do profiling
164 * and process accounting.
166 * SMP is not supported yet.
168 local_timer_interrupt(irq, dev_id);
173 void __init time_init(void)
178 * Make sure we don't get any COMPARE interrupts before we can
181 sysreg_write(COMPARE, 0);
183 xtime.tv_sec = mktime(2007, 1, 1, 0, 0, 0);
186 set_normalized_timespec(&wall_to_monotonic,
187 -xtime.tv_sec, -xtime.tv_nsec);
189 ret = avr32_hpt_init();
191 pr_debug("timer: failed setup: %d\n", ret);
195 ret = clocksource_register(&clocksource_avr32);
197 pr_debug("timer: could not register clocksource: %d\n", ret);
199 ret = avr32_hpt_start();
201 pr_debug("timer: failed starting: %d\n", ret);