2 * Low-level exception handling code
4 * Copyright (C) 2012 ARM Ltd.
5 * Authors: Catalin Marinas <catalin.marinas@arm.com>
6 * Will Deacon <will.deacon@arm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/init.h>
22 #include <linux/linkage.h>
24 #include <asm/assembler.h>
25 #include <asm/asm-offsets.h>
26 #include <asm/errno.h>
27 #include <asm/thread_info.h>
28 #include <asm/unistd.h>
29 #include <asm/unistd32.h>
40 .macro kernel_entry, el, regsize = 64
41 sub sp, sp, #S_FRAME_SIZE - S_LR // room for LR, SP, SPSR, ELR
43 mov w0, w0 // zero upper 32 bits of x0
63 add x21, sp, #S_FRAME_SIZE
67 stp lr, x21, [sp, #S_LR]
68 stp x22, x23, [sp, #S_PC]
71 * Set syscallno to -1 by default (overridden later if real syscall).
75 str x21, [sp, #S_SYSCALLNO]
79 * Registers that may be useful after this macro is invoked:
83 * x23 - aborted PSTATE
87 .macro kernel_exit, el, ret = 0
88 ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
90 ldr x23, [sp, #S_SP] // load return stack pointer
93 ldr x1, [sp, #S_X1] // preserve x0 (syscall return)
98 pop x2, x3 // load the rest of the registers
102 msr elr_el1, x21 // set up the return data
117 ldr lr, [sp], #S_FRAME_SIZE - S_LR // load LR and restore SP
118 eret // return to kernel
121 .macro get_thread_info, rd
123 and \rd, \rd, #~((1 << 13) - 1) // top of 8K stack
127 * These are the registers used in the syscall handler, and allow us to
128 * have in theory up to 7 arguments to a function - x0 to x6.
130 * x7 is reserved for the system call number in 32-bit mode.
132 sc_nr .req x25 // number of system calls
133 scno .req x26 // syscall number
134 stbl .req x27 // syscall table pointer
135 tsk .req x28 // current thread_info
138 * Interrupt handling.
141 ldr x1, handle_arch_irq
158 ventry el1_sync_invalid // Synchronous EL1t
159 ventry el1_irq_invalid // IRQ EL1t
160 ventry el1_fiq_invalid // FIQ EL1t
161 ventry el1_error_invalid // Error EL1t
163 ventry el1_sync // Synchronous EL1h
164 ventry el1_irq // IRQ EL1h
165 ventry el1_fiq_invalid // FIQ EL1h
166 ventry el1_error_invalid // Error EL1h
168 ventry el0_sync // Synchronous 64-bit EL0
169 ventry el0_irq // IRQ 64-bit EL0
170 ventry el0_fiq_invalid // FIQ 64-bit EL0
171 ventry el0_error_invalid // Error 64-bit EL0
174 ventry el0_sync_compat // Synchronous 32-bit EL0
175 ventry el0_irq_compat // IRQ 32-bit EL0
176 ventry el0_fiq_invalid_compat // FIQ 32-bit EL0
177 ventry el0_error_invalid_compat // Error 32-bit EL0
179 ventry el0_sync_invalid // Synchronous 32-bit EL0
180 ventry el0_irq_invalid // IRQ 32-bit EL0
181 ventry el0_fiq_invalid // FIQ 32-bit EL0
182 ventry el0_error_invalid // Error 32-bit EL0
187 * Invalid mode handlers
189 .macro inv_entry, el, reason, regsize = 64
190 kernel_entry el, \regsize
198 inv_entry 0, BAD_SYNC
199 ENDPROC(el0_sync_invalid)
203 ENDPROC(el0_irq_invalid)
207 ENDPROC(el0_fiq_invalid)
210 inv_entry 0, BAD_ERROR
211 ENDPROC(el0_error_invalid)
214 el0_fiq_invalid_compat:
215 inv_entry 0, BAD_FIQ, 32
216 ENDPROC(el0_fiq_invalid_compat)
218 el0_error_invalid_compat:
219 inv_entry 0, BAD_ERROR, 32
220 ENDPROC(el0_error_invalid_compat)
224 inv_entry 1, BAD_SYNC
225 ENDPROC(el1_sync_invalid)
229 ENDPROC(el1_irq_invalid)
233 ENDPROC(el1_fiq_invalid)
236 inv_entry 1, BAD_ERROR
237 ENDPROC(el1_error_invalid)
245 mrs x1, esr_el1 // read the syndrome register
246 lsr x24, x1, #26 // exception class
247 cmp x24, #0x25 // data abort in EL1
249 cmp x24, #0x18 // configurable trap
251 cmp x24, #0x26 // stack alignment exception
253 cmp x24, #0x22 // pc alignment exception
255 cmp x24, #0x00 // unknown exception in EL1
257 cmp x24, #0x30 // debug exception in EL1
262 * Data abort handling
265 enable_dbg_if_not_stepping x2
266 // re-enable interrupts if they were enabled in the aborted context
267 tbnz x23, #7, 1f // PSR_I_BIT
270 mov x2, sp // struct pt_regs
273 // disable interrupts before pulling preserved data off the stack
278 * Stack or PC alignment exception handling
286 * Undefined instruction
292 * Debug exception handling
294 tbz x24, #0, el1_inv // EL1 only
296 mov x2, sp // struct pt_regs
297 bl do_debug_exception
301 // TODO: add support for undefined instructions in kernel mode
311 enable_dbg_if_not_stepping x0
312 #ifdef CONFIG_TRACE_IRQFLAGS
313 bl trace_hardirqs_off
315 #ifdef CONFIG_PREEMPT
317 ldr x24, [tsk, #TI_PREEMPT] // get preempt count
318 add x0, x24, #1 // increment it
319 str x0, [tsk, #TI_PREEMPT]
322 #ifdef CONFIG_PREEMPT
323 str x24, [tsk, #TI_PREEMPT] // restore preempt count
324 cbnz x24, 1f // preempt count != 0
325 ldr x0, [tsk, #TI_FLAGS] // get flags
326 tbz x0, #TIF_NEED_RESCHED, 1f // needs rescheduling?
330 #ifdef CONFIG_TRACE_IRQFLAGS
336 #ifdef CONFIG_PREEMPT
340 bl preempt_schedule_irq // irq en/disable is done inside
341 ldr x0, [tsk, #TI_FLAGS] // get new tasks TI_FLAGS
342 tbnz x0, #TIF_NEED_RESCHED, 1b // needs rescheduling?
352 mrs x25, esr_el1 // read the syndrome register
353 lsr x24, x25, #26 // exception class
354 cmp x24, #0x15 // SVC in 64-bit state
356 adr lr, ret_from_exception
357 cmp x24, #0x24 // data abort in EL0
359 cmp x24, #0x20 // instruction abort in EL0
361 cmp x24, #0x07 // FP/ASIMD access
363 cmp x24, #0x2c // FP/ASIMD exception
365 cmp x24, #0x18 // configurable trap
367 cmp x24, #0x26 // stack alignment exception
369 cmp x24, #0x22 // pc alignment exception
371 cmp x24, #0x00 // unknown exception in EL0
373 cmp x24, #0x30 // debug exception in EL0
381 mrs x25, esr_el1 // read the syndrome register
382 lsr x24, x25, #26 // exception class
383 cmp x24, #0x11 // SVC in 32-bit state
385 adr lr, ret_from_exception
386 cmp x24, #0x24 // data abort in EL0
388 cmp x24, #0x20 // instruction abort in EL0
390 cmp x24, #0x07 // FP/ASIMD access
392 cmp x24, #0x28 // FP/ASIMD exception
394 cmp x24, #0x00 // unknown exception in EL0
396 cmp x24, #0x30 // debug exception in EL0
401 * AArch32 syscall handling
403 adr stbl, compat_sys_call_table // load compat syscall table pointer
404 uxtw scno, w7 // syscall number in w7 (r7)
405 mov sc_nr, #__NR_compat_syscalls
416 * Data abort handling
422 // enable interrupts before calling the main handler
429 * Instruction abort handling
435 // enable interrupts before calling the main handler
437 orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts
442 * Floating Point or Advanced SIMD access
449 * Floating Point or Advanced SIMD exception
456 * Stack or PC alignment exception handling
462 // enable interrupts before calling the main handler
469 * Undefined instruction
475 * Debug exception handling
477 tbnz x24, #0, el0_inv // EL0 only
497 #ifdef CONFIG_TRACE_IRQFLAGS
498 bl trace_hardirqs_off
501 #ifdef CONFIG_PREEMPT
502 ldr x24, [tsk, #TI_PREEMPT] // get preempt count
503 add x23, x24, #1 // increment it
504 str x23, [tsk, #TI_PREEMPT]
507 #ifdef CONFIG_PREEMPT
508 ldr x0, [tsk, #TI_PREEMPT]
509 str x24, [tsk, #TI_PREEMPT]
516 #ifdef CONFIG_TRACE_IRQFLAGS
523 * This is the return code to user mode for abort handlers
528 ENDPROC(ret_from_exception)
531 * Register switch for AArch64. The callee-saved registers need to be saved
532 * and restored. On entry:
533 * x0 = previous task_struct (must be preserved across the switch)
534 * x1 = next task_struct
535 * Previous and next are guaranteed not to be the same.
539 add x8, x0, #THREAD_CPU_CONTEXT
541 stp x19, x20, [x8], #16 // store callee-saved registers
542 stp x21, x22, [x8], #16
543 stp x23, x24, [x8], #16
544 stp x25, x26, [x8], #16
545 stp x27, x28, [x8], #16
546 stp x29, x9, [x8], #16
548 add x8, x1, #THREAD_CPU_CONTEXT
549 ldp x19, x20, [x8], #16 // restore callee-saved registers
550 ldp x21, x22, [x8], #16
551 ldp x23, x24, [x8], #16
552 ldp x25, x26, [x8], #16
553 ldp x27, x28, [x8], #16
554 ldp x29, x9, [x8], #16
558 ENDPROC(cpu_switch_to)
561 * This is the fast syscall return path. We do as little as possible here,
562 * and this includes saving x0 back into the kernel stack.
565 disable_irq // disable interrupts
566 ldr x1, [tsk, #TI_FLAGS]
567 and x2, x1, #_TIF_WORK_MASK
568 cbnz x2, fast_work_pending
569 tbz x1, #TIF_SINGLESTEP, fast_exit
573 kernel_exit 0, ret = 1
576 * Ok, we need to do extra processing, enter the slow path.
579 str x0, [sp, #S_X0] // returned x0
581 tbnz x1, #TIF_NEED_RESCHED, work_resched
582 /* TIF_SIGPENDING or TIF_NOTIFY_RESUME case */
583 ldr x2, [sp, #S_PSTATE]
585 tst x2, #PSR_MODE_MASK // user mode regs?
586 b.ne no_work_pending // returning to kernel
587 enable_irq // enable interrupts for do_notify_resume()
595 * "slow" syscall return path.
598 disable_irq // disable interrupts
599 ldr x1, [tsk, #TI_FLAGS]
600 and x2, x1, #_TIF_WORK_MASK
601 cbnz x2, work_pending
602 tbz x1, #TIF_SINGLESTEP, no_work_pending
606 kernel_exit 0, ret = 0
610 * This is how we return from a fork.
614 cbz x19, 1f // not a kernel thread
617 1: get_thread_info tsk
619 ENDPROC(ret_from_fork)
626 adrp stbl, sys_call_table // load syscall table pointer
627 uxtw scno, w8 // syscall number in w8
628 mov sc_nr, #__NR_syscalls
629 el0_svc_naked: // compat entry point
630 stp x0, scno, [sp, #S_ORIG_X0] // save the original x0 and syscall number
637 ldr x16, [tsk, #TI_FLAGS] // check for syscall tracing
638 tbnz x16, #TIF_SYSCALL_TRACE, __sys_trace // are we tracing syscalls?
639 adr lr, ret_fast_syscall // return address
640 cmp scno, sc_nr // check upper syscall limit
642 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
643 br x16 // call sys_* routine
650 * This is the really slow path. We're going to be doing context
651 * switches, and waiting for our parent to respond.
655 mov w0, #0 // trace entry
657 adr lr, __sys_trace_return // return address
658 uxtw scno, w0 // syscall number (possibly new)
659 mov x1, sp // pointer to regs
660 cmp scno, sc_nr // check upper syscall limit
662 ldp x0, x1, [sp] // restore the syscall args
663 ldp x2, x3, [sp, #S_X2]
664 ldp x4, x5, [sp, #S_X4]
665 ldp x6, x7, [sp, #S_X6]
666 ldr x16, [stbl, scno, lsl #3] // address in the syscall table
667 br x16 // call sys_* routine
670 str x0, [sp] // save returned x0
672 mov w0, #1 // trace exit
677 * Special system call wrappers.
679 ENTRY(sys_execve_wrapper)
682 ENDPROC(sys_execve_wrapper)
684 ENTRY(sys_clone_wrapper)
687 ENDPROC(sys_clone_wrapper)
689 ENTRY(sys_rt_sigreturn_wrapper)
692 ENDPROC(sys_rt_sigreturn_wrapper)
694 ENTRY(sys_sigaltstack_wrapper)
697 ENDPROC(sys_sigaltstack_wrapper)
699 ENTRY(handle_arch_irq)