2 * linux/arch/arm/vfp/vfp.h
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 static inline u32 vfp_shiftright32jamming(u32 val, unsigned int shift)
16 val = val >> shift | ((val << (32 - shift)) != 0);
23 static inline u64 vfp_shiftright64jamming(u64 val, unsigned int shift)
27 val = val >> shift | ((val << (64 - shift)) != 0);
34 static inline u32 vfp_hi64to32jamming(u64 val)
39 "cmp %Q1, #1 @ vfp_hi64to32jamming\n\t"
42 : "=r" (v) : "r" (val) : "cc");
47 static inline void add128(u64 *resh, u64 *resl, u64 nh, u64 nl, u64 mh, u64 ml)
49 asm( "adds %Q0, %Q2, %Q4\n\t"
50 "adcs %R0, %R2, %R4\n\t"
51 "adcs %Q1, %Q3, %Q5\n\t"
53 : "=r" (nl), "=r" (nh)
54 : "0" (nl), "1" (nh), "r" (ml), "r" (mh)
60 static inline void sub128(u64 *resh, u64 *resl, u64 nh, u64 nl, u64 mh, u64 ml)
62 asm( "subs %Q0, %Q2, %Q4\n\t"
63 "sbcs %R0, %R2, %R4\n\t"
64 "sbcs %Q1, %Q3, %Q5\n\t"
65 "sbc %R1, %R3, %R5\n\t"
66 : "=r" (nl), "=r" (nh)
67 : "0" (nl), "1" (nh), "r" (ml), "r" (mh)
73 static inline void mul64to128(u64 *resh, u64 *resl, u64 n, u64 m)
90 rh += ((u64)(rma < rmb) << 32) + (rma >> 32);
100 static inline void shift64left(u64 *resh, u64 *resl, u64 n)
106 static inline u64 vfp_hi64multiply64(u64 n, u64 m)
109 mul64to128(&rh, &rl, n, m);
110 return rh | (rl != 0);
113 static inline u64 vfp_estimate_div128to64(u64 nh, u64 nl, u64 m)
115 u64 mh, ml, remh, reml, termh, terml, z;
120 if (mh << 32 <= nh) {
121 z = 0xffffffff00000000ULL;
127 mul64to128(&termh, &terml, m, z);
128 sub128(&remh, &reml, nh, nl, termh, terml);
130 while ((s64)remh < 0) {
132 add128(&remh, &reml, remh, reml, mh, ml);
134 remh = (remh << 32) | (reml >> 32);
135 if (mh << 32 <= remh) {
145 * Operations on unpacked elements
147 #define vfp_sign_negate(sign) (sign ^ 0x8000)
158 extern s32 vfp_get_float(unsigned int reg);
159 extern void vfp_put_float(unsigned int reg, s32 val);
162 * VFP_SINGLE_MANTISSA_BITS - number of bits in the mantissa
163 * VFP_SINGLE_EXPONENT_BITS - number of bits in the exponent
164 * VFP_SINGLE_LOW_BITS - number of low bits in the unpacked significand
165 * which are not propagated to the float upon packing.
167 #define VFP_SINGLE_MANTISSA_BITS (23)
168 #define VFP_SINGLE_EXPONENT_BITS (8)
169 #define VFP_SINGLE_LOW_BITS (32 - VFP_SINGLE_MANTISSA_BITS - 2)
170 #define VFP_SINGLE_LOW_BITS_MASK ((1 << VFP_SINGLE_LOW_BITS) - 1)
173 * The bit in an unpacked float which indicates that it is a quiet NaN
175 #define VFP_SINGLE_SIGNIFICAND_QNAN (1 << (VFP_SINGLE_MANTISSA_BITS - 1 + VFP_SINGLE_LOW_BITS))
178 * Operations on packed single-precision numbers
180 #define vfp_single_packed_sign(v) ((v) & 0x80000000)
181 #define vfp_single_packed_negate(v) ((v) ^ 0x80000000)
182 #define vfp_single_packed_abs(v) ((v) & ~0x80000000)
183 #define vfp_single_packed_exponent(v) (((v) >> VFP_SINGLE_MANTISSA_BITS) & ((1 << VFP_SINGLE_EXPONENT_BITS) - 1))
184 #define vfp_single_packed_mantissa(v) ((v) & ((1 << VFP_SINGLE_MANTISSA_BITS) - 1))
187 * Unpack a single-precision float. Note that this returns the magnitude
188 * of the single-precision float mantissa with the 1. if necessary,
191 static inline void vfp_single_unpack(struct vfp_single *s, s32 val)
195 s->sign = vfp_single_packed_sign(val) >> 16,
196 s->exponent = vfp_single_packed_exponent(val);
198 significand = (u32) val;
199 significand = (significand << (32 - VFP_SINGLE_MANTISSA_BITS)) >> 2;
200 if (s->exponent && s->exponent != 255)
201 significand |= 0x40000000;
202 s->significand = significand;
206 * Re-pack a single-precision float. This assumes that the float is
207 * already normalised such that the MSB is bit 30, _not_ bit 31.
209 static inline s32 vfp_single_pack(struct vfp_single *s)
212 val = (s->sign << 16) +
213 (s->exponent << VFP_SINGLE_MANTISSA_BITS) +
214 (s->significand >> VFP_SINGLE_LOW_BITS);
218 #define VFP_NUMBER (1<<0)
219 #define VFP_ZERO (1<<1)
220 #define VFP_DENORMAL (1<<2)
221 #define VFP_INFINITY (1<<3)
222 #define VFP_NAN (1<<4)
223 #define VFP_NAN_SIGNAL (1<<5)
225 #define VFP_QNAN (VFP_NAN)
226 #define VFP_SNAN (VFP_NAN|VFP_NAN_SIGNAL)
228 static inline int vfp_single_type(struct vfp_single *s)
230 int type = VFP_NUMBER;
231 if (s->exponent == 255) {
232 if (s->significand == 0)
234 else if (s->significand & VFP_SINGLE_SIGNIFICAND_QNAN)
238 } else if (s->exponent == 0) {
239 if (s->significand == 0)
242 type |= VFP_DENORMAL;
248 #define vfp_single_normaliseround(sd,vsd,fpscr,except,func) __vfp_single_normaliseround(sd,vsd,fpscr,except)
249 u32 __vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions);
251 u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions, const char *func);
264 * VFP_REG_ZERO is a special register number for vfp_get_double
265 * which returns (double)0.0. This is useful for the compare with
268 #define VFP_REG_ZERO 16
269 extern u64 vfp_get_double(unsigned int reg);
270 extern void vfp_put_double(unsigned int reg, u64 val);
272 #define VFP_DOUBLE_MANTISSA_BITS (52)
273 #define VFP_DOUBLE_EXPONENT_BITS (11)
274 #define VFP_DOUBLE_LOW_BITS (64 - VFP_DOUBLE_MANTISSA_BITS - 2)
275 #define VFP_DOUBLE_LOW_BITS_MASK ((1 << VFP_DOUBLE_LOW_BITS) - 1)
278 * The bit in an unpacked double which indicates that it is a quiet NaN
280 #define VFP_DOUBLE_SIGNIFICAND_QNAN (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1 + VFP_DOUBLE_LOW_BITS))
283 * Operations on packed single-precision numbers
285 #define vfp_double_packed_sign(v) ((v) & (1ULL << 63))
286 #define vfp_double_packed_negate(v) ((v) ^ (1ULL << 63))
287 #define vfp_double_packed_abs(v) ((v) & ~(1ULL << 63))
288 #define vfp_double_packed_exponent(v) (((v) >> VFP_DOUBLE_MANTISSA_BITS) & ((1 << VFP_DOUBLE_EXPONENT_BITS) - 1))
289 #define vfp_double_packed_mantissa(v) ((v) & ((1ULL << VFP_DOUBLE_MANTISSA_BITS) - 1))
292 * Unpack a double-precision float. Note that this returns the magnitude
293 * of the double-precision float mantissa with the 1. if necessary,
296 static inline void vfp_double_unpack(struct vfp_double *s, s64 val)
300 s->sign = vfp_double_packed_sign(val) >> 48;
301 s->exponent = vfp_double_packed_exponent(val);
303 significand = (u64) val;
304 significand = (significand << (64 - VFP_DOUBLE_MANTISSA_BITS)) >> 2;
305 if (s->exponent && s->exponent != 2047)
306 significand |= (1ULL << 62);
307 s->significand = significand;
311 * Re-pack a double-precision float. This assumes that the float is
312 * already normalised such that the MSB is bit 30, _not_ bit 31.
314 static inline s64 vfp_double_pack(struct vfp_double *s)
317 val = ((u64)s->sign << 48) +
318 ((u64)s->exponent << VFP_DOUBLE_MANTISSA_BITS) +
319 (s->significand >> VFP_DOUBLE_LOW_BITS);
323 static inline int vfp_double_type(struct vfp_double *s)
325 int type = VFP_NUMBER;
326 if (s->exponent == 2047) {
327 if (s->significand == 0)
329 else if (s->significand & VFP_DOUBLE_SIGNIFICAND_QNAN)
333 } else if (s->exponent == 0) {
334 if (s->significand == 0)
337 type |= VFP_DENORMAL;
342 u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func);
347 extern u32 vfp_get_sys(unsigned int reg);
348 extern void vfp_put_sys(unsigned int reg, u32 val);
350 u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand);
353 * A special flag to tell the normalisation code not to normalise.
355 #define VFP_NAN_FLAG 0x100