arch/arm/plat-samsung/devs.c

   1 /* linux/arch/arm/plat-samsung/devs.c
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * Base SAMSUNG platform device definitions
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/types.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/list.h>
  17 #include <linux/timer.h>
  18 #include <linux/init.h>
  19 #include <linux/serial_core.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/io.h>
  22 #include <linux/slab.h>
  23 #include <linux/string.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/fb.h>
  26 #include <linux/gfp.h>
  27 #include <linux/mtd/mtd.h>
  28 #include <linux/mtd/onenand.h>
  29 #include <linux/mtd/partitions.h>
  30 #include <linux/mmc/host.h>
  31 #include <linux/ioport.h>
  32
  33 #include <asm/irq.h>
  34 #include <asm/pmu.h>
  35 #include <asm/mach/arch.h>
  36 #include <asm/mach/map.h>
  37 #include <asm/mach/irq.h>
  38
  39 #include <mach/hardware.h>
  40 #include <mach/dma.h>
  41 #include <mach/irqs.h>
  42 #include <mach/map.h>
  43
  44 #include <plat/cpu.h>
  45 #include <plat/devs.h>
  46 #include <plat/adc.h>
  47 #include <plat/ata.h>
  48 #include <plat/ehci.h>
  49 #include <plat/fb.h>
  50 #include <plat/fb-s3c2410.h>
  51 #include <plat/hwmon.h>
  52 #include <plat/iic.h>
  53 #include <plat/keypad.h>
  54 #include <plat/mci.h>
  55 #include <plat/nand.h>
  56 #include <plat/sdhci.h>
  57 #include <plat/ts.h>
  58 #include <plat/udc.h>
  59 #include <plat/usb-control.h>
  60 #include <plat/usb-phy.h>
  61 #include <plat/regs-iic.h>
  62 #include <plat/regs-serial.h>
  63 #include <plat/regs-spi.h>
  64 #include <plat/s3c64xx-spi.h>
  65
  66 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  67
  68 /* AC97 */
  69 #ifdef CONFIG_CPU_S3C2440
  70 static struct resource s3c_ac97_resource[] = {
  71         [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  72         [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  73         [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  74         [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  75         [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  76 };
  77
  78 struct platform_device s3c_device_ac97 = {
  79         .name           = "samsung-ac97",
  80         .id             = -1,
  81         .num_resources  = ARRAY_SIZE(s3c_ac97_resource),
  82         .resource       = s3c_ac97_resource,
  83         .dev            = {
  84                 .dma_mask               = &samsung_device_dma_mask,
  85                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  86         }
  87 };
  88 #endif /* CONFIG_CPU_S3C2440 */
  89
  90 /* ADC */
  91
  92 #ifdef CONFIG_PLAT_S3C24XX
  93 static struct resource s3c_adc_resource[] = {
  94         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  95         [1] = DEFINE_RES_IRQ(IRQ_TC),
  96         [2] = DEFINE_RES_IRQ(IRQ_ADC),
  97 };
  98
  99 struct platform_device s3c_device_adc = {
 100         .name           = "s3c24xx-adc",
 101         .id             = -1,
 102         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
 103         .resource       = s3c_adc_resource,
 104 };
 105 #endif /* CONFIG_PLAT_S3C24XX */
 106
 107 #if defined(CONFIG_SAMSUNG_DEV_ADC)
 108 static struct resource s3c_adc_resource[] = {
 109         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
 110         [1] = DEFINE_RES_IRQ(IRQ_TC),
 111         [2] = DEFINE_RES_IRQ(IRQ_ADC),
 112 };
 113
 114 struct platform_device s3c_device_adc = {
 115         .name           = "samsung-adc",
 116         .id             = -1,
 117         .num_resources  = ARRAY_SIZE(s3c_adc_resource),
 118         .resource       = s3c_adc_resource,
 119 };
 120 #endif /* CONFIG_SAMSUNG_DEV_ADC */
 121
 122 /* Camif Controller */
 123
 124 #ifdef CONFIG_CPU_S3C2440
 125 static struct resource s3c_camif_resource[] = {
 126         [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
 127         [1] = DEFINE_RES_IRQ(IRQ_CAM),
 128 };
 129
 130 struct platform_device s3c_device_camif = {
 131         .name           = "s3c2440-camif",
 132         .id             = -1,
 133         .num_resources  = ARRAY_SIZE(s3c_camif_resource),
 134         .resource       = s3c_camif_resource,
 135         .dev            = {
 136                 .dma_mask               = &samsung_device_dma_mask,
 137                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 138         }
 139 };
 140 #endif /* CONFIG_CPU_S3C2440 */
 141
 142 /* ASOC DMA */
 143
 144 struct platform_device samsung_asoc_dma = {
 145         .name           = "samsung-audio",
 146         .id             = -1,
 147         .dev            = {
 148                 .dma_mask               = &samsung_device_dma_mask,
 149                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 150         }
 151 };
 152
 153 struct platform_device samsung_asoc_idma = {
 154         .name           = "samsung-idma",
 155         .id             = -1,
 156         .dev            = {
 157                 .dma_mask               = &samsung_device_dma_mask,
 158                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 159         }
 160 };
 161
 162 /* FB */
 163
 164 #ifdef CONFIG_S3C_DEV_FB
 165 static struct resource s3c_fb_resource[] = {
 166         [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
 167         [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
 168         [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
 169         [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
 170 };
 171
 172 struct platform_device s3c_device_fb = {
 173         .name           = "s3c-fb",
 174         .id             = -1,
 175         .num_resources  = ARRAY_SIZE(s3c_fb_resource),
 176         .resource       = s3c_fb_resource,
 177         .dev            = {
 178                 .dma_mask               = &samsung_device_dma_mask,
 179                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 180         },
 181 };
 182
 183 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
 184 {
 185         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
 186                          &s3c_device_fb);
 187 }
 188 #endif /* CONFIG_S3C_DEV_FB */
 189
 190 /* FIMC */
 191
 192 #ifdef CONFIG_S5P_DEV_FIMC0
 193 static struct resource s5p_fimc0_resource[] = {
 194         [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
 195         [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
 196 };
 197
 198 struct platform_device s5p_device_fimc0 = {
 199         .name           = "s5p-fimc",
 200         .id             = 0,
 201         .num_resources  = ARRAY_SIZE(s5p_fimc0_resource),
 202         .resource       = s5p_fimc0_resource,
 203         .dev            = {
 204                 .dma_mask               = &samsung_device_dma_mask,
 205                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 206         },
 207 };
 208
 209 struct platform_device s5p_device_fimc_md = {
 210         .name   = "s5p-fimc-md",
 211         .id     = -1,
 212 };
 213 #endif /* CONFIG_S5P_DEV_FIMC0 */
 214
 215 #ifdef CONFIG_S5P_DEV_FIMC1
 216 static struct resource s5p_fimc1_resource[] = {
 217         [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
 218         [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
 219 };
 220
 221 struct platform_device s5p_device_fimc1 = {
 222         .name           = "s5p-fimc",
 223         .id             = 1,
 224         .num_resources  = ARRAY_SIZE(s5p_fimc1_resource),
 225         .resource       = s5p_fimc1_resource,
 226         .dev            = {
 227                 .dma_mask               = &samsung_device_dma_mask,
 228                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 229         },
 230 };
 231 #endif /* CONFIG_S5P_DEV_FIMC1 */
 232
 233 #ifdef CONFIG_S5P_DEV_FIMC2
 234 static struct resource s5p_fimc2_resource[] = {
 235         [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
 236         [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
 237 };
 238
 239 struct platform_device s5p_device_fimc2 = {
 240         .name           = "s5p-fimc",
 241         .id             = 2,
 242         .num_resources  = ARRAY_SIZE(s5p_fimc2_resource),
 243         .resource       = s5p_fimc2_resource,
 244         .dev            = {
 245                 .dma_mask               = &samsung_device_dma_mask,
 246                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 247         },
 248 };
 249 #endif /* CONFIG_S5P_DEV_FIMC2 */
 250
 251 #ifdef CONFIG_S5P_DEV_FIMC3
 252 static struct resource s5p_fimc3_resource[] = {
 253         [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
 254         [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
 255 };
 256
 257 struct platform_device s5p_device_fimc3 = {
 258         .name           = "s5p-fimc",
 259         .id             = 3,
 260         .num_resources  = ARRAY_SIZE(s5p_fimc3_resource),
 261         .resource       = s5p_fimc3_resource,
 262         .dev            = {
 263                 .dma_mask               = &samsung_device_dma_mask,
 264                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 265         },
 266 };
 267 #endif /* CONFIG_S5P_DEV_FIMC3 */
 268
 269 /* FIMD0 */
 270
 271 #ifdef CONFIG_S5P_DEV_FIMD0
 272 static struct resource s5p_fimd0_resource[] = {
 273         [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
 274         [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
 275         [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
 276         [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
 277 };
 278
 279 struct platform_device s5p_device_fimd0 = {
 280         .name           = "s5p-fb",
 281         .id             = 0,
 282         .num_resources  = ARRAY_SIZE(s5p_fimd0_resource),
 283         .resource       = s5p_fimd0_resource,
 284         .dev            = {
 285                 .dma_mask               = &samsung_device_dma_mask,
 286                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 287         },
 288 };
 289
 290 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
 291 {
 292         s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
 293                          &s5p_device_fimd0);
 294 }
 295 #endif /* CONFIG_S5P_DEV_FIMD0 */
 296
 297 /* HWMON */
 298
 299 #ifdef CONFIG_S3C_DEV_HWMON
 300 struct platform_device s3c_device_hwmon = {
 301         .name           = "s3c-hwmon",
 302         .id             = -1,
 303         .dev.parent     = &s3c_device_adc.dev,
 304 };
 305
 306 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
 307 {
 308         s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
 309                          &s3c_device_hwmon);
 310 }
 311 #endif /* CONFIG_S3C_DEV_HWMON */
 312
 313 /* HSMMC */
 314
 315 #ifdef CONFIG_S3C_DEV_HSMMC
 316 static struct resource s3c_hsmmc_resource[] = {
 317         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
 318         [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
 319 };
 320
 321 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
 322         .max_width      = 4,
 323         .host_caps      = (MMC_CAP_4_BIT_DATA |
 324                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 325         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 326 };
 327
 328 struct platform_device s3c_device_hsmmc0 = {
 329         .name           = "s3c-sdhci",
 330         .id             = 0,
 331         .num_resources  = ARRAY_SIZE(s3c_hsmmc_resource),
 332         .resource       = s3c_hsmmc_resource,
 333         .dev            = {
 334                 .dma_mask               = &samsung_device_dma_mask,
 335                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 336                 .platform_data          = &s3c_hsmmc0_def_platdata,
 337         },
 338 };
 339
 340 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 341 {
 342         s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
 343 }
 344 #endif /* CONFIG_S3C_DEV_HSMMC */
 345
 346 #ifdef CONFIG_S3C_DEV_HSMMC1
 347 static struct resource s3c_hsmmc1_resource[] = {
 348         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
 349         [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
 350 };
 351
 352 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
 353         .max_width      = 4,
 354         .host_caps      = (MMC_CAP_4_BIT_DATA |
 355                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 356         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 357 };
 358
 359 struct platform_device s3c_device_hsmmc1 = {
 360         .name           = "s3c-sdhci",
 361         .id             = 1,
 362         .num_resources  = ARRAY_SIZE(s3c_hsmmc1_resource),
 363         .resource       = s3c_hsmmc1_resource,
 364         .dev            = {
 365                 .dma_mask               = &samsung_device_dma_mask,
 366                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 367                 .platform_data          = &s3c_hsmmc1_def_platdata,
 368         },
 369 };
 370
 371 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 372 {
 373         s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
 374 }
 375 #endif /* CONFIG_S3C_DEV_HSMMC1 */
 376
 377 /* HSMMC2 */
 378
 379 #ifdef CONFIG_S3C_DEV_HSMMC2
 380 static struct resource s3c_hsmmc2_resource[] = {
 381         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
 382         [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
 383 };
 384
 385 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
 386         .max_width      = 4,
 387         .host_caps      = (MMC_CAP_4_BIT_DATA |
 388                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 389         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 390 };
 391
 392 struct platform_device s3c_device_hsmmc2 = {
 393         .name           = "s3c-sdhci",
 394         .id             = 2,
 395         .num_resources  = ARRAY_SIZE(s3c_hsmmc2_resource),
 396         .resource       = s3c_hsmmc2_resource,
 397         .dev            = {
 398                 .dma_mask               = &samsung_device_dma_mask,
 399                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 400                 .platform_data          = &s3c_hsmmc2_def_platdata,
 401         },
 402 };
 403
 404 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 405 {
 406         s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
 407 }
 408 #endif /* CONFIG_S3C_DEV_HSMMC2 */
 409
 410 #ifdef CONFIG_S3C_DEV_HSMMC3
 411 static struct resource s3c_hsmmc3_resource[] = {
 412         [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
 413         [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
 414 };
 415
 416 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
 417         .max_width      = 4,
 418         .host_caps      = (MMC_CAP_4_BIT_DATA |
 419                            MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
 420         .clk_type       = S3C_SDHCI_CLK_DIV_INTERNAL,
 421 };
 422
 423 struct platform_device s3c_device_hsmmc3 = {
 424         .name           = "s3c-sdhci",
 425         .id             = 3,
 426         .num_resources  = ARRAY_SIZE(s3c_hsmmc3_resource),
 427         .resource       = s3c_hsmmc3_resource,
 428         .dev            = {
 429                 .dma_mask               = &samsung_device_dma_mask,
 430                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 431                 .platform_data          = &s3c_hsmmc3_def_platdata,
 432         },
 433 };
 434
 435 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 436 {
 437         s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
 438 }
 439 #endif /* CONFIG_S3C_DEV_HSMMC3 */
 440
 441 /* I2C */
 442
 443 static struct resource s3c_i2c0_resource[] = {
 444         [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
 445         [1] = DEFINE_RES_IRQ(IRQ_IIC),
 446 };
 447
 448 struct platform_device s3c_device_i2c0 = {
 449         .name           = "s3c2410-i2c",
 450 #ifdef CONFIG_S3C_DEV_I2C1
 451         .id             = 0,
 452 #else
 453         .id             = -1,
 454 #endif
 455         .num_resources  = ARRAY_SIZE(s3c_i2c0_resource),
 456         .resource       = s3c_i2c0_resource,
 457 };
 458
 459 struct s3c2410_platform_i2c default_i2c_data __initdata = {
 460         .flags          = 0,
 461         .slave_addr     = 0x10,
 462         .frequency      = 100*1000,
 463         .sda_delay      = 100,
 464 };
 465
 466 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
 467 {
 468         struct s3c2410_platform_i2c *npd;
 469
 470         if (!pd)
 471                 pd = &default_i2c_data;
 472
 473         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 474                                &s3c_device_i2c0);
 475
 476         if (!npd->cfg_gpio)
 477                 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
 478 }
 479
 480 #ifdef CONFIG_S3C_DEV_I2C1
 481 static struct resource s3c_i2c1_resource[] = {
 482         [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
 483         [1] = DEFINE_RES_IRQ(IRQ_IIC1),
 484 };
 485
 486 struct platform_device s3c_device_i2c1 = {
 487         .name           = "s3c2410-i2c",
 488         .id             = 1,
 489         .num_resources  = ARRAY_SIZE(s3c_i2c1_resource),
 490         .resource       = s3c_i2c1_resource,
 491 };
 492
 493 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
 494 {
 495         struct s3c2410_platform_i2c *npd;
 496
 497         if (!pd) {
 498                 pd = &default_i2c_data;
 499                 pd->bus_num = 1;
 500         }
 501
 502         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 503                                &s3c_device_i2c1);
 504
 505         if (!npd->cfg_gpio)
 506                 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
 507 }
 508 #endif /* CONFIG_S3C_DEV_I2C1 */
 509
 510 #ifdef CONFIG_S3C_DEV_I2C2
 511 static struct resource s3c_i2c2_resource[] = {
 512         [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
 513         [1] = DEFINE_RES_IRQ(IRQ_IIC2),
 514 };
 515
 516 struct platform_device s3c_device_i2c2 = {
 517         .name           = "s3c2410-i2c",
 518         .id             = 2,
 519         .num_resources  = ARRAY_SIZE(s3c_i2c2_resource),
 520         .resource       = s3c_i2c2_resource,
 521 };
 522
 523 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
 524 {
 525         struct s3c2410_platform_i2c *npd;
 526
 527         if (!pd) {
 528                 pd = &default_i2c_data;
 529                 pd->bus_num = 2;
 530         }
 531
 532         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 533                                &s3c_device_i2c2);
 534
 535         if (!npd->cfg_gpio)
 536                 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
 537 }
 538 #endif /* CONFIG_S3C_DEV_I2C2 */
 539
 540 #ifdef CONFIG_S3C_DEV_I2C3
 541 static struct resource s3c_i2c3_resource[] = {
 542         [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
 543         [1] = DEFINE_RES_IRQ(IRQ_IIC3),
 544 };
 545
 546 struct platform_device s3c_device_i2c3 = {
 547         .name           = "s3c2440-i2c",
 548         .id             = 3,
 549         .num_resources  = ARRAY_SIZE(s3c_i2c3_resource),
 550         .resource       = s3c_i2c3_resource,
 551 };
 552
 553 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
 554 {
 555         struct s3c2410_platform_i2c *npd;
 556
 557         if (!pd) {
 558                 pd = &default_i2c_data;
 559                 pd->bus_num = 3;
 560         }
 561
 562         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 563                                &s3c_device_i2c3);
 564
 565         if (!npd->cfg_gpio)
 566                 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
 567 }
 568 #endif /*CONFIG_S3C_DEV_I2C3 */
 569
 570 #ifdef CONFIG_S3C_DEV_I2C4
 571 static struct resource s3c_i2c4_resource[] = {
 572         [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
 573         [1] = DEFINE_RES_IRQ(IRQ_IIC4),
 574 };
 575
 576 struct platform_device s3c_device_i2c4 = {
 577         .name           = "s3c2440-i2c",
 578         .id             = 4,
 579         .num_resources  = ARRAY_SIZE(s3c_i2c4_resource),
 580         .resource       = s3c_i2c4_resource,
 581 };
 582
 583 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
 584 {
 585         struct s3c2410_platform_i2c *npd;
 586
 587         if (!pd) {
 588                 pd = &default_i2c_data;
 589                 pd->bus_num = 4;
 590         }
 591
 592         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 593                                &s3c_device_i2c4);
 594
 595         if (!npd->cfg_gpio)
 596                 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
 597 }
 598 #endif /*CONFIG_S3C_DEV_I2C4 */
 599
 600 #ifdef CONFIG_S3C_DEV_I2C5
 601 static struct resource s3c_i2c5_resource[] = {
 602         [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
 603         [1] = DEFINE_RES_IRQ(IRQ_IIC5),
 604 };
 605
 606 struct platform_device s3c_device_i2c5 = {
 607         .name           = "s3c2440-i2c",
 608         .id             = 5,
 609         .num_resources  = ARRAY_SIZE(s3c_i2c5_resource),
 610         .resource       = s3c_i2c5_resource,
 611 };
 612
 613 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
 614 {
 615         struct s3c2410_platform_i2c *npd;
 616
 617         if (!pd) {
 618                 pd = &default_i2c_data;
 619                 pd->bus_num = 5;
 620         }
 621
 622         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 623                                &s3c_device_i2c5);
 624
 625         if (!npd->cfg_gpio)
 626                 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
 627 }
 628 #endif /*CONFIG_S3C_DEV_I2C5 */
 629
 630 #ifdef CONFIG_S3C_DEV_I2C6
 631 static struct resource s3c_i2c6_resource[] = {
 632         [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
 633         [1] = DEFINE_RES_IRQ(IRQ_IIC6),
 634 };
 635
 636 struct platform_device s3c_device_i2c6 = {
 637         .name           = "s3c2440-i2c",
 638         .id             = 6,
 639         .num_resources  = ARRAY_SIZE(s3c_i2c6_resource),
 640         .resource       = s3c_i2c6_resource,
 641 };
 642
 643 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
 644 {
 645         struct s3c2410_platform_i2c *npd;
 646
 647         if (!pd) {
 648                 pd = &default_i2c_data;
 649                 pd->bus_num = 6;
 650         }
 651
 652         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 653                                &s3c_device_i2c6);
 654
 655         if (!npd->cfg_gpio)
 656                 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
 657 }
 658 #endif /* CONFIG_S3C_DEV_I2C6 */
 659
 660 #ifdef CONFIG_S3C_DEV_I2C7
 661 static struct resource s3c_i2c7_resource[] = {
 662         [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
 663         [1] = DEFINE_RES_IRQ(IRQ_IIC7),
 664 };
 665
 666 struct platform_device s3c_device_i2c7 = {
 667         .name           = "s3c2440-i2c",
 668         .id             = 7,
 669         .num_resources  = ARRAY_SIZE(s3c_i2c7_resource),
 670         .resource       = s3c_i2c7_resource,
 671 };
 672
 673 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
 674 {
 675         struct s3c2410_platform_i2c *npd;
 676
 677         if (!pd) {
 678                 pd = &default_i2c_data;
 679                 pd->bus_num = 7;
 680         }
 681
 682         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 683                                &s3c_device_i2c7);
 684
 685         if (!npd->cfg_gpio)
 686                 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
 687 }
 688 #endif /* CONFIG_S3C_DEV_I2C7 */
 689
 690 /* I2C HDMIPHY */
 691
 692 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
 693 static struct resource s5p_i2c_resource[] = {
 694         [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
 695         [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
 696 };
 697
 698 struct platform_device s5p_device_i2c_hdmiphy = {
 699         .name           = "s3c2440-hdmiphy-i2c",
 700         .id             = -1,
 701         .num_resources  = ARRAY_SIZE(s5p_i2c_resource),
 702         .resource       = s5p_i2c_resource,
 703 };
 704
 705 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
 706 {
 707         struct s3c2410_platform_i2c *npd;
 708
 709         if (!pd) {
 710                 pd = &default_i2c_data;
 711
 712                 if (soc_is_exynos4210())
 713                         pd->bus_num = 8;
 714                 else if (soc_is_s5pv210())
 715                         pd->bus_num = 3;
 716                 else
 717                         pd->bus_num = 0;
 718         }
 719
 720         npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
 721                                &s5p_device_i2c_hdmiphy);
 722 }
 723 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
 724
 725 /* I2S */
 726
 727 #ifdef CONFIG_PLAT_S3C24XX
 728 static struct resource s3c_iis_resource[] = {
 729         [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
 730 };
 731
 732 struct platform_device s3c_device_iis = {
 733         .name           = "s3c24xx-iis",
 734         .id             = -1,
 735         .num_resources  = ARRAY_SIZE(s3c_iis_resource),
 736         .resource       = s3c_iis_resource,
 737         .dev            = {
 738                 .dma_mask               = &samsung_device_dma_mask,
 739                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 740         }
 741 };
 742 #endif /* CONFIG_PLAT_S3C24XX */
 743
 744 #ifdef CONFIG_CPU_S3C2440
 745 struct platform_device s3c2412_device_iis = {
 746         .name           = "s3c2412-iis",
 747         .id             = -1,
 748         .dev            = {
 749                 .dma_mask               = &samsung_device_dma_mask,
 750                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 751         }
 752 };
 753 #endif /* CONFIG_CPU_S3C2440 */
 754
 755 /* IDE CFCON */
 756
 757 #ifdef CONFIG_SAMSUNG_DEV_IDE
 758 static struct resource s3c_cfcon_resource[] = {
 759         [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
 760         [1] = DEFINE_RES_IRQ(IRQ_CFCON),
 761 };
 762
 763 struct platform_device s3c_device_cfcon = {
 764         .id             = 0,
 765         .num_resources  = ARRAY_SIZE(s3c_cfcon_resource),
 766         .resource       = s3c_cfcon_resource,
 767 };
 768
 769 void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
 770 {
 771         s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
 772                          &s3c_device_cfcon);
 773 }
 774 #endif /* CONFIG_SAMSUNG_DEV_IDE */
 775
 776 /* KEYPAD */
 777
 778 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
 779 static struct resource samsung_keypad_resources[] = {
 780         [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
 781         [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
 782 };
 783
 784 struct platform_device samsung_device_keypad = {
 785         .name           = "samsung-keypad",
 786         .id             = -1,
 787         .num_resources  = ARRAY_SIZE(samsung_keypad_resources),
 788         .resource       = samsung_keypad_resources,
 789 };
 790
 791 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
 792 {
 793         struct samsung_keypad_platdata *npd;
 794
 795         npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
 796                         &samsung_device_keypad);
 797
 798         if (!npd->cfg_gpio)
 799                 npd->cfg_gpio = samsung_keypad_cfg_gpio;
 800 }
 801 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
 802
 803 /* LCD Controller */
 804
 805 #ifdef CONFIG_PLAT_S3C24XX
 806 static struct resource s3c_lcd_resource[] = {
 807         [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
 808         [1] = DEFINE_RES_IRQ(IRQ_LCD),
 809 };
 810
 811 struct platform_device s3c_device_lcd = {
 812         .name           = "s3c2410-lcd",
 813         .id             = -1,
 814         .num_resources  = ARRAY_SIZE(s3c_lcd_resource),
 815         .resource       = s3c_lcd_resource,
 816         .dev            = {
 817                 .dma_mask               = &samsung_device_dma_mask,
 818                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 819         }
 820 };
 821
 822 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
 823 {
 824         struct s3c2410fb_mach_info *npd;
 825
 826         npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
 827         if (npd) {
 828                 npd->displays = kmemdup(pd->displays,
 829                         sizeof(struct s3c2410fb_display) * npd->num_displays,
 830                         GFP_KERNEL);
 831                 if (!npd->displays)
 832                         printk(KERN_ERR "no memory for LCD display data\n");
 833         } else {
 834                 printk(KERN_ERR "no memory for LCD platform data\n");
 835         }
 836 }
 837 #endif /* CONFIG_PLAT_S3C24XX */
 838
 839 /* MFC */
 840
 841 #ifdef CONFIG_S5P_DEV_MFC
 842 static struct resource s5p_mfc_resource[] = {
 843         [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
 844         [1] = DEFINE_RES_IRQ(IRQ_MFC),
 845 };
 846
 847 struct platform_device s5p_device_mfc = {
 848         .name           = "s5p-mfc",
 849         .id             = -1,
 850         .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
 851         .resource       = s5p_mfc_resource,
 852 };
 853
 854 /*
 855  * MFC hardware has 2 memory interfaces which are modelled as two separate
 856  * platform devices to let dma-mapping distinguish between them.
 857  *
 858  * MFC parent device (s5p_device_mfc) must be registered before memory
 859  * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
 860  */
 861
 862 struct platform_device s5p_device_mfc_l = {
 863         .name           = "s5p-mfc-l",
 864         .id             = -1,
 865         .dev            = {
 866                 .parent                 = &s5p_device_mfc.dev,
 867                 .dma_mask               = &samsung_device_dma_mask,
 868                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 869         },
 870 };
 871
 872 struct platform_device s5p_device_mfc_r = {
 873         .name           = "s5p-mfc-r",
 874         .id             = -1,
 875         .dev            = {
 876                 .parent                 = &s5p_device_mfc.dev,
 877                 .dma_mask               = &samsung_device_dma_mask,
 878                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 879         },
 880 };
 881 #endif /* CONFIG_S5P_DEV_MFC */
 882
 883 /* MIPI CSIS */
 884
 885 #ifdef CONFIG_S5P_DEV_CSIS0
 886 static struct resource s5p_mipi_csis0_resource[] = {
 887         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
 888         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
 889 };
 890
 891 struct platform_device s5p_device_mipi_csis0 = {
 892         .name           = "s5p-mipi-csis",
 893         .id             = 0,
 894         .num_resources  = ARRAY_SIZE(s5p_mipi_csis0_resource),
 895         .resource       = s5p_mipi_csis0_resource,
 896 };
 897 #endif /* CONFIG_S5P_DEV_CSIS0 */
 898
 899 #ifdef CONFIG_S5P_DEV_CSIS1
 900 static struct resource s5p_mipi_csis1_resource[] = {
 901         [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
 902         [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
 903 };
 904
 905 struct platform_device s5p_device_mipi_csis1 = {
 906         .name           = "s5p-mipi-csis",
 907         .id             = 1,
 908         .num_resources  = ARRAY_SIZE(s5p_mipi_csis1_resource),
 909         .resource       = s5p_mipi_csis1_resource,
 910 };
 911 #endif
 912
 913 /* NAND */
 914
 915 #ifdef CONFIG_S3C_DEV_NAND
 916 static struct resource s3c_nand_resource[] = {
 917         [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
 918 };
 919
 920 struct platform_device s3c_device_nand = {
 921         .name           = "s3c2410-nand",
 922         .id             = -1,
 923         .num_resources  = ARRAY_SIZE(s3c_nand_resource),
 924         .resource       = s3c_nand_resource,
 925 };
 926
 927 /*
 928  * s3c_nand_copy_set() - copy nand set data
 929  * @set: The new structure, directly copied from the old.
 930  *
 931  * Copy all the fields from the NAND set field from what is probably __initdata
 932  * to new kernel memory. The code returns 0 if the copy happened correctly or
 933  * an error code for the calling function to display.
 934  *
 935  * Note, we currently do not try and look to see if we've already copied the
 936  * data in a previous set.
 937  */
 938 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
 939 {
 940         void *ptr;
 941         int size;
 942
 943         size = sizeof(struct mtd_partition) * set->nr_partitions;
 944         if (size) {
 945                 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
 946                 set->partitions = ptr;
 947
 948                 if (!ptr)
 949                         return -ENOMEM;
 950         }
 951
 952         if (set->nr_map && set->nr_chips) {
 953                 size = sizeof(int) * set->nr_chips;
 954                 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
 955                 set->nr_map = ptr;
 956
 957                 if (!ptr)
 958                         return -ENOMEM;
 959         }
 960
 961         if (set->ecc_layout) {
 962                 ptr = kmemdup(set->ecc_layout,
 963                               sizeof(struct nand_ecclayout), GFP_KERNEL);
 964                 set->ecc_layout = ptr;
 965
 966                 if (!ptr)
 967                         return -ENOMEM;
 968         }
 969
 970         return 0;
 971 }
 972
 973 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
 974 {
 975         struct s3c2410_platform_nand *npd;
 976         int size;
 977         int ret;
 978
 979         /* note, if we get a failure in allocation, we simply drop out of the
 980          * function. If there is so little memory available at initialisation
 981          * time then there is little chance the system is going to run.
 982          */
 983
 984         npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
 985                                 &s3c_device_nand);
 986         if (!npd)
 987                 return;
 988
 989         /* now see if we need to copy any of the nand set data */
 990
 991         size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
 992         if (size) {
 993                 struct s3c2410_nand_set *from = npd->sets;
 994                 struct s3c2410_nand_set *to;
 995                 int i;
 996
 997                 to = kmemdup(from, size, GFP_KERNEL);
 998                 npd->sets = to; /* set, even if we failed */
 999
1000                 if (!to) {
1001                         printk(KERN_ERR "%s: no memory for sets\n", __func__);
1002                         return;
1003                 }
1004
1005                 for (i = 0; i < npd->nr_sets; i++) {
1006                         ret = s3c_nand_copy_set(to);
1007                         if (ret) {
1008                                 printk(KERN_ERR "%s: failed to copy set %d\n",
1009                                 __func__, i);
1010                                 return;
1011                         }
1012                         to++;
1013                 }
1014         }
1015 }
1016 #endif /* CONFIG_S3C_DEV_NAND */
1017
1018 /* ONENAND */
1019
1020 #ifdef CONFIG_S3C_DEV_ONENAND
1021 static struct resource s3c_onenand_resources[] = {
1022         [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1023         [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1024         [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1025 };
1026
1027 struct platform_device s3c_device_onenand = {
1028         .name           = "samsung-onenand",
1029         .id             = 0,
1030         .num_resources  = ARRAY_SIZE(s3c_onenand_resources),
1031         .resource       = s3c_onenand_resources,
1032 };
1033 #endif /* CONFIG_S3C_DEV_ONENAND */
1034
1035 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1036 static struct resource s3c64xx_onenand1_resources[] = {
1037         [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1038         [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1039         [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1040 };
1041
1042 struct platform_device s3c64xx_device_onenand1 = {
1043         .name           = "samsung-onenand",
1044         .id             = 1,
1045         .num_resources  = ARRAY_SIZE(s3c64xx_onenand1_resources),
1046         .resource       = s3c64xx_onenand1_resources,
1047 };
1048
1049 void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1050 {
1051         s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1052                          &s3c64xx_device_onenand1);
1053 }
1054 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1055
1056 #ifdef CONFIG_S5P_DEV_ONENAND
1057 static struct resource s5p_onenand_resources[] = {
1058         [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1059         [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1060         [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1061 };
1062
1063 struct platform_device s5p_device_onenand = {
1064         .name           = "s5pc110-onenand",
1065         .id             = -1,
1066         .num_resources  = ARRAY_SIZE(s5p_onenand_resources),
1067         .resource       = s5p_onenand_resources,
1068 };
1069 #endif /* CONFIG_S5P_DEV_ONENAND */
1070
1071 /* PMU */
1072
1073 #ifdef CONFIG_PLAT_S5P
1074 static struct resource s5p_pmu_resource[] = {
1075         DEFINE_RES_IRQ(IRQ_PMU)
1076 };
1077
1078 struct platform_device s5p_device_pmu = {
1079         .name           = "arm-pmu",
1080         .id             = ARM_PMU_DEVICE_CPU,
1081         .num_resources  = ARRAY_SIZE(s5p_pmu_resource),
1082         .resource       = s5p_pmu_resource,
1083 };
1084
1085 static int __init s5p_pmu_init(void)
1086 {
1087         platform_device_register(&s5p_device_pmu);
1088         return 0;
1089 }
1090 arch_initcall(s5p_pmu_init);
1091 #endif /* CONFIG_PLAT_S5P */
1092
1093 /* PWM Timer */
1094
1095 #ifdef CONFIG_SAMSUNG_DEV_PWM
1096
1097 #define TIMER_RESOURCE_SIZE (1)
1098
1099 #define TIMER_RESOURCE(_tmr, _irq)                      \
1100         (struct resource [TIMER_RESOURCE_SIZE]) {       \
1101                 [0] = {                                 \
1102                         .start  = _irq,                 \
1103                         .end    = _irq,                 \
1104                         .flags  = IORESOURCE_IRQ        \
1105                 }                                       \
1106         }
1107
1108 #define DEFINE_S3C_TIMER(_tmr_no, _irq)                 \
1109         .name           = "s3c24xx-pwm",                \
1110         .id             = _tmr_no,                      \
1111         .num_resources  = TIMER_RESOURCE_SIZE,          \
1112         .resource       = TIMER_RESOURCE(_tmr_no, _irq),        \
1113
1114 /*
1115  * since we already have an static mapping for the timer,
1116  * we do not bother setting any IO resource for the base.
1117  */
1118
1119 struct platform_device s3c_device_timer[] = {
1120         [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1121         [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1122         [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1123         [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1124         [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1125 };
1126 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1127
1128 /* RTC */
1129
1130 #ifdef CONFIG_PLAT_S3C24XX
1131 static struct resource s3c_rtc_resource[] = {
1132         [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1133         [1] = DEFINE_RES_IRQ(IRQ_RTC),
1134         [2] = DEFINE_RES_IRQ(IRQ_TICK),
1135 };
1136
1137 struct platform_device s3c_device_rtc = {
1138         .name           = "s3c2410-rtc",
1139         .id             = -1,
1140         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1141         .resource       = s3c_rtc_resource,
1142 };
1143 #endif /* CONFIG_PLAT_S3C24XX */
1144
1145 #ifdef CONFIG_S3C_DEV_RTC
1146 static struct resource s3c_rtc_resource[] = {
1147         [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1148         [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1149         [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1150 };
1151
1152 struct platform_device s3c_device_rtc = {
1153         .name           = "s3c64xx-rtc",
1154         .id             = -1,
1155         .num_resources  = ARRAY_SIZE(s3c_rtc_resource),
1156         .resource       = s3c_rtc_resource,
1157 };
1158 #endif /* CONFIG_S3C_DEV_RTC */
1159
1160 /* SDI */
1161
1162 #ifdef CONFIG_PLAT_S3C24XX
1163 static struct resource s3c_sdi_resource[] = {
1164         [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1165         [1] = DEFINE_RES_IRQ(IRQ_SDI),
1166 };
1167
1168 struct platform_device s3c_device_sdi = {
1169         .name           = "s3c2410-sdi",
1170         .id             = -1,
1171         .num_resources  = ARRAY_SIZE(s3c_sdi_resource),
1172         .resource       = s3c_sdi_resource,
1173 };
1174
1175 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1176 {
1177         s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1178                          &s3c_device_sdi);
1179 }
1180 #endif /* CONFIG_PLAT_S3C24XX */
1181
1182 /* SPI */
1183
1184 #ifdef CONFIG_PLAT_S3C24XX
1185 static struct resource s3c_spi0_resource[] = {
1186         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1187         [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1188 };
1189
1190 struct platform_device s3c_device_spi0 = {
1191         .name           = "s3c2410-spi",
1192         .id             = 0,
1193         .num_resources  = ARRAY_SIZE(s3c_spi0_resource),
1194         .resource       = s3c_spi0_resource,
1195         .dev            = {
1196                 .dma_mask               = &samsung_device_dma_mask,
1197                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1198         }
1199 };
1200
1201 static struct resource s3c_spi1_resource[] = {
1202         [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1203         [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1204 };
1205
1206 struct platform_device s3c_device_spi1 = {
1207         .name           = "s3c2410-spi",
1208         .id             = 1,
1209         .num_resources  = ARRAY_SIZE(s3c_spi1_resource),
1210         .resource       = s3c_spi1_resource,
1211         .dev            = {
1212                 .dma_mask               = &samsung_device_dma_mask,
1213                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1214         }
1215 };
1216 #endif /* CONFIG_PLAT_S3C24XX */
1217
1218 /* Touchscreen */
1219
1220 #ifdef CONFIG_PLAT_S3C24XX
1221 static struct resource s3c_ts_resource[] = {
1222         [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1223         [1] = DEFINE_RES_IRQ(IRQ_TC),
1224 };
1225
1226 struct platform_device s3c_device_ts = {
1227         .name           = "s3c2410-ts",
1228         .id             = -1,
1229         .dev.parent     = &s3c_device_adc.dev,
1230         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1231         .resource       = s3c_ts_resource,
1232 };
1233
1234 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1235 {
1236         s3c_set_platdata(hard_s3c2410ts_info,
1237                          sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1238 }
1239 #endif /* CONFIG_PLAT_S3C24XX */
1240
1241 #ifdef CONFIG_SAMSUNG_DEV_TS
1242 static struct resource s3c_ts_resource[] = {
1243         [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1244         [1] = DEFINE_RES_IRQ(IRQ_TC),
1245 };
1246
1247 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1248         .delay                  = 10000,
1249         .presc                  = 49,
1250         .oversampling_shift     = 2,
1251 };
1252
1253 struct platform_device s3c_device_ts = {
1254         .name           = "s3c64xx-ts",
1255         .id             = -1,
1256         .num_resources  = ARRAY_SIZE(s3c_ts_resource),
1257         .resource       = s3c_ts_resource,
1258 };
1259
1260 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1261 {
1262         if (!pd)
1263                 pd = &default_ts_data;
1264
1265         s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1266                          &s3c_device_ts);
1267 }
1268 #endif /* CONFIG_SAMSUNG_DEV_TS */
1269
1270 /* TV */
1271
1272 #ifdef CONFIG_S5P_DEV_TV
1273
1274 static struct resource s5p_hdmi_resources[] = {
1275         [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1276         [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1277 };
1278
1279 struct platform_device s5p_device_hdmi = {
1280         .name           = "s5p-hdmi",
1281         .id             = -1,
1282         .num_resources  = ARRAY_SIZE(s5p_hdmi_resources),
1283         .resource       = s5p_hdmi_resources,
1284 };
1285
1286 static struct resource s5p_sdo_resources[] = {
1287         [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1288         [1] = DEFINE_RES_IRQ(IRQ_SDO),
1289 };
1290
1291 struct platform_device s5p_device_sdo = {
1292         .name           = "s5p-sdo",
1293         .id             = -1,
1294         .num_resources  = ARRAY_SIZE(s5p_sdo_resources),
1295         .resource       = s5p_sdo_resources,
1296 };
1297
1298 static struct resource s5p_mixer_resources[] = {
1299         [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1300         [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1301         [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1302 };
1303
1304 struct platform_device s5p_device_mixer = {
1305         .name           = "s5p-mixer",
1306         .id             = -1,
1307         .num_resources  = ARRAY_SIZE(s5p_mixer_resources),
1308         .resource       = s5p_mixer_resources,
1309         .dev            = {
1310                 .dma_mask               = &samsung_device_dma_mask,
1311                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1312         }
1313 };
1314 #endif /* CONFIG_S5P_DEV_TV */
1315
1316 /* USB */
1317
1318 #ifdef CONFIG_S3C_DEV_USB_HOST
1319 static struct resource s3c_usb_resource[] = {
1320         [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1321         [1] = DEFINE_RES_IRQ(IRQ_USBH),
1322 };
1323
1324 struct platform_device s3c_device_ohci = {
1325         .name           = "s3c2410-ohci",
1326         .id             = -1,
1327         .num_resources  = ARRAY_SIZE(s3c_usb_resource),
1328         .resource       = s3c_usb_resource,
1329         .dev            = {
1330                 .dma_mask               = &samsung_device_dma_mask,
1331                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1332         }
1333 };
1334
1335 /*
1336  * s3c_ohci_set_platdata - initialise OHCI device platform data
1337  * @info: The platform data.
1338  *
1339  * This call copies the @info passed in and sets the device .platform_data
1340  * field to that copy. The @info is copied so that the original can be marked
1341  * __initdata.
1342  */
1343
1344 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1345 {
1346         s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1347                          &s3c_device_ohci);
1348 }
1349 #endif /* CONFIG_S3C_DEV_USB_HOST */
1350
1351 /* USB Device (Gadget) */
1352
1353 #ifdef CONFIG_PLAT_S3C24XX
1354 static struct resource s3c_usbgadget_resource[] = {
1355         [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1356         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1357 };
1358
1359 struct platform_device s3c_device_usbgadget = {
1360         .name           = "s3c2410-usbgadget",
1361         .id             = -1,
1362         .num_resources  = ARRAY_SIZE(s3c_usbgadget_resource),
1363         .resource       = s3c_usbgadget_resource,
1364 };
1365
1366 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1367 {
1368         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1369 }
1370 #endif /* CONFIG_PLAT_S3C24XX */
1371
1372 /* USB EHCI Host Controller */
1373
1374 #ifdef CONFIG_S5P_DEV_USB_EHCI
1375 static struct resource s5p_ehci_resource[] = {
1376         [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1377         [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1378 };
1379
1380 struct platform_device s5p_device_ehci = {
1381         .name           = "s5p-ehci",
1382         .id             = -1,
1383         .num_resources  = ARRAY_SIZE(s5p_ehci_resource),
1384         .resource       = s5p_ehci_resource,
1385         .dev            = {
1386                 .dma_mask               = &samsung_device_dma_mask,
1387                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1388         }
1389 };
1390
1391 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1392 {
1393         struct s5p_ehci_platdata *npd;
1394
1395         npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1396                         &s5p_device_ehci);
1397
1398         if (!npd->phy_init)
1399                 npd->phy_init = s5p_usb_phy_init;
1400         if (!npd->phy_exit)
1401                 npd->phy_exit = s5p_usb_phy_exit;
1402 }
1403 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1404
1405 /* USB HSOTG */
1406
1407 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1408 static struct resource s3c_usb_hsotg_resources[] = {
1409         [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
1410         [1] = DEFINE_RES_IRQ(IRQ_OTG),
1411 };
1412
1413 struct platform_device s3c_device_usb_hsotg = {
1414         .name           = "s3c-hsotg",
1415         .id             = -1,
1416         .num_resources  = ARRAY_SIZE(s3c_usb_hsotg_resources),
1417         .resource       = s3c_usb_hsotg_resources,
1418         .dev            = {
1419                 .dma_mask               = &samsung_device_dma_mask,
1420                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1421         },
1422 };
1423 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1424
1425 /* USB High Spped 2.0 Device (Gadget) */
1426
1427 #ifdef CONFIG_PLAT_S3C24XX
1428 static struct resource s3c_hsudc_resource[] = {
1429         [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1430         [1] = DEFINE_RES_IRQ(IRQ_USBD),
1431 };
1432
1433 struct platform_device s3c_device_usb_hsudc = {
1434         .name           = "s3c-hsudc",
1435         .id             = -1,
1436         .num_resources  = ARRAY_SIZE(s3c_hsudc_resource),
1437         .resource       = s3c_hsudc_resource,
1438         .dev            = {
1439                 .dma_mask               = &samsung_device_dma_mask,
1440                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1441         },
1442 };
1443
1444 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1445 {
1446         s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1447 }
1448 #endif /* CONFIG_PLAT_S3C24XX */
1449
1450 /* WDT */
1451
1452 #ifdef CONFIG_S3C_DEV_WDT
1453 static struct resource s3c_wdt_resource[] = {
1454         [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1455         [1] = DEFINE_RES_IRQ(IRQ_WDT),
1456 };
1457
1458 struct platform_device s3c_device_wdt = {
1459         .name           = "s3c2410-wdt",
1460         .id             = -1,
1461         .num_resources  = ARRAY_SIZE(s3c_wdt_resource),
1462         .resource       = s3c_wdt_resource,
1463 };
1464 #endif /* CONFIG_S3C_DEV_WDT */
1465
1466 #ifdef CONFIG_S3C64XX_DEV_SPI0
1467 static struct resource s3c64xx_spi0_resource[] = {
1468         [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1469         [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1470         [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1471         [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1472 };
1473
1474 struct platform_device s3c64xx_device_spi0 = {
1475         .name           = "s3c64xx-spi",
1476         .id             = 0,
1477         .num_resources  = ARRAY_SIZE(s3c64xx_spi0_resource),
1478         .resource       = s3c64xx_spi0_resource,
1479         .dev = {
1480                 .dma_mask               = &samsung_device_dma_mask,
1481                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1482         },
1483 };
1484
1485 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1486                                       int src_clk_nr, int num_cs)
1487 {
1488         if (!pd) {
1489                 pr_err("%s:Need to pass platform data\n", __func__);
1490                 return;
1491         }
1492
1493         /* Reject invalid configuration */
1494         if (!num_cs || src_clk_nr < 0) {
1495                 pr_err("%s: Invalid SPI configuration\n", __func__);
1496                 return;
1497         }
1498
1499         pd->num_cs = num_cs;
1500         pd->src_clk_nr = src_clk_nr;
1501         if (!pd->cfg_gpio)
1502                 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1503
1504         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1505 }
1506 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1507
1508 #ifdef CONFIG_S3C64XX_DEV_SPI1
1509 static struct resource s3c64xx_spi1_resource[] = {
1510         [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1511         [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1512         [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1513         [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1514 };
1515
1516 struct platform_device s3c64xx_device_spi1 = {
1517         .name           = "s3c64xx-spi",
1518         .id             = 1,
1519         .num_resources  = ARRAY_SIZE(s3c64xx_spi1_resource),
1520         .resource       = s3c64xx_spi1_resource,
1521         .dev = {
1522                 .dma_mask               = &samsung_device_dma_mask,
1523                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1524         },
1525 };
1526
1527 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1528                                       int src_clk_nr, int num_cs)
1529 {
1530         if (!pd) {
1531                 pr_err("%s:Need to pass platform data\n", __func__);
1532                 return;
1533         }
1534
1535         /* Reject invalid configuration */
1536         if (!num_cs || src_clk_nr < 0) {
1537                 pr_err("%s: Invalid SPI configuration\n", __func__);
1538                 return;
1539         }
1540
1541         pd->num_cs = num_cs;
1542         pd->src_clk_nr = src_clk_nr;
1543         if (!pd->cfg_gpio)
1544                 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1545
1546         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1547 }
1548 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1549
1550 #ifdef CONFIG_S3C64XX_DEV_SPI2
1551 static struct resource s3c64xx_spi2_resource[] = {
1552         [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1553         [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1554         [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1555         [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1556 };
1557
1558 struct platform_device s3c64xx_device_spi2 = {
1559         .name           = "s3c64xx-spi",
1560         .id             = 2,
1561         .num_resources  = ARRAY_SIZE(s3c64xx_spi2_resource),
1562         .resource       = s3c64xx_spi2_resource,
1563         .dev = {
1564                 .dma_mask               = &samsung_device_dma_mask,
1565                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1566         },
1567 };
1568
1569 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1570                                       int src_clk_nr, int num_cs)
1571 {
1572         if (!pd) {
1573                 pr_err("%s:Need to pass platform data\n", __func__);
1574                 return;
1575         }
1576
1577         /* Reject invalid configuration */
1578         if (!num_cs || src_clk_nr < 0) {
1579                 pr_err("%s: Invalid SPI configuration\n", __func__);
1580                 return;
1581         }
1582
1583         pd->num_cs = num_cs;
1584         pd->src_clk_nr = src_clk_nr;
1585         if (!pd->cfg_gpio)
1586                 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1587
1588         s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1589 }
1590 #endif /* CONFIG_S3C64XX_DEV_SPI2 */