1 /* linux/arch/arm/plat-s3c24xx/pm.c
3 * Copyright (c) 2004,2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX Power Manager (Suspend-To-RAM) support
8 * See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * Parts based on arch/arm/mach-pxa/pm.c
26 * Thanks to Dimitry Andric for debugging
29 #include <linux/init.h>
30 #include <linux/suspend.h>
31 #include <linux/errno.h>
32 #include <linux/time.h>
33 #include <linux/interrupt.h>
34 #include <linux/serial_core.h>
37 #include <plat/regs-serial.h>
38 #include <mach/regs-clock.h>
39 #include <mach/regs-gpio.h>
40 #include <mach/regs-mem.h>
41 #include <mach/regs-irq.h>
43 #include <asm/mach/time.h>
47 #define PFX "s3c24xx-pm: "
49 static struct sleep_save core_save[] = {
50 SAVE_ITEM(S3C2410_LOCKTIME),
51 SAVE_ITEM(S3C2410_CLKCON),
53 /* we restore the timings here, with the proviso that the board
54 * brings the system up in an slower, or equal frequency setting
55 * to the original system.
57 * if we cannot guarantee this, then things are going to go very
58 * wrong here, as we modify the refresh and both pll settings.
61 SAVE_ITEM(S3C2410_BWSCON),
62 SAVE_ITEM(S3C2410_BANKCON0),
63 SAVE_ITEM(S3C2410_BANKCON1),
64 SAVE_ITEM(S3C2410_BANKCON2),
65 SAVE_ITEM(S3C2410_BANKCON3),
66 SAVE_ITEM(S3C2410_BANKCON4),
67 SAVE_ITEM(S3C2410_BANKCON5),
69 #ifndef CONFIG_CPU_FREQ
70 SAVE_ITEM(S3C2410_CLKDIVN),
71 SAVE_ITEM(S3C2410_MPLLCON),
72 SAVE_ITEM(S3C2410_REFRESH),
74 SAVE_ITEM(S3C2410_UPLLCON),
75 SAVE_ITEM(S3C2410_CLKSLOW),
78 static struct sleep_save misc_save[] = {
79 SAVE_ITEM(S3C2410_DCLKCON),
82 /* s3c_pm_check_resume_pin
84 * check to see if the pin is configured correctly for sleep mode, and
85 * make any necessary adjustments if it is not
88 static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)
90 unsigned long irqstate;
91 unsigned long pinstate;
92 int irq = s3c2410_gpio_getirq(pin);
95 irqstate = s3c_irqwake_intmask & (1L<<irqoffs);
97 irqstate = s3c_irqwake_eintmask & (1L<<irqoffs);
99 pinstate = s3c2410_gpio_getcfg(pin);
102 if (pinstate == S3C2410_GPIO_IRQ)
103 S3C_PMDBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin);
105 if (pinstate == S3C2410_GPIO_IRQ) {
106 S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin);
107 s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT);
112 /* s3c_pm_configure_extint
114 * configure all external interrupt pins
117 void s3c_pm_configure_extint(void)
121 /* for each of the external interrupts (EINT0..EINT15) we
122 * need to check wether it is an external interrupt source,
123 * and then configure it as an input if it is not
126 for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) {
127 s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF0);
130 for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) {
131 s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8);
136 void s3c_pm_restore_core(void)
138 s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
139 s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
142 void s3c_pm_save_core(void)
144 s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
145 s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));