2 * linux/arch/arm/plat-omap/mcbsp.c
4 * Copyright (C) 2004 Nokia Corporation
5 * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Multichannel mode not supported.
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/platform_device.h>
19 #include <linux/wait.h>
20 #include <linux/completion.h>
21 #include <linux/interrupt.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
24 #include <linux/delay.h>
27 #include <asm/arch/dma.h>
28 #include <asm/arch/mcbsp.h>
30 struct omap_mcbsp **mcbsp_ptr;
33 #define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count)
34 #define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
36 static void omap_mcbsp_dump_reg(u8 id)
38 struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
40 dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
41 dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n",
42 OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
43 dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n",
44 OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
45 dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n",
46 OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
47 dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n",
48 OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
49 dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
50 OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
51 dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
52 OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
53 dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n",
54 OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
55 dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n",
56 OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
57 dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n",
58 OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
59 dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n",
60 OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
61 dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
62 OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
63 dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
64 OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
65 dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n",
66 OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
67 dev_dbg(mcbsp->dev, "***********************\n");
70 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
72 struct omap_mcbsp *mcbsp_tx = dev_id;
74 dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
75 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
77 complete(&mcbsp_tx->tx_irq_completion);
82 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
84 struct omap_mcbsp *mcbsp_rx = dev_id;
86 dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
87 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
89 complete(&mcbsp_rx->rx_irq_completion);
94 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
96 struct omap_mcbsp *mcbsp_dma_tx = data;
98 dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
99 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
101 /* We can free the channels */
102 omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
103 mcbsp_dma_tx->dma_tx_lch = -1;
105 complete(&mcbsp_dma_tx->tx_dma_completion);
108 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
110 struct omap_mcbsp *mcbsp_dma_rx = data;
112 dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
113 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
115 /* We can free the channels */
116 omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
117 mcbsp_dma_rx->dma_rx_lch = -1;
119 complete(&mcbsp_dma_rx->rx_dma_completion);
123 * omap_mcbsp_config simply write a config to the
125 * You either call this function or set the McBSP registers
126 * by yourself before calling omap_mcbsp_start().
128 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
130 struct omap_mcbsp *mcbsp;
133 if (!omap_mcbsp_check_valid_id(id)) {
134 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
137 mcbsp = id_to_mcbsp_ptr(id);
139 io_base = mcbsp->io_base;
140 dev_dbg(mcbsp->dev, "Configuring McBSP%d io_base: 0x%8x\n",
143 /* We write the given config */
144 OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
145 OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
146 OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
147 OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
148 OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
149 OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
150 OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
151 OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
152 OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
153 OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
154 OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
156 EXPORT_SYMBOL(omap_mcbsp_config);
159 * We can choose between IRQ based or polled IO.
160 * This needs to be called before omap_mcbsp_request().
162 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
164 struct omap_mcbsp *mcbsp;
166 if (!omap_mcbsp_check_valid_id(id)) {
167 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
170 mcbsp = id_to_mcbsp_ptr(id);
172 spin_lock(&mcbsp->lock);
175 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
177 spin_unlock(&mcbsp->lock);
181 mcbsp->io_type = io_type;
183 spin_unlock(&mcbsp->lock);
187 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
189 int omap_mcbsp_request(unsigned int id)
191 struct omap_mcbsp *mcbsp;
194 if (!omap_mcbsp_check_valid_id(id)) {
195 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
198 mcbsp = id_to_mcbsp_ptr(id);
200 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
201 mcbsp->pdata->ops->request(id);
203 clk_enable(mcbsp->clk);
205 spin_lock(&mcbsp->lock);
207 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
209 spin_unlock(&mcbsp->lock);
214 spin_unlock(&mcbsp->lock);
216 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
217 /* We need to get IRQs here */
218 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
219 0, "McBSP", (void *)mcbsp);
221 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
222 "for McBSP%d\n", mcbsp->tx_irq,
227 init_completion(&mcbsp->tx_irq_completion);
229 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
230 0, "McBSP", (void *)mcbsp);
232 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
233 "for McBSP%d\n", mcbsp->rx_irq,
235 free_irq(mcbsp->tx_irq, (void *)mcbsp);
239 init_completion(&mcbsp->rx_irq_completion);
244 EXPORT_SYMBOL(omap_mcbsp_request);
246 void omap_mcbsp_free(unsigned int id)
248 struct omap_mcbsp *mcbsp;
250 if (!omap_mcbsp_check_valid_id(id)) {
251 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
254 mcbsp = id_to_mcbsp_ptr(id);
256 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
257 mcbsp->pdata->ops->free(id);
259 clk_disable(mcbsp->clk);
261 spin_lock(&mcbsp->lock);
263 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
265 spin_unlock(&mcbsp->lock);
270 spin_unlock(&mcbsp->lock);
272 if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
274 free_irq(mcbsp->rx_irq, (void *)mcbsp);
275 free_irq(mcbsp->tx_irq, (void *)mcbsp);
278 EXPORT_SYMBOL(omap_mcbsp_free);
281 * Here we start the McBSP, by enabling the sample
282 * generator, both transmitter and receivers,
283 * and the frame sync.
285 void omap_mcbsp_start(unsigned int id)
287 struct omap_mcbsp *mcbsp;
291 if (!omap_mcbsp_check_valid_id(id)) {
292 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
295 mcbsp = id_to_mcbsp_ptr(id);
296 io_base = mcbsp->io_base;
298 mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
299 mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
301 /* Start the sample generator */
302 w = OMAP_MCBSP_READ(io_base, SPCR2);
303 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
305 /* Enable transmitter and receiver */
306 w = OMAP_MCBSP_READ(io_base, SPCR2);
307 OMAP_MCBSP_WRITE(io_base, SPCR2, w | 1);
309 w = OMAP_MCBSP_READ(io_base, SPCR1);
310 OMAP_MCBSP_WRITE(io_base, SPCR1, w | 1);
314 /* Start frame sync */
315 w = OMAP_MCBSP_READ(io_base, SPCR2);
316 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
318 /* Dump McBSP Regs */
319 omap_mcbsp_dump_reg(id);
321 EXPORT_SYMBOL(omap_mcbsp_start);
323 void omap_mcbsp_stop(unsigned int id)
325 struct omap_mcbsp *mcbsp;
329 if (!omap_mcbsp_check_valid_id(id)) {
330 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
334 mcbsp = id_to_mcbsp_ptr(id);
335 io_base = mcbsp->io_base;
337 /* Reset transmitter */
338 w = OMAP_MCBSP_READ(io_base, SPCR2);
339 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1));
342 w = OMAP_MCBSP_READ(io_base, SPCR1);
343 OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(1));
345 /* Reset the sample rate generator */
346 w = OMAP_MCBSP_READ(io_base, SPCR2);
347 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
349 EXPORT_SYMBOL(omap_mcbsp_stop);
351 /* polled mcbsp i/o operations */
352 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
354 struct omap_mcbsp *mcbsp;
357 if (!omap_mcbsp_check_valid_id(id)) {
358 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
362 mcbsp = id_to_mcbsp_ptr(id);
363 base = mcbsp->io_base;
365 writew(buf, base + OMAP_MCBSP_REG_DXR1);
366 /* if frame sync error - clear the error */
367 if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
369 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
370 base + OMAP_MCBSP_REG_SPCR2);
374 /* wait for transmit confirmation */
376 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
377 if (attemps++ > 1000) {
378 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
380 base + OMAP_MCBSP_REG_SPCR2);
382 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
384 base + OMAP_MCBSP_REG_SPCR2);
386 dev_err(mcbsp->dev, "Could not write to"
387 " McBSP%d Register\n", mcbsp->id);
395 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
397 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
399 struct omap_mcbsp *mcbsp;
402 if (!omap_mcbsp_check_valid_id(id)) {
403 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
406 mcbsp = id_to_mcbsp_ptr(id);
408 base = mcbsp->io_base;
409 /* if frame sync error - clear the error */
410 if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
412 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
413 base + OMAP_MCBSP_REG_SPCR1);
417 /* wait for recieve confirmation */
419 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
420 if (attemps++ > 1000) {
421 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
423 base + OMAP_MCBSP_REG_SPCR1);
425 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
427 base + OMAP_MCBSP_REG_SPCR1);
429 dev_err(mcbsp->dev, "Could not read from"
430 " McBSP%d Register\n", mcbsp->id);
435 *buf = readw(base + OMAP_MCBSP_REG_DRR1);
439 EXPORT_SYMBOL(omap_mcbsp_pollread);
442 * IRQ based word transmission.
444 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
446 struct omap_mcbsp *mcbsp;
448 omap_mcbsp_word_length word_length;
450 if (!omap_mcbsp_check_valid_id(id)) {
451 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
455 mcbsp = id_to_mcbsp_ptr(id);
456 io_base = mcbsp->io_base;
457 word_length = mcbsp->tx_word_length;
459 wait_for_completion(&mcbsp->tx_irq_completion);
461 if (word_length > OMAP_MCBSP_WORD_16)
462 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
463 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
465 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
467 u32 omap_mcbsp_recv_word(unsigned int id)
469 struct omap_mcbsp *mcbsp;
471 u16 word_lsb, word_msb = 0;
472 omap_mcbsp_word_length word_length;
474 if (!omap_mcbsp_check_valid_id(id)) {
475 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
478 mcbsp = id_to_mcbsp_ptr(id);
480 word_length = mcbsp->rx_word_length;
481 io_base = mcbsp->io_base;
483 wait_for_completion(&mcbsp->rx_irq_completion);
485 if (word_length > OMAP_MCBSP_WORD_16)
486 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
487 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
489 return (word_lsb | (word_msb << 16));
491 EXPORT_SYMBOL(omap_mcbsp_recv_word);
493 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
495 struct omap_mcbsp *mcbsp;
497 omap_mcbsp_word_length tx_word_length;
498 omap_mcbsp_word_length rx_word_length;
499 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
501 if (!omap_mcbsp_check_valid_id(id)) {
502 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
505 mcbsp = id_to_mcbsp_ptr(id);
506 io_base = mcbsp->io_base;
507 tx_word_length = mcbsp->tx_word_length;
508 rx_word_length = mcbsp->rx_word_length;
510 if (tx_word_length != rx_word_length)
513 /* First we wait for the transmitter to be ready */
514 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
515 while (!(spcr2 & XRDY)) {
516 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
517 if (attempts++ > 1000) {
518 /* We must reset the transmitter */
519 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
521 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
523 dev_err(mcbsp->dev, "McBSP%d transmitter not "
524 "ready\n", mcbsp->id);
529 /* Now we can push the data */
530 if (tx_word_length > OMAP_MCBSP_WORD_16)
531 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
532 OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
534 /* We wait for the receiver to be ready */
535 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
536 while (!(spcr1 & RRDY)) {
537 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
538 if (attempts++ > 1000) {
539 /* We must reset the receiver */
540 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
542 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
544 dev_err(mcbsp->dev, "McBSP%d receiver not "
545 "ready\n", mcbsp->id);
550 /* Receiver is ready, let's read the dummy data */
551 if (rx_word_length > OMAP_MCBSP_WORD_16)
552 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
553 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
557 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
559 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
561 struct omap_mcbsp *mcbsp;
562 u32 io_base, clock_word = 0;
563 omap_mcbsp_word_length tx_word_length;
564 omap_mcbsp_word_length rx_word_length;
565 u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
567 if (!omap_mcbsp_check_valid_id(id)) {
568 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
572 mcbsp = id_to_mcbsp_ptr(id);
573 io_base = mcbsp->io_base;
575 tx_word_length = mcbsp->tx_word_length;
576 rx_word_length = mcbsp->rx_word_length;
578 if (tx_word_length != rx_word_length)
581 /* First we wait for the transmitter to be ready */
582 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
583 while (!(spcr2 & XRDY)) {
584 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
585 if (attempts++ > 1000) {
586 /* We must reset the transmitter */
587 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
589 OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
591 dev_err(mcbsp->dev, "McBSP%d transmitter not "
592 "ready\n", mcbsp->id);
597 /* We first need to enable the bus clock */
598 if (tx_word_length > OMAP_MCBSP_WORD_16)
599 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
600 OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
602 /* We wait for the receiver to be ready */
603 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
604 while (!(spcr1 & RRDY)) {
605 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
606 if (attempts++ > 1000) {
607 /* We must reset the receiver */
608 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
610 OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
612 dev_err(mcbsp->dev, "McBSP%d receiver not "
613 "ready\n", mcbsp->id);
618 /* Receiver is ready, there is something for us */
619 if (rx_word_length > OMAP_MCBSP_WORD_16)
620 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
621 word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
623 word[0] = (word_lsb | (word_msb << 16));
627 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
630 * Simple DMA based buffer rx/tx routines.
631 * Nothing fancy, just a single buffer tx/rx through DMA.
632 * The DMA resources are released once the transfer is done.
633 * For anything fancier, you should use your own customized DMA
634 * routines and callbacks.
636 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
639 struct omap_mcbsp *mcbsp;
645 if (!omap_mcbsp_check_valid_id(id)) {
646 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
649 mcbsp = id_to_mcbsp_ptr(id);
651 if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
652 omap_mcbsp_tx_dma_callback,
655 dev_err(mcbsp->dev, " Unable to request DMA channel for "
656 "McBSP%d TX. Trying IRQ based TX\n",
660 mcbsp->dma_tx_lch = dma_tx_ch;
662 dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
665 init_completion(&mcbsp->tx_dma_completion);
667 if (cpu_class_is_omap1()) {
668 src_port = OMAP_DMA_PORT_TIPB;
669 dest_port = OMAP_DMA_PORT_EMIFF;
671 if (cpu_class_is_omap2())
672 sync_dev = mcbsp->dma_tx_sync;
674 omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
675 OMAP_DMA_DATA_TYPE_S16,
677 OMAP_DMA_SYNC_ELEMENT,
680 omap_set_dma_dest_params(mcbsp->dma_tx_lch,
682 OMAP_DMA_AMODE_CONSTANT,
683 mcbsp->io_base + OMAP_MCBSP_REG_DXR1,
686 omap_set_dma_src_params(mcbsp->dma_tx_lch,
688 OMAP_DMA_AMODE_POST_INC,
692 omap_start_dma(mcbsp->dma_tx_lch);
693 wait_for_completion(&mcbsp->tx_dma_completion);
697 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
699 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
702 struct omap_mcbsp *mcbsp;
708 if (!omap_mcbsp_check_valid_id(id)) {
709 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
712 mcbsp = id_to_mcbsp_ptr(id);
714 if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
715 omap_mcbsp_rx_dma_callback,
718 dev_err(mcbsp->dev, "Unable to request DMA channel for "
719 "McBSP%d RX. Trying IRQ based RX\n",
723 mcbsp->dma_rx_lch = dma_rx_ch;
725 dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
728 init_completion(&mcbsp->rx_dma_completion);
730 if (cpu_class_is_omap1()) {
731 src_port = OMAP_DMA_PORT_TIPB;
732 dest_port = OMAP_DMA_PORT_EMIFF;
734 if (cpu_class_is_omap2())
735 sync_dev = mcbsp->dma_rx_sync;
737 omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
738 OMAP_DMA_DATA_TYPE_S16,
740 OMAP_DMA_SYNC_ELEMENT,
743 omap_set_dma_src_params(mcbsp->dma_rx_lch,
745 OMAP_DMA_AMODE_CONSTANT,
746 mcbsp->io_base + OMAP_MCBSP_REG_DRR1,
749 omap_set_dma_dest_params(mcbsp->dma_rx_lch,
751 OMAP_DMA_AMODE_POST_INC,
755 omap_start_dma(mcbsp->dma_rx_lch);
756 wait_for_completion(&mcbsp->rx_dma_completion);
760 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
764 * Since SPI setup is much simpler than the generic McBSP one,
765 * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
766 * Once this is done, you can call omap_mcbsp_start().
768 void omap_mcbsp_set_spi_mode(unsigned int id,
769 const struct omap_mcbsp_spi_cfg *spi_cfg)
771 struct omap_mcbsp *mcbsp;
772 struct omap_mcbsp_reg_cfg mcbsp_cfg;
774 if (!omap_mcbsp_check_valid_id(id)) {
775 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
778 mcbsp = id_to_mcbsp_ptr(id);
780 memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
782 /* SPI has only one frame */
783 mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
784 mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
786 /* Clock stop mode */
787 if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
788 mcbsp_cfg.spcr1 |= (1 << 12);
790 mcbsp_cfg.spcr1 |= (3 << 11);
792 /* Set clock parities */
793 if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
794 mcbsp_cfg.pcr0 |= CLKRP;
796 mcbsp_cfg.pcr0 &= ~CLKRP;
798 if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
799 mcbsp_cfg.pcr0 &= ~CLKXP;
801 mcbsp_cfg.pcr0 |= CLKXP;
803 /* Set SCLKME to 0 and CLKSM to 1 */
804 mcbsp_cfg.pcr0 &= ~SCLKME;
805 mcbsp_cfg.srgr2 |= CLKSM;
808 if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
809 mcbsp_cfg.pcr0 &= ~FSXP;
811 mcbsp_cfg.pcr0 |= FSXP;
813 if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
814 mcbsp_cfg.pcr0 |= CLKXM;
815 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
816 mcbsp_cfg.pcr0 |= FSXM;
817 mcbsp_cfg.srgr2 &= ~FSGM;
818 mcbsp_cfg.xcr2 |= XDATDLY(1);
819 mcbsp_cfg.rcr2 |= RDATDLY(1);
821 mcbsp_cfg.pcr0 &= ~CLKXM;
822 mcbsp_cfg.srgr1 |= CLKGDV(1);
823 mcbsp_cfg.pcr0 &= ~FSXM;
824 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
825 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
828 mcbsp_cfg.xcr2 &= ~XPHASE;
829 mcbsp_cfg.rcr2 &= ~RPHASE;
831 omap_mcbsp_config(id, &mcbsp_cfg);
833 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
836 * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
837 * 730 has only 2 McBSP, and both of them are MPU peripherals.
839 static int __init omap_mcbsp_probe(struct platform_device *pdev)
841 struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
842 struct omap_mcbsp *mcbsp;
843 int id = pdev->id - 1;
847 dev_err(&pdev->dev, "McBSP device initialized without"
853 dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
855 if (id >= omap_mcbsp_count) {
856 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
861 mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
866 mcbsp_ptr[id] = mcbsp;
868 spin_lock_init(&mcbsp->lock);
871 mcbsp->dma_tx_lch = -1;
872 mcbsp->dma_rx_lch = -1;
874 mcbsp->io_base = pdata->virt_base;
875 /* Default I/O is IRQ based */
876 mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
877 mcbsp->tx_irq = pdata->tx_irq;
878 mcbsp->rx_irq = pdata->rx_irq;
879 mcbsp->dma_rx_sync = pdata->dma_rx_sync;
880 mcbsp->dma_tx_sync = pdata->dma_tx_sync;
883 mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
884 if (IS_ERR(mcbsp->clk)) {
887 "Invalid clock configuration for McBSP%d.\n",
893 mcbsp->pdata = pdata;
894 mcbsp->dev = &pdev->dev;
895 platform_set_drvdata(pdev, mcbsp);
901 static int omap_mcbsp_remove(struct platform_device *pdev)
903 struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
905 platform_set_drvdata(pdev, NULL);
908 if (mcbsp->pdata && mcbsp->pdata->ops &&
909 mcbsp->pdata->ops->free)
910 mcbsp->pdata->ops->free(mcbsp->id);
912 clk_disable(mcbsp->clk);
923 static struct platform_driver omap_mcbsp_driver = {
924 .probe = omap_mcbsp_probe,
925 .remove = omap_mcbsp_remove,
927 .name = "omap-mcbsp",
931 int __init omap_mcbsp_init(void)
933 /* Register the McBSP driver */
934 return platform_driver_register(&omap_mcbsp_driver);