2 * omap_hwmod macros, structures
4 * Copyright (C) 2009-2010 Nokia Corporation
7 * Created in collaboration with (alphabetical order): BenoƮt Cousson,
8 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
9 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
15 * These headers and macros are used to define OMAP on-chip module
16 * data and their integration with other OMAP modules and Linux.
17 * Copious documentation and references can also be found in the
18 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
22 * - add interconnect error log structures
24 * - init_conn_id_bit (CONNID_BIT_VECTOR)
25 * - implement default hwmod SMS/SDRC flags?
26 * - move Linux-specific data ("non-ROM data") out
29 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
30 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
32 #include <linux/kernel.h>
33 #include <linux/list.h>
34 #include <linux/ioport.h>
35 #include <linux/spinlock.h>
40 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
41 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
44 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
45 * with the original PRCM protocol defined for OMAP2420
47 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12
48 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_MIDLEMODE_SHIFT)
49 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8
50 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
51 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3
52 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_SIDLEMODE_SHIFT)
53 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2
54 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT)
55 #define SYSC_TYPE1_SOFTRESET_SHIFT 1
56 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT)
57 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0
58 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT)
61 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant
62 * with the new PRCM protocol defined for new OMAP4 IPs.
64 #define SYSC_TYPE2_SOFTRESET_SHIFT 0
65 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT)
66 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2
67 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
68 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4
69 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
71 /* OCP SYSSTATUS bit shifts/masks */
72 #define SYSS_RESETDONE_SHIFT 0
73 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT)
75 /* Master standby/slave idle mode flags */
76 #define HWMOD_IDLEMODE_FORCE (1 << 0)
77 #define HWMOD_IDLEMODE_NO (1 << 1)
78 #define HWMOD_IDLEMODE_SMART (1 << 2)
81 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
82 * @name: name of the IRQ channel (module local name)
83 * @irq_ch: IRQ channel ID
85 * @name should be something short, e.g., "tx" or "rx". It is for use
86 * by platform_get_resource_byname(). It is defined locally to the
89 struct omap_hwmod_irq_info {
95 * struct omap_hwmod_dma_info - DMA channels used by the hwmod
96 * @name: name of the DMA channel (module local name)
97 * @dma_req: DMA request ID
99 * @name should be something short, e.g., "tx" or "rx". It is for use
100 * by platform_get_resource_byname(). It is defined locally to the
103 struct omap_hwmod_dma_info {
109 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
110 * @name: name of the reset line (module local name)
111 * @rst_shift: Offset of the reset bit
113 * @name should be something short, e.g., "cpu0" or "rst". It is defined
114 * locally to the hwmod.
116 struct omap_hwmod_rst_info {
122 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
123 * @role: "sys", "32k", "tv", etc -- for use in clk_get()
124 * @clk: opt clock: OMAP clock name
125 * @_clk: pointer to the struct clk (filled in at runtime)
127 * The module's interface clock and main functional clock should not
128 * be added as optional clocks.
130 struct omap_hwmod_opt_clk {
137 /* omap_hwmod_omap2_firewall.flags bits */
138 #define OMAP_FIREWALL_L3 (1 << 0)
139 #define OMAP_FIREWALL_L4 (1 << 1)
142 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
143 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
144 * @l4_fw_region: L4 firewall region ID
145 * @l4_prot_group: L4 protection group ID
146 * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
148 struct omap_hwmod_omap2_firewall {
157 * omap_hwmod_addr_space.flags bits
159 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
160 * ADDR_TYPE_RT: Address space contains module register target data.
162 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */
163 #define ADDR_TYPE_RT (1 << 1)
166 * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
167 * @pa_start: starting physical address
168 * @pa_end: ending physical address
169 * @flags: (see omap_hwmod_addr_space.flags macros above)
171 * Address space doesn't necessarily follow physical interconnect
172 * structure. GPMC is one example.
174 struct omap_hwmod_addr_space {
182 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
183 * interface to interact with the hwmod. Used to add sleep dependencies
184 * when the module is enabled or disabled.
186 #define OCP_USER_MPU (1 << 0)
187 #define OCP_USER_SDMA (1 << 1)
189 /* omap_hwmod_ocp_if.flags bits */
190 #define OCPIF_SWSUP_IDLE (1 << 0)
191 #define OCPIF_CAN_BURST (1 << 1)
194 * struct omap_hwmod_ocp_if - OCP interface data
195 * @master: struct omap_hwmod that initiates OCP transactions on this link
196 * @slave: struct omap_hwmod that responds to OCP transactions on this link
197 * @addr: address space associated with this link
198 * @clk: interface clock: OMAP clock name
199 * @_clk: pointer to the interface struct clk (filled in at runtime)
200 * @fw: interface firewall data
201 * @addr_cnt: ARRAY_SIZE(@addr)
202 * @width: OCP data width
203 * @user: initiators using this interface (see OCP_USER_* macros above)
204 * @flags: OCP interface flags (see OCPIF_* macros above)
206 * It may also be useful to add a tag_cnt field for OCP2.x devices.
208 * Parameter names beginning with an underscore are managed internally by
209 * the omap_hwmod code and should not be set during initialization.
211 struct omap_hwmod_ocp_if {
212 struct omap_hwmod *master;
213 struct omap_hwmod *slave;
214 struct omap_hwmod_addr_space *addr;
218 struct omap_hwmod_omap2_firewall omap2;
227 /* Macros for use in struct omap_hwmod_sysconfig */
229 /* Flags for use in omap_hwmod_sysconfig.idlemodes */
230 #define MASTER_STANDBY_SHIFT 2
231 #define SLAVE_IDLE_SHIFT 0
232 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
233 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
234 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
235 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
236 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
237 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
239 /* omap_hwmod_sysconfig.sysc_flags capability flags */
240 #define SYSC_HAS_AUTOIDLE (1 << 0)
241 #define SYSC_HAS_SOFTRESET (1 << 1)
242 #define SYSC_HAS_ENAWAKEUP (1 << 2)
243 #define SYSC_HAS_EMUFREE (1 << 3)
244 #define SYSC_HAS_CLOCKACTIVITY (1 << 4)
245 #define SYSC_HAS_SIDLEMODE (1 << 5)
246 #define SYSC_HAS_MIDLEMODE (1 << 6)
247 #define SYSS_HAS_RESET_STATUS (1 << 7)
248 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
249 #define SYSC_HAS_RESET_STATUS (1 << 9)
251 /* omap_hwmod_sysconfig.clockact flags */
252 #define CLOCKACT_TEST_BOTH 0x0
253 #define CLOCKACT_TEST_MAIN 0x1
254 #define CLOCKACT_TEST_ICLK 0x2
255 #define CLOCKACT_TEST_NONE 0x3
258 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets.
259 * @midle_shift: Offset of the midle bit
260 * @clkact_shift: Offset of the clockactivity bit
261 * @sidle_shift: Offset of the sidle bit
262 * @enwkup_shift: Offset of the enawakeup bit
263 * @srst_shift: Offset of the softreset bit
264 * @autoidle_shift: Offset of the autoidle bit
266 struct omap_hwmod_sysc_fields {
276 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data
277 * @rev_offs: IP block revision register offset (from module base addr)
278 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
279 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
280 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
281 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
282 * @clockact: the default value of the module CLOCKACTIVITY bits
284 * @clockact describes to the module which clocks are likely to be
285 * disabled when the PRCM issues its idle request to the module. Some
286 * modules have separate clockdomains for the interface clock and main
287 * functional clock, and can check whether they should acknowledge the
288 * idle request based on the internal module functionality that has
289 * been associated with the clocks marked in @clockact. This field is
290 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
292 * @sysc_fields: structure containing the offset positions of various bits in
293 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or
294 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on
295 * whether the device ip is compliant with the original PRCM protocol
296 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs.
297 * If the device follows a different scheme for the sysconfig register ,
298 * then this field has to be populated with the correct offset structure.
300 struct omap_hwmod_class_sysconfig {
307 struct omap_hwmod_sysc_fields *sysc_fields;
311 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
312 * @module_offs: PRCM submodule offset from the start of the PRM/CM
313 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
314 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
315 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
316 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
317 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
319 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
320 * WKEN, GRPSEL registers. In an ideal world, no extra information
321 * would be needed for IDLEST information, but alas, there are some
322 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
323 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
325 struct omap_hwmod_omap2_prcm {
336 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
337 * @clkctrl_reg: PRCM address of the clock control register
338 * @rstctrl_reg: adress of the XXX_RSTCTRL register located in the PRM
339 * @submodule_wkdep_bit: bit shift of the WKDEP range
341 struct omap_hwmod_omap4_prcm {
342 void __iomem *clkctrl_reg;
343 void __iomem *rstctrl_reg;
344 u8 submodule_wkdep_bit;
349 * omap_hwmod.flags definitions
351 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
352 * of idle, rather than relying on module smart-idle
353 * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
354 * of standby, rather than relying on module smart-standby
355 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
356 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file
357 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
358 * controller, etc. XXX probably belongs outside the main hwmod file
359 * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
360 * when module is enabled, rather than the default, which is to
362 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
363 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case
364 * only for few initiator modules on OMAP2 & 3.
365 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset.
366 * This is needed for devices like DSS that require optional clocks enabled
367 * in order to complete the reset. Optional clocks will be disabled
368 * again after the reset.
369 * HWMOD_16BIT_REG: Module has 16bit registers
371 #define HWMOD_SWSUP_SIDLE (1 << 0)
372 #define HWMOD_SWSUP_MSTANDBY (1 << 1)
373 #define HWMOD_INIT_NO_RESET (1 << 2)
374 #define HWMOD_INIT_NO_IDLE (1 << 3)
375 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4)
376 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5)
377 #define HWMOD_NO_IDLEST (1 << 6)
378 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7)
379 #define HWMOD_16BIT_REG (1 << 8)
382 * omap_hwmod._int_flags definitions
383 * These are for internal use only and are managed by the omap_hwmod code.
385 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
386 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
387 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
389 #define _HWMOD_NO_MPU_PORT (1 << 0)
390 #define _HWMOD_WAKEUP_ENABLED (1 << 1)
391 #define _HWMOD_SYSCONFIG_LOADED (1 << 2)
394 * omap_hwmod._state definitions
396 * INITIALIZED: reset (optionally), initialized, enabled, disabled
401 #define _HWMOD_STATE_UNKNOWN 0
402 #define _HWMOD_STATE_REGISTERED 1
403 #define _HWMOD_STATE_CLKS_INITED 2
404 #define _HWMOD_STATE_INITIALIZED 3
405 #define _HWMOD_STATE_ENABLED 4
406 #define _HWMOD_STATE_IDLE 5
407 #define _HWMOD_STATE_DISABLED 6
410 * struct omap_hwmod_class - the type of an IP block
411 * @name: name of the hwmod_class
412 * @sysc: device SYSCONFIG/SYSSTATUS register data
413 * @rev: revision of the IP class
414 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown
415 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn
417 * Represent the class of a OMAP hardware "modules" (e.g. timer,
418 * smartreflex, gpio, uart...)
420 * @pre_shutdown is a function that will be run immediately before
421 * hwmod clocks are disabled, etc. It is intended for use for hwmods
422 * like the MPU watchdog, which cannot be disabled with the standard
423 * omap_hwmod_shutdown(). The function should return 0 upon success,
424 * or some negative error upon failure. Returning an error will cause
425 * omap_hwmod_shutdown() to abort the device shutdown and return an
428 * If @reset is defined, then the function it points to will be
429 * executed in place of the standard hwmod _reset() code in
430 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have
431 * unusual reset sequences - usually processor IP blocks like the IVA.
433 struct omap_hwmod_class {
435 struct omap_hwmod_class_sysconfig *sysc;
437 int (*pre_shutdown)(struct omap_hwmod *oh);
438 int (*reset)(struct omap_hwmod *oh);
442 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
443 * @name: name of the hwmod
444 * @class: struct omap_hwmod_class * to the class of this hwmod
445 * @od: struct omap_device currently associated with this hwmod (internal use)
446 * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
447 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
448 * @prcm: PRCM data pertaining to this hwmod
449 * @main_clk: main clock: OMAP clock name
450 * @_clk: pointer to the main struct clk (filled in at runtime)
451 * @opt_clks: other device clocks that drivers can request (0..*)
452 * @masters: ptr to array of OCP ifs that this hwmod can initiate on
453 * @slaves: ptr to array of OCP ifs that this hwmod can respond on
454 * @dev_attr: arbitrary device attributes that can be passed to the driver
455 * @_sysc_cache: internal-use hwmod flags
456 * @_mpu_rt_va: cached register target start address (internal use)
457 * @_mpu_port_index: cached MPU register target slave ID (internal use)
458 * @mpu_irqs_cnt: number of @mpu_irqs
459 * @sdma_reqs_cnt: number of @sdma_reqs
460 * @opt_clks_cnt: number of @opt_clks
461 * @master_cnt: number of @master entries
462 * @slaves_cnt: number of @slave entries
463 * @response_lat: device OCP response latency (in interface clock cycles)
464 * @_int_flags: internal-use hwmod flags
465 * @_state: internal-use hwmod state
466 * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
467 * @flags: hwmod flags (documented below)
468 * @omap_chip: OMAP chips this hwmod is present on
469 * @_lock: spinlock serializing operations on this hwmod
470 * @node: list node for hwmod list (internal use)
472 * @main_clk refers to this module's "main clock," which for our
473 * purposes is defined as "the functional clock needed for register
474 * accesses to complete." Modules may not have a main clock if the
475 * interface clock also serves as a main clock.
477 * Parameter names beginning with an underscore are managed internally by
478 * the omap_hwmod code and should not be set during initialization.
482 struct omap_hwmod_class *class;
483 struct omap_device *od;
484 struct omap_hwmod_irq_info *mpu_irqs;
485 struct omap_hwmod_dma_info *sdma_reqs;
486 struct omap_hwmod_rst_info *rst_lines;
488 struct omap_hwmod_omap2_prcm omap2;
489 struct omap_hwmod_omap4_prcm omap4;
491 const char *main_clk;
493 struct omap_hwmod_opt_clk *opt_clks;
494 struct omap_hwmod_ocp_if **masters; /* connect to *_IA */
495 struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */
498 void __iomem *_mpu_rt_va;
500 struct list_head node;
514 const struct omap_chip_id omap_chip;
517 int omap_hwmod_init(struct omap_hwmod **ohs);
518 int omap_hwmod_register(struct omap_hwmod *oh);
519 int omap_hwmod_unregister(struct omap_hwmod *oh);
520 struct omap_hwmod *omap_hwmod_lookup(const char *name);
521 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
523 int omap_hwmod_late_init(void);
525 int omap_hwmod_enable(struct omap_hwmod *oh);
526 int _omap_hwmod_enable(struct omap_hwmod *oh);
527 int omap_hwmod_idle(struct omap_hwmod *oh);
528 int _omap_hwmod_idle(struct omap_hwmod *oh);
529 int omap_hwmod_shutdown(struct omap_hwmod *oh);
531 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name);
532 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name);
533 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name);
535 int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
536 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
538 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
540 int omap_hwmod_reset(struct omap_hwmod *oh);
541 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
543 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
544 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
546 int omap_hwmod_count_resources(struct omap_hwmod *oh);
547 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
549 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
550 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh);
552 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
553 struct omap_hwmod *init_oh);
554 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
555 struct omap_hwmod *init_oh);
557 int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
558 int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
559 int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
560 int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
562 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
563 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
565 int omap_hwmod_for_each_by_class(const char *classname,
566 int (*fn)(struct omap_hwmod *oh,
570 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
573 * Chip variant-specific hwmod init routines - XXX should be converted
574 * to use initcalls once the initial boot ordering is straightened out
576 extern int omap2420_hwmod_init(void);
577 extern int omap2430_hwmod_init(void);
578 extern int omap3xxx_hwmod_init(void);
579 extern int omap44xx_hwmod_init(void);